Prosecution Insights
Last updated: August 06, 2026
Application No. 18/568,227

Crystal Puller and Method for Pulling Single-Crystal Silicon Ingot, and Single-Crystal Silicon Ingot

Non-Final OA §103
Filed
Dec 07, 2023
Priority
Jan 05, 2022 — CN 202210007056.4 +1 more
Examiner
SONG, MATTHEW J
Art Unit
1714
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Xi’An Eswin Material Technology Co. Ltd.
OA Round
3 (Non-Final)
60%
Grant Probability
Moderate
3-4
OA Rounds
1y 0m
Est. Remaining
75%
With Interview

Examiner Intelligence

Grants 60% of resolved cases
60%
Career Allowance Rate
546 granted / 904 resolved
-4.6% vs TC avg
Moderate +14% lift
Without
With
+14.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
37 currently pending
Career history
958
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
59.1%
+19.1% vs TC avg
§102
16.2%
-23.8% vs TC avg
§112
16.6%
-23.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 904 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 06/25/2026 has been entered. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 1, 6 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamashita et al (US 5,264,189) in view of Yamauchi et al (JP 05-221773), an English computer translation (CT) is provided, Katano (US 2018/0108538) and further in view of Ono et al (US 2010/0127354). Yamashita et al teaches a crystal puller for pulling a single crystal silicon ingot (Czochralski growth apparatus) comprising a cylindrical heating apparatus 64 located above a water cooling jacket 20, wherein the heating apparatus is configured such that a silicon ingot enters a heat treatment chamber defined by the heating a apparatus to be heat treated when the ingot moves upwardly in a vertical direction (See claim 1; col 6, ln 1 to col 7, ln 68; Figs 13-14 shows a secondary heater 64 above a cooling water shell/jacket 20). Yamashita et al teaches secondary heater 64 is designed and positioned to heat the single-crystal T at a rate such that the dwelling time of the single-crystal in the 600°C to 800°C range is not shorter than two hours (abstract; col 6, ln 1 to col 7, ln 68; Figs 13-14 shows a secondary heater 64). Yamashita et al does not teach a cylindrical cooling apparatus located above the heating apparatus, wherein the cooling apparatus is configured such that a heat treated ingot enters a cooling chamber defined by the cooling apparatus to be cool treated when the ingot continues moving upwardly in the vertical direction and the cooling speed is greater than 2.7°C/min. In a Czochralski crystal growth apparatus, Yamauchi et al teaches a cylindrical cooling apparatus 10 located above a growth chamber, wherein the cooling apparatus is configured such that an ingot enters a cooling chamber defined by the cooling apparatus to be cool treated when the ingot continues moving upwardly in the vertical direction (Fig 6-7; CT [0007]-[0009]). Yamauchi et al teaches the cooling apparatus 10 can control the cooling rate of the silicon single crystal ingot, such that a cooling rate from 600°C to 350°C is 1.5°C/min or more and 200°C/min or less, control the amount of oxygen precipitation in large-diameter silicon single crystals at a constant level, and furthermore, to prevent the occurrence of oxidation-induced stacking faults (OSFs) in the silicon single crystals (CT [0008]). Overlapping ranges are prima facie obvious (MPEP 2144.05). It would have been obvious to one of ordinary skill in the art at the time of filing to modify Yamashita et al by providing a cylindrical cooling device to cool the crystal from 600°C to 350°C, as taught by Yamauchi et al, to prevent defects. The combination of Yamashita et al and Yamauchi et al does not explicitly teach “the water cooling jacket is configured such that the single-crystal silicon ingot obtained by pulling is cooled from 1150°C to 1020°C at a cooling speed greater than 2.7°C/min.”, the combination of Yamashita et al and Yamauchi et al teaches a water cooled jacket, however is silent to the cooling speed. In a method of Czochralski crystal growth, Katano teaches a silicon single crystal is pulled up and a crystal cooling rate is about 4.2° C./min at a temperature of a silicon melting point to 1350° C. and is about 3.1° C./min at a temperature of 1200° C. to 1000°C using a thermal shield and cooling device to control the cooling rate; and controlling the thermal history of the crystal to prevent epitaxial defects in an epitaxial wafer (abstract; [0018]-[0034]). Overlapping ranges are prima facie obvious (MPEP 2144.05). It would have been obvious to one of ordinary skill in the art at the time of filing to modify the combination of Yamashita et al and Yamauchi et al by having a water cooling jacket configured such that the single-crystal silicon ingot obtained by pulling is cooled from 1150°C to 1020°C at a cooling speed greater than 2.7°C/min, as taught by Katano to prevent an epitaxial defect from occurring in an epitaxial wafer cut from the ingot (Katano [0031]-[0033]). The combination of Yamashita et al, Yamauchi et al and Katano teaches using the secondary heater to conduct a heat treatment at 800°C to 600°C while the crystal is pulled ( Yamashita Abstract). The combination of Yamashita et al, Yamauchi et al and Katano teaches the cooling apparatus 10 can control the cooling rate of the silicon single crystal ingot, such that a cooling rate from 600°C to 350°C is 1.5°C/min or more and 200°C/min or less (Yamauchi CT [0008]); and is about 3.1° C./min at a temperature of 1200° C. to 1000°C using a thermal shield and cooling device to control the cooling rate; and controlling the thermal history of the crystal to prevent epitaxial defects in an epitaxial wafer (Katano abstract; [0018]-[0034]). Overlapping ranges are prima facie obvious (MPEP 2144.05). The combination of Yamashita et al, Yamauchi et al and Katano teaches the cooling apparatus 10 cooling from 600°C to 350°C (Yamauchi cooler 10); therefore the apparatus is configured to cool the ingot exiting the heating apparatus (Yamashita secondary heater) that conducts the heat treatment from 800°C to 600°C. The combination of Yamashita et al, Yamauchi et al and Katano does not explicitly teach the pulling mechanism is configured such that a ratio parameter V/G between the pulling speed V of the single-crystal silicon ingot upwardly in the vertical direction and an average temperature gradient G of the single-crystal silicon ingot in an axial direction of the single-crystal silicon ingot is between 1.1 times (V/G)critical and 1.2 times (V/G)critical, wherein the (V/G)critical refers to a V/G value which is defined to contribute to a crystal region at a boundary between an oxygen precipitation promoted region and an oxygen precipitation suppression region. In a Czochralski crystal growth apparatus, Ono et al teaches a water cooling jacket 7c for cooling a side portion of a single crystal 6 during growth ([0120]-[0130]; Fig 6). Ono et al also a pull shaft 4 and the pulling speed is adjusted, and performing pulling experiments to determine a relationship between the V/G value of each defect region such as an infrared scatterer defect generating region, an OSF generating region, a PV region, a PI region, and a dislocation cluster generating region, and the hydrogen concentration ([0130]-[0133], Figs 1-4), which clearly suggests a pulling mechanism configured to obtain a desired V/G. It would have been obvious to one of ordinary skill in the art at the time of filing to modify the combination of Yamashita et al, Yamauchi et al and Katano by performing pulling experiments to determine the V/G for each defect region, as taught by Ono et al, and then pulling at 1.1-1.2 V/G critical to obtain a crystal with a desired defect distribution. It is also noted that during the experiments to determine the V/G for each defect region, this would necessarily require pulling at 1.1-1.2 V/G critical. Referring to claims 6 and 10, the combination of Yamashita et al, Yamauchi et al, Katano, and Ono et al teaches producing an ingot, as discussed above, with the claimed cooling speeds and temperature ranges, and controlling V/G which would comprise pulling at 1.1-1.2 V/G critical to produce a desired defect distribution, as discussed above. Response to Arguments Applicant's arguments filed 06/25/2026 have been fully considered but they are not persuasive. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). The examiner admits Yamashita et al does not teach a cooling apparatus above the heater. Yamauchi et al teaches the cooling apparatus 10 can control the cooling rate of the silicon single crystal ingot, such that a cooling rate from 600°C to 350°C is 1.5°C/min or more and 200°C/min or less. The examiner maintains that the cooling apparatus of Yamauchi would be position above the heater taught by Yamashita which controls the temperature of the ingot from 800°C to 600ׄ°C. Furthermore, Yamauchi teaches cooling apparatus is positioned in a cooling chamber which is above the growth chamber. Applicant’s argument that the prior art does not teach a cooling apparatus above the heating apparatus is noted but not found persuasive. Yamashita et al teaches a crystal puller for pulling a single crystal silicon ingot (Czochralski growth apparatus) comprising a cylindrical heating apparatus 64 located above a water cooling jacket 20; and secondary heater 64 is designed and positioned to heat the single-crystal T at a rate such that the dwelling time of the single-crystal in the 600°C to 800°ׄC. range is not shorter than two hours (See claim 1; col 6, ln 1 to col 7, ln 68; Figs 13-14 shows a secondary heater 64 above a cooling water shell/jacket 20). Yamauchi et al teaches a cylindrical cooling apparatus 10 located above a growth chamber, wherein the cooling apparatus is configured such that an ingot enters a cooling chamber defined by the cooling apparatus to be cool treated when the ingot continues moving upwardly in the vertical direction (Fig 6-7; CT [0007]-[0009]). Yamauchi et al teaches the cooling apparatus 10 can control the cooling rate of the silicon single crystal ingot, such that a cooling rate from 600°C to 350°C is 1.5°C/min or more and 200°C/min or less. Therefore, the combination of Yamashita et al and Yamauchi et al teaches the arrangement of the cooling shell, heater above the cooling shell, and cooler in the cooling chamber above the heater because the taught temperatures range that cooler and heater is used. Yamauchi et al cooling is in the cooling chamber above the growth chamber, and cools in the temperature range of 600°C to 350°C; therefore, must be position above the heater taught by Yamashita et al which heats the ingot to control the dwell time in the temperature range of 600°C to 800°C. Applicant’s argument that the prior art does not teach the cooling apparatus is configured such that a cooling speed of the heat treated ingot is greater than 2.7°C/min is noted but not found persuasive. As discussed above, the heat treated ingot is cooled by the cooler in the cooling chamber taught by Yamauchi, and Yamauchi et al teaches the cooling apparatus 10 can control the cooling rate of the silicon single crystal ingot, such that a cooling rate from 600°C to 350°C is 1.5°C/min or more and 200°C/min or less, control the amount of oxygen precipitation in large-diameter silicon single crystals at a constant level, and furthermore, to prevent the occurrence of oxidation-induced stacking faults (OSFs) in the silicon single crystals (CT [0008]). Applicant’s argument that the prior art does not teach the V/G values is noted but not found persuasive. Applicant teaches a V/G critical refers to a value which is defined to contribute to a crystal region at a boundary between Pv and Pi region. Likewise, Ono et al teaches varying the V/G by varying the pulling speed to determine the Pv boundary and the Pi boundary (See Fig 3,4, and 10; [0063], [0090], [0133]); therefore, V/G is clearly a result effective variable and varying the V/G to obtain a desired defect distribution would have been obvious to one of ordinary skill in the art at the time of filing. Applicant’s V/G critical is merely a desired V/G value to obtain a desired defect distribution which can be easily obtained through routine experimentation of a result effective variable, as evidenced by Ono. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. CN107604431 teaches a lower cooler portions and an upper cooler portion (Abstract; Fig 1). Takanashi et al (US 2022/0098757) teaches the key to manufacture a defect-free silicon crystal, and wafers therefrom, is to maintain the Voronkov ratio (v/G) within the Pv and Pi regions, called the Pv-Pi margin and depicted by the boundaries A and B in FIG. 2, while growing the silicon crystal ([0047]; Fig 2), which clearly suggests V/G, and the boundary between Pi and Pv are a result effective variables. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW J SONG whose telephone number is (571)272-1468. The examiner can normally be reached Monday-Friday 10AM-6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kaj Olsen can be reached at 571-272-1344. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MATTHEW J. SONG Examiner Art Unit 1714 /MATTHEW J SONG/ Primary Examiner, Art Unit 1714
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Prosecution Timeline

Dec 07, 2023
Application Filed
Dec 07, 2023
Response after Non-Final Action
Oct 02, 2025
Non-Final Rejection mailed — §103
Jan 02, 2026
Response Filed
Apr 20, 2026
Final Rejection mailed — §103
Jun 25, 2026
Request for Continued Examination
Jun 27, 2026
Response after Non-Final Action
Jul 27, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
60%
Grant Probability
75%
With Interview (+14.3%)
3y 8m (~1y 0m remaining)
Median Time to Grant
High
PTA Risk
Based on 904 resolved cases by this examiner. Grant probability derived from career allowance rate.

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