DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on December 13, 2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 and 5 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Eiji et al (JP 2004-221516).
In re claim 1, Eiji et al discloses a semiconductor module comprising: an insulating substrate (i.e. 23); a wiring (i.e. 22) formed on the insulating substrate; a semiconductor chip (i.e. 30); and a lead frame (i.e. 40), wherein the semiconductor chip has one surface connected to the wiring and another surface connected to the lead frame, the wiring includes a floating wiring (i.e. 2231, 2232) to which the lead frame is connected, and a connection point between the floating wiring and the lead frame is located at a corner part of the insulating substrate (i.e. see at least Figures 1, 2, and 7 and paragraphs 0043-0045 and 0065).
In re claim 2, Eiji et al discloses wherein the connection point between the floating wiring and the lead frame is located on a further outer peripheral side of the insulating substrate than another connection point between the lead frame and the wiring (i.e. see at least Figures 1, 2, and 7).
In re claim 3, Eiji et al discloses wherein the insulating substrate is formed of ceramics (i.e. paragraph 0043 discloses the substrate is a ceramic substrate), and the lead frame is formed of copper (i.e. see at least paragraph 0045).
In re claim 5, Eiji et al discloses further comprising a heat dissipation member (i.e. 10) on a surface on a side of the insulating substrate opposite to the semiconductor chip, wherein the heat dissipation member is disposed to overlap the floating wiring with the insulating substrate interposed between the heat dissipation member and the floating wiring (i.e. see at least Figures 1, 2, and 7).
Allowable Subject Matter
Claims 4 and 6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHONY HO whose telephone number is (571)270-1432. The examiner can normally be reached 9AM - 5PM, Monday-Friday.
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/ANTHONY HO/Primary Examiner, Art Unit 2817