DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Preliminary amendment filed 14 December 2023 is acknowledged. Claims 1-10 have been canceled. Claims 11-20 have been added. Claims 11-20 are pending.
Examiner notes that claims 11-18 show an incorrect status identifier. These claims are not “original” as they were presented in an amendment filed 14 December 2023. The status of claims 11-18 should be “previously presented.”
Election/Restrictions
Applicant’s election of group I, claims 11-18, in the reply filed on 4 August 2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 19 and 20 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected product, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 4 August 2026.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
Information disclosure statement filed 14 December 2023 has been fully considered.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the subject matter of claim 11, “forming a third oxide layer on an upper surface of the semiconductor material layer, an exposed surface of the cell trench, an exposed surface of the source lead-out region trench, and an exposed surface of the source polycrystalline silicon, and then removing the third oxide layer,” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The preliminary amendments to the abstract and the specification were received on 14 December 2023. These preliminary amendments to the abstract and the specification are acceptable.
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: METHOD FOR PREPARING SHIELDED GATE SEMICONDUCTOR DEVICE STRUCTURE.
Claim Objections
Claims 13 and 15-18 are objected to because of the following informalities:
Claims 13 and 15-18 notate the unit for angstroms as “A.” This appears to be a typographical error and may be corrected as “Å.”
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation, “forming a second oxide layer and a first oxide layer sequentially, from outside to inside,” in clause 1. It is unclear how second oxide layer (34) and the first oxide layer (35) are formed sequentially, and it is unclear from which point of reference the terms “outside” and “inside” are defined.
Claim 1 recites the limitation, “the second oxide layers,” in clause 2. There is insufficient antecedent basis for limitation in plural.
Claim 1 recites the limitation, “the surface of a semiconductor material layer,” in clauses 3, 4, and 9. There is insufficient antecedent basis for this limitation in the claim. It is unclear as to which surface of what semiconductor material the claim refers.
Claim 1 recites the limitation, “removing, by etching, the semiconductor material layer between the trenches and a portion of the source polycrystalline silicon,” in clause 5. It is unclear how the semiconductor material layer is removed between the trenches and a portion of the source polycrystalline silicon. As best understood by Examiner, the semiconductor material layer is etched to a surface level with the first oxide layer (35).
Claim 1 recites the limitation, “forming a fourth oxide layer on [ ] the exposed surface of the source lead-out region trench,” in clause 7 It is unclear how the fourth oxide layer (91) is formed on the exposed surface of the source lead-out region trench (31) when there is no longer an exposed surface as shown in FIG. 8.
Claims 14 and 18 recite the limitation, “The method for preparing a shielded gate semiconductor device structure according to claim 11.” There is insufficient antecedent basis for the term “structure” in the clam.
Claims 12, 13, and 15-17 are rejected for merely containing the flaws of the parent claim.
Allowable Subject Matter
Claims 11-18 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record fails to teach the method for preparing a shielded gate semiconductor device of claim 11 in the combination of limitations as claimed, noting particularly the limitations, “removing, by etching, the semiconductor material layer between the trenches and a portion of the source polycrystalline silicon in the cell trench and the source lead-out region trench; forming a third oxide layer on an upper surface of the semiconductor material layer, an exposed surface of the cell trench, an exposed surface of the source lead-out region trench, and an exposed surface of the source polycrystalline silicon, and then removing the third oxide layer; [and] forming a fourth oxide layer [ ] on the exposed surface of the source polycrystalline silicon.”
Pan et al. (Chinese Patent Application Publication 113782449, hereinafter Pan ‘449) of record represents the closest identified prior art. Pan ‘449 teaches (FIGs. 2-17) a method for preparing a shielded gate semiconductor device substantially as claimed, the method comprising:
forming (FIG. 5) a second insulating layer (5) and a first insulating layer (4) sequentially, from outside to inside, on inner surfaces of both a cell trench (left two trenches) and a source lead-out region trench (right trench);
depositing (FIG. 9) source polycrystalline silicon (8) in spaces enclosed by the second insulating layers (5) in both the cell trench (left two trenches) and the source lead-out region trench (right trench;
removing (FIGs. 10 and 11), by etching, source polycrystalline silicon (8) on the surface of a semiconductor material layer (2) and selectively removing, by etching, a portion of the source polycrystalline silicon in an upper space of the cell trench (left trench);
removing (FIG. 12), by etching, the first insulating layer (4) and the second insulating layer (5) that are on the surface of the semiconductor material layer (2), in the cell trench (left two trenches), and in the source lead-out region trench (right trench);
forming (FIG. 13) a fourth oxide layer (9) on the upper surface of the semiconductor material layer (2), the exposed surface of the cell trench (left two trenches), the exposed surface of the source lead-out region trench (right trench);
depositing (FIG. 14) gate polycrystalline silicon (11) in the cell trench (left two trenches) and the source lead-out region trench (right trench); and
removing, (FIG. 15) by etching, the gate polycrystalline silicon (11) on the surface of the semiconductor material layer (2) and selectively removing by etching the gate polycrystalline silicon in the source lead-out region trench (left trench) until no gate polycrystalline silicon remains in the source lead-out region trench.
However, Pan ‘449 is silent to at least the explicit step of removing, by etching, the semiconductor material layer (2) between the trenches and a portion of the source polycrystalline silicon (8) in the cell trench (left two trenches) and the source lead-out region trench (right trench) as claimed. Further, the prior art of record provides no suggestion to perform this step in a method for preparing a shielded gate semiconductor device comprising a cell trench and a source lead-out region trench.
Yang et al. (Chinese Patent Application Publication 107910267), Pan (Chinese Patent Application Publication 110429033) of record, and Pan et al. (Chinese Patent Application Publication 113782446) suffer from similar deficiencies.
Claims 12-18 are indicated as containing allowable subject matter based merely upon their dependencies from claim 11 indicated as containing allowable subject matter.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christopher M. Roland whose telephone number is (571)270-1271. The examiner can normally be reached Monday-Friday, 10:00AM-7:00PM Eastern.
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/C.M.R./Examiner, Art Unit 2893
/YARA B GREEN/Supervisor Patent Examiner, Art Unit 2893
