Prosecution Insights
Last updated: April 19, 2026
Application No. 18/571,539

DISPLAY DEVICE

Non-Final OA §102
Filed
Dec 18, 2023
Examiner
MANDALA, VICTOR A
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sharp Display Technology Corporation
OA Round
1 (Non-Final)
94%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
99%
With Interview

Examiner Intelligence

Grants 94% — above average
94%
Career Allow Rate
915 granted / 975 resolved
+25.8% vs TC avg
Moderate +5% lift
Without
With
+5.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
16 currently pending
Career history
991
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
29.2%
-10.8% vs TC avg
§102
45.1%
+5.1% vs TC avg
§112
14.8%
-25.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 975 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 4, 9, and 10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Application Publication No. 2020/0150725 Saitoh et al. 1. Referring to claim 1, Saitoh et al. teaches a display device comprising: a resin substrate, (Figures 1-8 #12); a thin film transistor layer, (Figures 1-8 #Tr), provided on the resin substrate, (Figures 1-8 #12), and including an inorganic insulating film, (Figures 1-8 #16 & Paragraph 0037); and a light-emitting element layer, (Figures 1-8 #24), provided on the thin film transistor layer, (Figures 1-8 #Tr), and arrayed with a plurality of light-emitting elements, (Figures 1-8 #24), corresponding to a plurality of subpixels, (Figures 1-8 #SP & Paragraph 0044), constituting a display region, (Figures 1-8 #DA), wherein a frame region, (Figures 1-8 #NA), is provided surrounding the display region, (Figures 1-8 #DA), a terminal portion, (Figures 1-8 #TW), is provided at an end portion of the frame region, (Figures 1-8 #NA), a bending portion, (Figures 1-8 #CL), is provided between the display region, (Figures 1-8 #DA), and the terminal portion, (Figures 1-8 #TW), the bending portion, (Figures 1-8 #CL), extending in one direction, a slit, (Figure 5 area of #CL), is provided at the bending portion, (Figures 1-8 #CL), in the inorganic insulating film, (Figures 1-8 #16), the slit extending in an extending direction of the bending portion and exposing a surface of the resin substrate, (Figures 1-8 #12), a resin filling film, (Figures 1-8 #EZ & Paragraph 0059), is provided at the bending portion, the resin filling film filling the slit, (Figures 1-8 #EZ), a plurality of lead wiring lines, (Figures 1-8 #WS3 & Paragraph 0060), are provided on the resin filling film, (Figures 1-8 #EZ), the plurality of lead wiring lines, (Figures 1-8 #WS3), extending parallel with each other in a direction intersecting the extending direction of the bending portion, (Figures 1-8 #CL), protrusions, (Figures 1-8 #HP), and recesses, (Figures 1-8 #LP), each extending in a direction intersecting the extending direction of the bending portion, (Figures 1-8 #CL), are alternately disposed in the extending direction of the bending portion, (Figures 1-8 #CL), on a surface of the resin filling film, (Figures 1-8 #EZ), and at least one of the plurality of lead wiring lines, (Figures 1-8 #WS3), is provided on a protrusion of the protrusions, (Figures 1-8 #HP). 2. Referring to claim 2, Saitoh et al. teaches a display device according to claim 1, wherein, of the plurality of lead wiring lines, one of a pair of the lead wiring lines adjacent to each other is provided on the protrusion of the protrusions, and the other of the pair of lead wiring lines is provided in a recess of the recesses, (Figure 11 WS4a and WS4b). 3. Referring to claim 4, Saitoh et al. teaches a display device according to claim 1, wherein the surface of the resin filling film, (Figures 1-8 #EZ), is increasingly higher than a surface of the inorganic insulating film, (Figures 1-8 #16), outside of the slit, (Figures 1-8 #CL), from both end portions toward a central portion of the slit in a width direction. 4. Referring to claim 9, Saitoh et al. teaches a display device according to claim 1, comprising a sealing film, (Figures 1-8 #6), in which a first inorganic sealing film, (Figures 1-8 #26 & Paragraph 0048), an organic sealing film, (Figures 1-8 #27 & Paragraph 0048), and a second inorganic sealing film, (Figures 1-8 #28 & Paragraph 0048), are sequentially layered, the sealing film, (Figures 1-8 #6), covering the light-emitting element layer, (Figures 1-8 #24). 5. Referring to claim 10, Saitoh et al. teaches a display device according to claim 1, wherein each of the plurality of light-emitting elements is an organic electroluminescence element, (Figures 1-8 #24 & Paragraph 0044). Allowable Subject Matter The following is a statement of reasons for the indication of allowable subject matter: 6. Claims 3 and 5-8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 7. The prior art teaches the claimed matter in the rejections above, but is silent with respect to the above teachings in combination with the display device according to claim 1, wherein the surface of the resin filling film is increasingly lower than a surface of the inorganic insulating film outside of the slit, from both end portions toward a central portion of the slit in a width direction; and/or the display device according to claim 1, wherein the thin film transistor layer includes, as the inorganic insulating film, a base coat film, a gate insulating film, and an interlayer insulating film sequentially layered on the resin substrate, a first slit is provided in the gate insulating film and the interlayer insulating film as a portion of the slit, the first slit exposing a surface of the base coat film, and a second slit is provided in the base coat film as a portion of the slit, the second slit exposing the surface of the resin substrate. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR A MANDALA whose telephone number is (571)272-1918. The examiner can normally be reached on M-Th 8-6:30 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached on 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VICTOR A MANDALA/Primary Examiner, Art Unit 2899 2/3/26
Read full office action

Prosecution Timeline

Dec 18, 2023
Application Filed
Feb 03, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604525
DISPLAY DEVICE
2y 5m to grant Granted Apr 14, 2026
Patent 12604530
DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
2y 5m to grant Granted Apr 14, 2026
Patent 12598954
ELECTRONIC STRUCTURE AND METHOD OF MANUFACTURING THE SAME
2y 5m to grant Granted Apr 07, 2026
Patent 12593552
SEMICONDUCTOR LIGHT EMITTING DEVICE
2y 5m to grant Granted Mar 31, 2026
Patent 12588556
DISPLAY APPARATUS
2y 5m to grant Granted Mar 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
94%
Grant Probability
99%
With Interview (+5.3%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 975 resolved cases by this examiner. Grant probability derived from career allow rate.

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