DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 14-17 are rejected under 35 U.S.C. 101 because the claimed invention is directed to non-statutory subject matter. The claim(s) does/do not fall within at least one of the four categories of patent eligible subject matter because Claim 14 recites “One or more computer-readable media”. However, the usage of the phrase “One or more computer-readable media” is broad enough to include both “non-transitory” and “transitory” (moving electrons, etc) media. The specification does not clearly limit the utilization of a non-transitory computer readable medium (Specification, Paragraphs 0100) and, thus does not constitute functional descriptive material. Therefore, when the broadest reasonable interpretation of a claim covers a signal per se, the claim must be rejected under 35 U.S.C. § 101 as covering non-statutory subject matter. See In re Nuijten, 500 F.3d 1346, 1356-57 (Fed. Cir. 2007) (transitory embodiments are not directed to statutory subject matter).
The USPTO recognizes that applicants may have claims directed to computer readable media that cover signals per se, which the USPTO must reject under 35 U.S.C. § 101 as covering both non-statutory subject matter and statutory subject matter. In an effort to assist the patent community in overcoming a rejection or potential rejection under 35 U.S.C. § 101 in this situation, the USPTO suggests the following approach. A claim drawn to such a computer readable medium that covers both transitory and non-transitory embodiments may be amended to narrow the claim to cover only statutory embodiments to avoid a rejection under 35 U.S.C. § 101 by adding the limitation “non-transitory” to the claim. Cf. Animals - Patentability, 1077 Off. Gaz. Pat. Office 24 (April 21, 1987) (suggesting that applicants add the limitation “non-human” to a claim covering a multi-cellular organism to avoid a rejection under 35 U.S.C. § 101). Such an amendment would typically not raise the issue of new matter, even when the specification is silent because the broadest reasonable interpretation relies on the ordinary and customary meaning that includes signals per se. The limited situations in which such an amendment could raise issues of new matter occur, for example, when the specification does not support a non-transitory embodiment because a signal per se is the only viable embodiment such that the amended claim is impermissibly broadened beyond the supporting disclosure. See, e.g., Gentry Gallery, Inc. v. Berkline Corp., 134 F.3d 1473 (Fed. Cir. 1998).
The dependent claims included in the statement of rejection but not specifically addressed in the body of the rejection have inherited the deficiencies of their parent claim and have not resolved the deficiencies. Therefore, they are rejected based on the same rationale as applied to their parent claims above.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1, 3-14, 16-17, and 27-29 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al US 2018/0039324 A1 (hence Lee) in view of Weiss et al US 2013/0070514 A1 (hence Weiss).
In re claims 1, 14, and 27, Lee discloses a controller coupled to a plurality of hardware modules is arranged for determining activities of at least two of the hardware modules in real time, and determining a voltage and a frequency for one of the hardware modules according to the activities of the at least two of the hardware modules (Abstract) and teaches the following:
An apparatus comprising: memory to store initialization information for a plurality of circuits; and processing circuitry, coupled with the memory, to: retrieve the initialization information from the memory, wherein the initialization information includes an indication of a target die temperature (Paragraph 0019), a target pass rate (Paragraph 0022), and a target throughput (Paragraph 0022); adjust an average die temperature of the plurality of circuits based on the target die temperature; adjust a frequency of the plurality of circuits based on the target pass rate and the target throughput; and adjust a voltage supplied to the plurality of circuits (Paragraphs 0024-0026)
However, Lee doesn’t explicitly teach the following:
initialization information for a plurality of application-specific integrated circuits (ASICs)
Nevertheless, Weiss discloses an integrated circuit employs a plurality of functional blocks, such as but not limited to, processors (e.g., cores) (Abstract) and teaches the following:
initialization information for a plurality of application-specific integrated circuits (ASICs) (Paragraphs 0004, 0015, and claim 1)
It would have been obvious to one having ordinary skills in the art at the time the invention was filed to have modified the Lee reference to include a plurality of functional blocks, such as but not limited to, processors (e.g., cores), and an on-die distributed programmable passive variable resistance memory array configured to provide configuration information for each of the plurality of functional blocks, as taught by Weiss, with a reasonable expectation of success, in order to allow dynamic changing of hardware configuration of the functional blocks both during normal operation and prior to die packaging (Weiss, Abstract).
In re claims 3 and 16, Lee teaches the following:
wherein adjusting the frequency of the plurality of ASICs includes performing a coarse frequency tuning procedure, and wherein the processing circuitry is further to perform a fine frequency tuning procedure on the plurality of ASICs subsequent to the coarse frequency tuning procedure (Paragraph 0005)
In re claims 4 and 17, Lee teaches the following:
wherein the coarse frequency tuning procedure includes adjusting the frequency of the plurality of ASICs by a first adjustment step, and wherein the fine frequency tuning procedure includes adjusting the frequency of the plurality of ASICs by a second adjustment step that is less than the first adjustment step (Paragraph 0005)
In re claim 5, Lee teaches the following:
wherein the coarse frequency tuning procedure includes determining a pass rate associated with a known job for an ASIC from the plurality of ASICs, and adjusting the frequency of the plurality of ASICs based on a comparison of the determined pass rate to the target pass rate (Paragraphs 0005, and 0017)
In re claim 6, Lee teaches the following:
wherein the coarse frequency tuning procedure includes: determining that an overall throughput for the plurality of ASICs is lower than the target throughput; and determining a frequency adjustment value to achieve the target throughput (Paragraph 0006)
In re claim 7, Lee teaches the following:
wherein the determined frequency adjustment value is lower than the second adjust step, and wherein the processing circuitry is further to increase the voltage supplied to the plurality of ASICs to achieve the target throughput (Paragraph 0030)
In re claim 8, Lee teaches the following:
wherein adjusting the voltage supplied to the plurality of ASICs includes determining an average pass rate associated with a known job for the plurality of ASICs and adjusting the voltage supplied to the plurality of ASICs based on a comparison of the determined average pass rate to the target pass rate (Paragraphs 0029-0030)
In re claims 9 and 28, Lee teaches the following:
wherein adjusting the voltage supplied to the plurality of ASICs includes increasing the voltage supplied to the plurality of ASICs until a voltage associated with a stack of ASICS connected in parallel meets a minimum predetermined voltage (Paragraphs 0029-0030)
In re claims 10 and 29, Lee teaches the following:
wherein adjusting the voltage supplied to the plurality of ASICs includes assigning respective test jobs to a subset of ASIC engines in the stack to prevent the subset of ASIC engines from idling subsequent to the voltage associated with the stack meeting the minimum predetermined voltage (Paragraphs 0024-0026)
In re claims 11 and 12, the combination of Lee and Weiss discloses the claimed invention except for wherein the voltage supplied to the plurality of ASICs is initially about 3000 mV, and wherein the voltage supplied to the plurality of ASICs is increased in increments of about 333 mV, and wherein the minimum predetermined voltage is about 375 mV. It would have been obvious to one having ordinary skill in the art at the time the invention was made to define the range above, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art, In re Aller, 105 USPQ 233.
In re claim 13, Lee teaches the following:
wherein the apparatus comprises a controller coupled to the plurality of ASICs via a communications interface (Paragraph 0017)
Claim(s) 2 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee and Weiss and further in view of Kennedy et al US 2021/0333849 A1 (hence Kennedy).
In re claims 2 and 15, the combination of Lee and Weiss discloses the claimed invention as recited above but doesn’t explicitly teach the following:
wherein adjusting the average die temperature of the plurality of ASICs includes dynamically adjusting a speed of one or more fans
Nevertheless, Kennedy discloses handling systems utilizing fans at different speeds (Abstract) and teaches the following:
wherein adjusting the average die temperature of the plurality of ASICs includes dynamically adjusting a speed of one or more fans (Paragraphs 0046, 0063, and claim 1)
It would have been obvious to one having ordinary skills in the art at the time the invention was filed to have modified the Lee reference to include adjusting a speed of one or more fans, as taught by Kennedy, with a reasonable expectation of success, in order to allow for information handling systems to be general or configured for a specific user or specific use (Kennedy, Paragraph 0002).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RAMI KHATIB whose telephone number is (571)270-1165. The examiner can normally be reached M-F: 9:00am-5:30pm.
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/RAMI KHATIB/Primary Examiner, Art Unit 3669