DETAILED ACTION
Election/Restrictions
Applicant's election with traverse of Group II and Species 1a, 2a, 3a, and 4a, in the reply filed on 5/6/26 is acknowledged. The traversal is on the ground(s) that there is no undue burden. This is not found persuasive because there is an undue burden as detailed in the restriction requirement.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 13 and 16-17, plus dependent claims 14-15, 19 and 20, recite the limitation "circuit". There is insufficient antecedent basis for this limitation in the claim.
For examination purposes it is assumed that “circuit” refers to “integrated circuit”.
Rejection over Suh et al., US 2013/002651
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 13-15 and 19 is/are rejected under 35 U.S.C. 102a1 as being clearly anticipated by Suh et al., US 2013/0026518.
Regarding claim 13, Suh (figure 5) teaches an optoelectronic component having
a carrier glass 60 (paragraph 0047),
having a semiconductor die 21 having an integrated circuit 30 on a front side, and having a first semiconductor layer sequence 25/27/29, which is arranged on a lower side of the carrier glass 60 facing toward the front side of the semiconductor die 21, wherein electrical contacts 36a/36b of the first semiconductor layer sequence 25/27/29 are directly connected to electrical circuit contacts (between 21 & 30) of the circuit 30,
wherein electrical component contacts 53a/53b of the optoelectronic component are arranged on a rear side of the semiconductor die 21.
With respect to claim 14, Suh (paragraph 0030) teaches the first semiconductor layer sequence 30 is an LED layer sequence.
As to claim 15, Suh (figure 5) teaches the first semiconductor layer sequence 30 is embedded in a molding material 40a arranged on the lower side of the carrier glass 30.
In re claim 19, Suh (paragraph 0032) teaches a light-reflective layer 31 is arranged on the front side of the semiconductor die.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 16 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Suh et al., US 2013/002651 as applied to claim 13 above.
Concerning claim 16, though Suh fails to teach the circuit is designed to control the first semiconductor layer sequence, it would have been obvious to one of ordinary skill in the art at the time of the invention to use the circuit for control in the invention of Suh because it is a conventionally known and used circuit. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
Pertaining to claim 20, though Suh fails to teach the carrier glass 60 comprises a thickness of less than 1000 um, in particular a thickness of less than 500 um, wherein the semiconductor die comprises a thickness of less than 300 um, in particular a thickness of less than 100 um, wherein the first semiconductor layer sequence comprises a thickness of less than 50 um, in particular a thickness of less than 30 um, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05).
Rejection over Chen et al., US 2020/0318815
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 13-15 and 19 is/are rejected under 35 U.S.C. 102a2 as being clearly anticipated by Chen et al., US 2020/0318815.
In claim 13, Chen (figure 2) teaches an optoelectronic component
having a carrier glass 400,
having a semiconductor die 310 having an integrated circuit 430 on a front side, and having a first semiconductor layer sequence 312/311/313, which is arranged on a lower side of the carrier glass 400 facing toward the front side of the semiconductor die 310, wherein electrical contacts 314 of the first semiconductor layer sequence 312/311/313 are directly connected to electrical circuit contacts 315 of the circuit 430,
wherein electrical component contacts 220 of the optoelectronic component are arranged on a rear side of the semiconductor die 310.
Regarding claim 14, Chen (paragraph 0036) teaches the first semiconductor layer sequence 312/311/313 is an LED layer sequence.
With respect to claim 15, Chen (figure 2) teaches the first semiconductor layer sequence 312/311/313 is embedded in a molding material 320 arranged on the lower side of the carrier glass 400.
As to claim 19, Chen (figure 2) teaches a light-reflective layer 315 is arranged on the front side of the semiconductor die 310.
Claim(s) 16 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al., US 2020/0318815, as applied to claim 13 above.
In re claim 16, though Chen fails to teach the circuit is designed to control the first semiconductor layer sequence, it would have been obvious to one of ordinary skill in the art at the time of the invention to use the circuit for control in the invention of Suh because it is a conventionally known and used circuit. The use of conventional materials to perform their known functions is obvious (MPEP 2144.07).
Concerning claim 20, though Chen fails to teach the carrier glass comprises a thickness of less than 1000 um, in particular a thickness of less than 500 um, wherein the semiconductor die comprises a thickness of less than 300 um, in particular a thickness of less than 100 um, wherein the first semiconductor layer sequence comprises a thickness of less than 50 um, in particular a thickness of less than 30 um, It would have been obvious to one ordinary skill in the art at the time of the invention to optimize the thickness through routine experimentation (MPEP 2144.05).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID A ZARNEKE whose telephone number is (571)272-1937. The examiner can normally be reached M-F.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matt Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DAVID A ZARNEKE/ Primary Examiner, Art Unit 2891 6/23/26
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