DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Preliminary Amendment
Applicant’s 12/22/2023 Preliminary Amendment to: 1. Amend the instant Specification. 2. Amend the Abstract. 3. Amend the Claims is acknowledged.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 12/22/2023 and 6/25/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: SUPER-JUNCTION MOSFET DEVICE HAVING A FIELD STOP REGION.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-14 are rejected under 35 U.S.C. 103 as being unpatentable over Miyasaka et al (US 2003/0207536 A1, hereafter Miyasaka) in view of Willmeroth et al (US 2014/0231909 A1, hereafter Willmeroth).
Re claim 1, Miyasaka discloses in FIG. 17 (with references to FIGS. 15 and 16) a super-junction MOSFET device ([0153]) comprising a plurality of cell structures (device for each gate G; [0138]), the cell structure (device for each gate G) comprising:
a drain electrode (as in 88 in FIG. 15; [0138] and [0153]);
an N-type drain electrode layer (as in 81 in FIG. 15; [0138] and [0153]) arranged on the drain electrode (as in 88);
an N-type buffer layer (as in 82c in FIG. 16; [0151]) arranged on the N-type drain electrode layer (as in 81);
first (left) and second (middle) P-pillars (as in 82b in FIG. 15; [0138] and [0153]) arranged on the N-type buffer layer (as in 82c) and spaced apart (separated) from each other in a horizontal direction (laterally);
first (left) and second (middle) P-type body regions (83a in FIG. 15; [0153]) respectively arranged on the first (left) and second (middle) P-pillars (as in 82b), and spaced apart (separated) from each other in the horizontal direction (laterally);
an N-pillar (as in 82a/82d in FIG. 15; [0138] and [0153]) arranged on the N-type buffer layer (as in 82c), sandwiched (disposed laterally) between the first P-pillar (as in left 82b) and the second P-pillar (as in middle 82b), and sandwiched (disposed laterally) between the first P-type body region (left 83a) and the second P-type body region (as in middle 83a);
first (left) and second (middle) N-type source regions (84 in FIG. 15; [0153]) respectively arranged on upper surface layers (upper regions) of the first (left) and second (middle) P-type body regions (83a);
first (left) and second (middle) P-type body contact regions (83b; [0153]) respectively arranged on the upper surface layers (upper regions) of the first (left) and second (middle) P-type body regions (83a), wherein the first P-type body contact region (left 83b) is arranged on a side (left) of the first N-type source region (left 84) away (separated) from the second P-type body region (middle 83a), and the second P-type body contact region (middle 83b) is arranged on a side (right) of the second N-type source region (right 84) away from the first P-type body region (left 83a);
a gate structure (as in 85/86 in FIG. 15; [0138] and [0153]) arranged on the first P-type body region (left 83a), the N-pillar (as in 82a/82d) and the second P-type body region (middle 83a), and in contact with (physically touching) the first N-type source region (left 84) and the second N-type source region (middle 84); and
a source electrode (87; [0153]) covering (overlaying) the gate structure (as in 85/86), and in contact with (physically touching) the first N-type source region (left 84), the second N-type source region (middle 84), the first P-type body contact region (left 83b) and the second P-type body contact region (middle 83b).
Miyasaka fails to disclose an N-type field stop region arranged in the N-type buffer layer, the N-type field stop region having a vertical projection with spaced regions on the N-type drain electrode layer, and the N-type field stop region having a higher doping concentration than the N-type buffer layer.
However,
Willmeroth discloses in FIG. 2D (with references to FIG. 1A) a super-junction MOSFET device (500) comprising: an N-type field stop region (portions of 129; [0053] and [0061]) arranged in contact with (directly adjoining; [0053]) an N-type drain electrode layer (as in 130 in FIG. 1A; [0049] and [0053]), the N-type field stop region (portions of 129) having a vertical projection (upward extension) with spaced regions (separation between adjacent portions of 129) on the N-type drain electrode layer (as in 130).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Miyasaka by adding the N-type field stop region of Willmeroth, in contact with the N-type drain electrode layer of Miyasaka, arranged in the N-type buffer layer (see inserted figure below), the N-type field stop region having a vertical projection with spaced regions on the N-type drain electrode layer, which prevents a depletion zone extending from the pn-junctions between the super junction regions in the vertical direction towards the bottom of the N-type drain electrode layer at which the depletion zone reaches the drain electrode or unavoidable spikes of metal extending from the drain electrode into the N-type drain electrode layer and, as a consequence, ensures a soft switching behavior of the super-junction MOSFET device (Willmeroth; [0055]).
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For the record, the inserted figure (annotated FIG. 17 of Miyasaka modified by Willmeroth) depicts the N-type field stop region (portions 129) of Willmeroth inserted in the N-type buffer layer (82c) of Miyasaka below P-pillars (82b) and N-pillars (82a/82d).
Lastly, with respect to the limitations of “the N-type field stop region having a higher doping concentration than the N-type buffer layer”, the N-type field stop region (129) of Willmeroth may a maximum doping concentration of 2.5x1018 cm-3 (50% of the 5x1018 cm-3 maximum doping concentration of the N-type drain electrode layer (130); [0041] and [0053]), and the N-type buffer layer (as in 82c) is an n- (n-minus) layer, which would have a doping concentration of at least two orders of magnitude lower than the maximum doping concentration of the N-type field stop region (129). Resulting, therein “the N-type field stop region having a higher doping concentration than the N-type buffer layer” as part of the modification of Miyasaka with the N-type field stop region of Willmeroth.
Re claim 2, Miyasaka and Willmeroth disclose the super-junction MOSFET device according to claim 1, wherein the doping concentration (2.5x1018 cm-3; see claim 1) of the N-type field stop region (129 of Willmeroth) is at least 10 times (at least two orders of magnitude; see claim 1) the doping concentration (n- concentration; see claim 1) of the N-type buffer layer (82c of Miyasaka), as part of the modified switching behavior of the super-junction MOSFET device discussed for claim 1.
Re claim 3, Miyasaka and Willmeroth disclose the super-junction MOSFET device according to claim 1.
But, fails to explicitly disclose wherein the spaced regions (separation between adjacent portions of 129) do not completely partition the N-type field stop region (portions of 129 of Yang), and the N-type field stop region (portions of 129) is integrally connected.
However, Willmeroth discloses the N-type field stop region (129) can be integrally connected (a contiguous layer; [0053]).
Thus, it would have been an obvious design choice (MPEP § 2144.04) to form the N-type field stop region integrally connected, wherein the spaced regions (separation between adjacent portions of 129) do not completely partition the N-type field stop region for the desired modified switching behavior of the super-junction MOSFET device discussed for claim 1.
Re claim 4, Miyasaka and Willmeroth disclose the super-junction MOSFET device according to claim 3, wherein the vertical projection (upward extension) of the N-type field stop region (integrally formed portions of 129 of Willmeroth) on the N-type drain electrode layer (81 of Miyasaka) overlaps (correspond to; see inserted figure above) with vertical projections (upward extension) of the first P-pillar (left 82b of Miyasaka), the N-pillar (82a/82d of Miyasaka) and the second P-pillar (middle 82b of Miyasaka) on the N-type drain electrode layer (81) for the desired modified switching behavior of the super-junction MOSFET device discussed for claim 1.
Re claim 5, Miyasaka and Willmeroth disclose the super-junction MOSFET device according to claim 1, wherein the N-type field stop region (portions of 129 of Willmeroth) includes at least two divisions (7; see inserted figure above) that are not in contact with (separated from) each other (see inserted figure above), as part of the modified switching behavior of the super-junction MOSFET device discussed for claim 1.
Re claim 6, Miyasaka and Willmeroth disclose the super-junction MOSFET device according to claim 5, wherein the N-type field stop region includes three divisions (any 3 of the portions 129; see inserted figure above) that are not in contact with (separated from) each other (see inserted figure above), and vertical projections (upward extension) of the first P-pillar (left 82b of Miyasaka), the N-pillar (82a/82d of Miyasaka) and the second P-pillar (middle 82b of Miyasaka) on the N-type drain electrode layer (81) respectively.
Re claims 7-10, Miyasaka and Willmeroth disclose the super-junction MOSFET device according to claim 1.
But, fail to explicitly disclose wherein a top surface of the N-type field stop region is spaced apart from a top surface of the N-type buffer layer by a preset distance, and a bottom surface of the N-type field stop region is spaced apart from a bottom surface of the N-type buffer layer by another preset distance;
wherein a top surface of the N-type field stop region is in contact with at least one of the first P-pillar, the N-pillar or the second P-pillar, and a bottom surface of the N-type field stop region is in contact with the N-type drain electrode layer;
wherein a top surface of the N-type field stop region is spaced apart from a top surface of the N-type buffer layer by a preset distance, and a bottom surface of the N-type field stop region is in contact with the N-type drain electrode layer; and
wherein a top surface of the N-type field stop region is in contact with at least one of the first P-pillar, the N-pillar or the second P-pillar, and a bottom surface of the N-type field stop region is spaced apart from a bottom surface of the N-type buffer layer by a preset distance.
However, Willmeroth discloses in the embodiments of FIGS. 2A-2D and claim 1, top and bottom surfaces (upper and lower planes) of the N-type field stop region (portions of 129) may be spaced apart (overlapping; claim 1) or in contact with (directly adjoining; Summary; [0045]; [0057] and claim 1) the P-pillars, the N-pillar and the N-type drain electrode layer based on the number of steps and the implantation acceleration voltages used ([0053]) for the N-type field stop region (portions of 129).
Thus, the limitations of claims 7-10 would be rendered obvious by choosing the desired number of steps and implantation acceleration voltages required to position the N-type drain electrode layer relative to the P-pillars, the N-pillar and the N-type drain electrode layer as part of the modified switching behavior of the super-junction MOSFET device discussed for claim 1.
Re claim 11, Miyasaka discloses the super-junction MOSFET device according to claim 1, wherein the gate structure (85/86) includes a gate dielectric layer (85; [0138]), a gate conductive layer (86; [0138]) and an insulating protective layer (89; [0138]), the gate conductive layer (86) is arranged on (over) the gate dielectric layer (85), and the insulating protective layer (89) covers a top surface (upper plane) and side surfaces (vertical planes) of the gate conductive layer (86).
Re claim 12, Miyasaka discloses the super-junction MOSFET device according to claim 1, wherein the doping concentration of the N-type drain electrode layer (81) is higher than the doping concentration (n+ vs n-) of the N- type buffer layer (82c).
Re claim 13, Miyasaka discloses the super-junction MOSFET device according to claim 1, wherein the doping concentrations of the first N-type source region (left 84) and the second N-type source region (middle 84) are respectively (both) higher than the doping concentrations (n+ vs p) of the first P-type body region (left 83a) and the second P-type body region (middle 83a).
Re claim 14, Miyasaka discloses the super-junction MOSFET device according to claim 1, wherein the doping concentrations of the first P-type body contact region (left 83b) and the second P-type body contact region (middle 83b) are respectively (both) higher than the doping concentrations (p+ vs p) of the first P-type body region (left 83a) and the second P-type body region (middle 83a).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408) 918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT.
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/ERIC W JONES/Primary Examiner, Art Unit 2892