Prosecution Insights
Last updated: April 19, 2026
Application No. 18/575,748

OPTOELECTRONIC SEMICONDUCTOR COMPONENT AND PRODUCTION METHOD

Non-Final OA §102§103§112
Filed
Dec 29, 2023
Examiner
WALL, VINCENT
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
AMS-OSRAM AG
OA Round
1 (Non-Final)
62%
Grant Probability
Moderate
1-2
OA Rounds
2y 8m
To Grant
87%
With Interview

Examiner Intelligence

Grants 62% of resolved cases
62%
Career Allow Rate
488 granted / 793 resolved
-6.5% vs TC avg
Strong +25% interview lift
Without
With
+25.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
52 currently pending
Career history
845
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
48.9%
+8.9% vs TC avg
§102
16.9%
-23.1% vs TC avg
§112
27.2%
-12.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 793 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on December 29, 2023 was considered by the examiner. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the method of claim 32 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 19, 22 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 19, The limitation: “wherein at least two-layered lead frame parts are formed in one piece so that the support layer” is indefinite. It is indefinite because what does it mean “so that the support layer”? So that the support layer what? It appears Applicant is missing part of this clause. Regarding claim 22, Examiner does not know what “partially completely laterally displaced” means. Something is either partially laterally displaced or completely laterally displaced. It appears that applicant means partially laterally displaced. Claim Rejections - 35 USC § 112(d) The following is a quotation of 35 U.S.C. 112(d): (d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph: Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. Claim 18 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Regarding claim 18, Claim 18 contains the same subject matter contained in claim 17. Therefore, claim 18 fails to further limit the subject matter of claim 17. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 17-20, 22, 31, and 33 is/are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Lim et al. (US 2020/0212276 A1) (“Lim”). Regarding claim 17, Lim teaches at least in figures 1-4: a mounting side (bottom of T2) and an attachment side (top of T1) opposite the mounting side (the sides are opposite), wherein the attachment side (top pf T1) is configured for surface mounting of the semiconductor device (120A); a plurality of separate, metallic lead frame parts (111/112/153); and a potting body (113) mechanically holding together the lead frame parts (111/112/153); and a plurality of optoelectronic semiconductor chips (120A-B) mounted on the mounting side (top of T1), wherein the lead frame parts (111/112/153) project beyond the potting body at the mounting side (this is shown in at least figure 2), wherein the optoelectronic semiconductor chips (120A-B) are flip-chips (¶ 0192) so that each one of the optoelectronic semiconductor chips is mounted on at least two of the lead frame parts and is electrically contacted by these lead frame parts (this is shown in at least figure 2), wherein at least some of the lead frame parts have a double-layered design (T1 and T2 are the double layers) so that the lead frame parts together form a support layer (T2) on the attachment side and a mounting layer (T1) on the mounting side (this is a function of 111/112/153), wherein the support layer (T2) is embedded in the potting body (113) and the mounting layer (T1) extends at least partially onto the potting body (113), and wherein the support layer (T2) is thicker than the mounting layer (T1) by at least a factor of 2 (¶ 0163) and, as seen in plan view of the mounting side (figure 4), the support layer (T2) being partially exposed (T2 is partially exposed as shown in figures 2 and 4), or wherein the support layer (T2) terminates flush with the potting body in a direction towards the mounting side and towards the attachment side so that the potting body is as thick as the support layer (T2 terminates flush with 113 toward the claimed direction(s)). Regarding claim 18, Lim teaches at least in figures 1-4: wherein the support layer (T2) is embedded in the potting body (113), and wherein the mounting layer (T1) extends at least partially onto the potting body (113). Regarding claim 19, Lim teaches at least in figures 1-4: wherein at least two-layered lead frame parts (T1 and T2) are formed in one piece (shown in figure 2) so that the support layer (see 35 USC § 112(b)), and wherein the mounting layer (T1) are made of the same material and are connected to one another without any joints (T1 and T2 can be made of the same material (¶ 0113) and are connected without any joints as seen in figures 1-4). Regarding claim 20, Lim teaches at least in figures 1-4: wherein the lead frame parts (111/112/153) are in each case copper pieces (¶ 0113), and for at least one or all of the lead frame parts (111/112/153), which are of a two-layer design (T1 and T2), the mounting layer (T1) in each case completely covers an associated supporting layer (T2) and projects laterally all around over said supporting layer (Figures 4 and 2-3 show this). Regarding claim 22, Lim teaches at least in figures 1-4: wherein, in at least one cross-section perpendicular to the mounting side and viewed through at least two of the semiconductor chips (at least figure 2 or 3), at least some contiguous sub-regions of the mounting layer are spaced apart from the support layer such that the mounting layer is partially completely laterally displaced relative to the support layer as viewed in plan view on the mounting side (there are regions of T1 spaced apart from regions of T2 such that they are partially or completely laterally displaced). Regarding claim 23, Lim teaches at least in figures 1-4: wherein a minimum distance between adjacent lead frame parts at the mounting side is at most 70 µm (This would be distance W3 and W2 in at least figure 2. ¶ 0157 teaches W3 can be 100-150 µm. This alone reads on the claimed minimum distance). Regarding claim 24, Lim teaches at least in figures 1-4: wherein at least some of the semiconductor chips are connected to form an electrical series circuit (this is an intended use of the device. However, figure 2 shows the devices connected in series as they share a common connection 153). Regarding claim 31, Lim teaches at least in figures 1-4: a housing ring (top part of 113) made of a plastic (¶ 0080), wherein the housing ring (top part of 113) is mounted on the mounting side (T1) and forms a well (the sloped lines of 113 form said well) in which the semiconductor chips are located (120A-120B). Regarding claim 33, Claim 33 contains subject matter of claim 17 and rejected for the same reasons stated in claim 17 above. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 21, 25-27 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lim. Regarding claim 21, Lim teaches at least in figures 1-4: wherein the semiconductor chips (120A-B) are mounted only on the mounting layer (T1), wherein, viewed in plan view on the mounting side (figure 4), each of the semiconductor chips (120A-B) extends at most 20% onto the support layer so that the semiconductor chips extend predominantly only onto the potting body and onto the mounting layer (while not expressly taught by Lim it would have been obvious to one of ordinary skill in the art to use routine skill in the art top optimize the amount the semiconductor chips extend onto the support layer as one of ordinary skill in the art would know that they would need to accommodate other features as shown in at least figure 2 in order to electrically connect the semiconductor chips, and to make them mechanically stable). Regarding claim 25, Lim does not show: wherein the semiconductor chips of the electrical series circuit are arranged along a straight line section and the straight line section, viewed in plan view on the mounting side, forms an axis of mirror symmetry for the lead frame parts, wherein, viewed in plan view on the mounting side, at least some of the lead frame parts widen in a direction away from the axis of mirror symmetry. However, arranging LEDs in series, in parallel, or a combination of series-parallel is well known in the art. It is not novel or non-obvious to rearrange the leds of Lim to be in single file (series). One of ordinary skill in the art may do this for any number of reasons. Some of which are: to optimize for space requirements, to optimize for heat dissipation, to optimize for viewing pleasure, to optimize electrical current, etc. The rearrangement of parts is an obvious matter of design choice for one of ordinary skill in the art. MPEP 2144.04(IV)(C). Regarding claim 26, Claim 26 is rejection for the same reasons as claim 25, and it is also a duplication of parts as there are now two rows of LEDs. MPEP 2144.04(IV)(B)-(C). Regarding claim 27, Lim does not show: Claim 27 is rejected for the same reasons as claim 25, in that Applicant is now claiming a parallel circuit. Claim(s) 28-30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lim, in view of Kimura et al. (US 2013/0113015 A1) (“Kimura”). Regarding claim 28, Lin does not teach: wherein the lead frame parts for the electrical parallel connection are each comb-shaped, such that each of the lead frame parts has a plurality of prongs, and wherein the lead frame parts interlock with each other. Kimura teaches at least in figures 13A-13B: wherein the lead frame parts (25/26) for the electrical parallel connection (shown in figure 13B) are each comb-shaped (shown in figure 13A), such that each of the lead frame parts has a plurality of prongs, and wherein the lead frame parts interlock with each other (this is shown in figure 13A). It would have been obvious to one of ordinary skill in the art to combine Kimura with Lin as this would allow one to maximize the number of LEDs in the device of Lin, and further, would allow for the situation if one LED broke (aka died) that the entire device of Lim would continue to function. Regarding claim 29, Lim and Kimura do not teach: wherein the prongs of the lead frame parts for the electrical parallel connection each contact exactly one of the semiconductor chips. However, this is an obvious modification of Lim and Kimura. One reason one of ordinary skill in the art would reduce the number of LEDs is a business decision. Generally in the course of business it is preferred to have multiple product groups. For example, one will have the low cost, medium cost, and high cost (aka premium). In the low cost product one would include the bare bones minimum amount of LEDs that the business can get away with. In the high cost, the business will add the minimum amount of LEDs to make the product look premium. And, the number of LEDs in the medium cost will be somewhere in between. Therefore, the reduction of LEDs from those presented in Lim and Kimura would have been obvious to one of ordinary skill it the art in order to differentiate product lines. In addition, using Kimura for the lost cost analysis the least amount of LEDs the business might be able to get away with is one per comb tooth, otherwise it might look to cheap for the low cost customer, and potentially impact the business reputation, unless they brand it under another label. Regarding claim 30, Claim 30 is a continuation of the analysis of claim 29 above. Claim(s) 32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lim, over Andy Pai, ESEC 2007 Die Bond, https://www.youtube.com/watch?v=n2w1QpxUqhk, (“YouTube 1”) with support from Watch Learn N’ Play, Semiconductor Packaging – Assembly Process Flow, https://www.youtube.com/watch?v=DiFovfCtvgw, (“YouTube 2”). Regarding claim 32, Lim does not explicitly teach: However, the steps of claim 32 are so well-known that there are YouTube videos on the subject matter. It is Examiner’s position that if the steps of claim 32 were not well known than a company would not want them disclosed at all without many forms of NDA (non-disclosure agreements). However, YouTube 1 and YouTube 2 clearly show the process being claimed. If these process steps are on YouTube then they must be very well-known to one of ordinary skill in the art. Therefore, claim 32 is obvious in light of the prior art above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINCENT WALL whose telephone number is (571)272-9567. The examiner can normally be reached Monday to Thursday at 7:30am to 2:30pm PST. Interviews can be scheduled on Tuesday thru Thursday at 10am PST or 2pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VINCENT WALL/ Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Dec 29, 2023
Application Filed
Feb 27, 2026
Non-Final Rejection — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
62%
Grant Probability
87%
With Interview (+25.4%)
2y 8m
Median Time to Grant
Low
PTA Risk
Based on 793 resolved cases by this examiner. Grant probability derived from career allow rate.

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