Prosecution Insights
Last updated: April 19, 2026
Application No. 18/577,470

WIRING SUBSTRATE, MANUFACTURING METHOD THEREOF, LIGHT-EMITTING SUBSTRATE, AND DISPLAY DEVICE

Non-Final OA §102§103
Filed
Jan 08, 2024
Examiner
OWENS, DOUGLAS W
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE TECHNOLOGY GROUP CO., LTD.
OA Round
1 (Non-Final)
81%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
84%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
265 granted / 328 resolved
+12.8% vs TC avg
Minimal +3% lift
Without
With
+2.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
29 currently pending
Career history
357
Total Applications
across all art units

Statute-Specific Performance

§101
0.6%
-39.4% vs TC avg
§103
35.9%
-4.1% vs TC avg
§102
36.8%
-3.2% vs TC avg
§112
18.0%
-22.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 328 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 2, 20, and 24 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by US Patent Application Publication No. 2020/194468 to Luo. Regarding claim 1, Luo teaches a wiring substrate (Figs. 13 – 14, and 18) comprising: a base substrate (00) comprising a functional region and a bonding region (00 outside of BD); a first conductive layer (M2) on the base substrate and at least in the functional region; a second conductive layer (I2) on a side of the first conductive layer away from the base substrate and at least in the functional region, the second conductive layer being electrically connected to the first conductive layer; and a first insulating layer (30) on a side of the second conductive layer away from the base substrate and comprising a main part and an opening (31), wherein at least one of the first conductive layer and the second conductive layer comprises a plurality of electrodes (20) in the bonding region and extending along a first direction, each of the plurality of electrodes comprises a first end adjacent to the functional region in the first direction, and an orthographic projection of the main part of the first insulating layer on the base substrate at least partially overlaps with an orthographic projection of the first end of each electrode on the base substrate (Fig. 13). Regarding claim 2, Luo teaches a wiring substrate, further comprising a second insulating layer (PLN) between the first conductive layer and the second conductive layer, wherein the second conductive layer is in (electrical) contact with the first conductive layer through a via in the second insulating layer (Fig. 14, I2 is electrically connected through a via and the drain). Regarding claim 20, Luo teaches a wiring substrate, wherein the second conductive layer is arranged only in the functional region, the first conductive layer comprises a third part arranged in the bonding region, the third part comprises a plurality of second electrodes extending along the first direction, and each of the plurality of second electrodes comprises the first end (Fig. 13). Regarding claim 24, Luo teaches a display device comprising the wiring substrate (¶ [0081]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 23 and 25 are rejected under 35 U.S.C. 103 as being unpatentable over Luo. Regarding claim 23, Luo teaches a light-emitting substrate (Display substrate ¶ [0081] that includes a circuit board (300) arranged in the bonding region. Luo does not explicitly teach a plurality of light-emitting elements in the functional region. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to include a plurality of light-emitting elements for the display device since it is desirable for display devices to produce visible images. Regarding claim 25, Luo teaches a method of manufacturing a wiring substrate (Figs. 13, 14, and 18) comprising: providing a base substrate (00) comprising a functional region (00 outside of BD) and a bonding region (BD); applying a first conductive film (M2) on the base substrate to form a first conductive layer which is at least in the functional region; applying a second conductive film (I2) on a side of the first conductive layer away from the base substrate, to form a second conductive layer which is at least in the functional region and electrically connected to the first conductive layer; and applying a first insulating film (30) on a side of the second conductive layer away from the base substrate to form a first insulating layer comprising a main part and an opening, wherein at least one of the first conductive layer and the second conductive layer comprises a plurality of electrodes (20) in the bonding region and extending along a first direction, each of the plurality of electrodes comprises a first end adjacent to the functional region in the first direction, and an orthographic projection of the main part of the first insulating layer on the base substrate at least partially overlaps with an orthographic projection of the first end of the each electrode on the base substrate. Luo does not teach patterning the first and second conductive films and the first insulating film through first, second, and third masks. Luo does not teach or suggest a method of patterning these elements. Elements are frequently formed in the art through the well known process of photolithography involving the use of photoresist and masks. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to use a well known and commonly used method of patterning the layers since it is desirable to use known and reliable techniques for forming devices. Allowable Subject Matter Claims 3, 4, 6, 7, 9 – 12, 14 – 16, 18, 21, and 22 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Patent Application Publication No. 2020/0100365 to Titjung et al. teach a wiring substrate including a base substrate, first conductive layer and plurality of electrodes. Titjung et al. do not teach an orthographic projection of the main part of a first insulating layer on the base substrate at least partially overlaps an orthographic projection of the first end of each electrode. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS W OWENS whose telephone number is (571)272-1662. The examiner can normally be reached M-F 5:30-1:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached at 571-270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. DOUGLAS W. OWENS, Esq. Primary Patent Examiner Art Unit 2897 /DOUGLAS W OWENS/Primary Patent Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Jan 08, 2024
Application Filed
Mar 11, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12593716
SUBSTRATE ASSEMBLY AND ELECTRONIC DEVICE INCLUDING THE SAME
2y 5m to grant Granted Mar 31, 2026
Patent 12588538
SEMICONDUCTOR DEVICE HAVING WIRED UNDER BUMP STRUCTURE AND METHOD THEREFOR
2y 5m to grant Granted Mar 24, 2026
Patent 12581937
INTEGRATED DEVICE COMPRISING METALLIZATION INTERCONNECTS
2y 5m to grant Granted Mar 17, 2026
Patent 12564085
MICROELECTRONIC ASSEMBLY WITH UNDERFILL FLOW CONTROL
2y 5m to grant Granted Feb 24, 2026
Patent 12563882
ELECTRONIC DEVICE
2y 5m to grant Granted Feb 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
81%
Grant Probability
84%
With Interview (+2.8%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 328 resolved cases by this examiner. Grant probability derived from career allow rate.

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