DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
Figure 1a and Figure 1b should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “300” has been used to designate both “circuit board” and “second substrate layer”. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 11 – 16, 18 – 20 and 22 – 29 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 2022/0039261) in view of Shimizu (US 2012/086861 A1).
Regarding Claim 1, Hwang (US 2022/0039261) discloses a circuit board (Fig 3,11) comprising: a first insulating layer (114); a second insulating layer (111) disposed on the first insulating layer (114) and including a first through hole (opening in 111 at C); a third insulating layer (113) disposed on the second insulating layer (111) and including a second through hole (opening in 113 at C); a circuit part (part or portion about 131,133,122; note that the claim has not structurally limited this claimed portion or region or “part”) disposed on the second insulating layer (111); a protective insulating layer (350) disposed on the third insulating layer (113); and an electronic device (210) disposed in the first through hole (at C), wherein the first through hole (opening in 111 at C) overlaps the second through hole (opening in 113 at C) in a vertical direction, wherein the second insulating layer (111) includes a first inner wall (wall of 111 at C) forming the first through hole and having a first inclination angle (see Fig 3,11 showing an angled surface) with respect to an upper surface of the first insulating layer (114), wherein the third insulating layer (113) includes a second inner wall (wall of 113 at C) forming the second through hole and having a second inclination angle (see Fig 3,11 showing an angled surface), wherein the circuit part (part or portion about 122 in 113; note that the claim has not structurally limited this claimed portion or region or “part”) includes a wiring portion (part or portion about 122 in 113; note that the claim has not structurally limited this claimed “portion” or region or part) non-overlapping with the first inner wall (wall of 111 at C) in a horizontal direction (left-right direction of Fig 11) and overlapping the second inner wall (122 overlaps wall in 113 at C) in the horizontal direction, wherein the electronic device (210) overlaps along the horizontal direction with the wiring portion (210 overlaps 122 in 113) and a contact portion (210 overlaps a portion or region or area where the wall of 111 at C contacts the wall of 113 at C; note that the claim has not structurally limited this claimed “portion” or region or part) that the first inner wall and the second inner wall are in contact (portion or region or area where wall of 111 at C contacts wall of 113 at C).
Hwang does not disclose wherein the third insulating layer includes a second inner wall forming the second through hole and having a second inclination angle greater than the first inclination angle with respect to the upper surface of the first insulating layer.
Shimizu (US 2012/086861 A1) teaches of a circuit board (Fig 31) wherein a third insulating layer (100a) includes a second inner wall (at C11) forming a second through hole (aperture at cavity R10; see Fig 1 for an analogous cavity R10) and having a second inclination angle (angle on the opposite side of C11 from ɵ21) greater than (see Fig 31; [0174]; as seen in Fig 31, angle at F12 is smaller than the angle at C11) a first inclination angle (angle on the opposite side of F12 from ɵ22) with respect to an upper surface of a first insulating layer (102).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the board as disclosed by Hwang, wherein the third insulating layer includes a second inner wall forming the second through hole and having a second inclination angle greater than the first inclination angle with respect to the upper surface of the first insulating layer as taught by Shimizu, in order to suppress cracking, make it easier to place an electronic device and easier to align an electronic device (Shimizu, [0104,0113,0123-0131,0140,0174]).
Regarding Claim 11, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 1, further comprising: a metal layer (140; [0074]) disposed between the first insulating layer (114) and the second insulating layer (111), wherein the metal layer (140) extends along the horizontal direction to an outside of the first inner wall (wall of 111 at C).
Regarding Claim 12, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 11, wherein the metal layer (140) overlaps the second through hole (opening in 113 at C) in the vertical direction.
Regarding Claim 13, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 1, wherein the first insulating layer (114), the second insulating layer (111), and the third insulating layer (113) are provided of a same material ([0087]).
Regarding Claim 14, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 1, wherein the electronic device (210) overlaps the first inner wall (wall of 111 at C) and the second inner wall (wall of 113 at C) in the horizontal direction.
Regarding Claim 15, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 14, wherein the electronic device (210) is spaced apart (see Fig 11 showing a gap between 210 and wall of C) from the first inner wall (wall of 111 at C) and the second inner wall (wall of 113 at C) in the horizontal direction.
Regarding Claim 16, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 15, further comprising: a burying insulating layer (311; [0107]) that buries the first through hole (opening in 111 at C), the second through hole (opening in 113 at C), and the electronic device (210).
Regarding Claim 18, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 1, wherein the circuit part (part or portion about 131,133,122; note that the claim has not structurally limited this claimed portion or region or “part”) further includes: a first via electrode (131) passing through at least a portion of the second insulating layer (111) connected to a lower surface (lower surface of 122) of the wiring portion (part or portion about 122 in 113; note that the claim has not structurally limited this claimed “portion” or region or part), and a second via electrode (133) passing through at least a portion of the third insulating layer (113) connected to an upper surface (upper surface of 122) of the wiring portion (122), wherein the first via electrode (131) and a portion of the second via electrode (133) overlap the electronic device (210) in the horizontal direction.
Regarding Claim 19, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang does not disclose the circuit board of claim 1, wherein the first inclination angle ranges from 91 degrees to 110 degrees, and wherein the second inclination angle ranges from 115 degrees to 150 degrees.
Shimizu seemingly teaches the circuit board (Fig 31) of claim 1, wherein the first inclination angle (angle at F12) ranges from 91 degrees to 110 degrees (as seen in Fig 31, angle at F12 is greater than 90 degrees [0100,0101,0131]), and wherein the second inclination angle (angle at C11 is shown greater than the angle at F12) ranges from 115 degrees to 150 degrees ([0100,0101,0131]).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the board as taught by Hwang in view of Shimizu, wherein the first inclination angle ranges from 91 degrees to 110 degrees, and wherein the second inclination angle ranges from 115 degrees to 150 degrees, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art, in order to suppress cracking, make it easier to place an electronic device and easier to align an electronic device (Shimizu, [0104,0113,0123-0131,0140,0174]). In re Aller, 105 USPQ 233.
Regarding Claim 20, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 1, wherein a vertical thickness (as seen in Fig 11, thickness of 111 is greater than the thickness of 113) of a portion (part or region of 111) of the second insulating layer (111) having the first inclination angle is greater than a vertical thickness of a portion (part or region of 113) of the third insulating layer (113) having the second inclination angle.
Regarding Claim 22, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 1, further comprising: a metal layer (140,123,123b; [0084]) disposed between the first insulating layer (114) and the electronic device (210) in the first through hole, and an adhesive member (250; [0106]; see also Fig 12) disposed between the metal layer (123b) and the electronic device (210).
Regarding Claim 23, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 1, wherein a width (see Fig 3,11) of the first and second through holes (at C) in the horizontal direction gradually becomes narrower toward the first insulating layer (114).
Shimizu further teaches the circuit board (Fig 31) of claim 1, wherein a width (see Fig 1,31) of the first and second through holes in the horizontal direction gradually becomes narrower toward the first insulating layer (102).
Regarding Claim 24, Hwang discloses a circuit board (Fig 3,11) comprising: a first insulating layer (114); a second insulating layer (111) disposed on the first insulating layer (114) and including a first through hole (opening in 111 at C); a third insulating layer (113) disposed on the second insulating layer (111) and including a second through hole (opening in 113 at C); a circuit layer (layer about 122) disposed between the second insulating layer (111) and the third insulating laver (113); and an electronic device (210) disposed in the first through hole (at C), wherein the first through hole (opening in 111 at C) overlaps the second through hole (opening in 113 at C) in a vertical direction, wherein the second insulating layer (111) includes a first inner wall (wall of 111 at C) forming the first through hole and having a first inclination angle (see Fig 3,11 showing an angled surface) with respect to an upper surface of the first insulating layer (114), wherein the third insulating layer (113) includes a second inner wall (wall of 113 at C) forming the second through hole and having a second inclination angle (see Fig 3,11 showing an angled surface), and wherein the electronic device (210) is overlapped along a horizontal direction with the circuit layer (layer about 122) and a contact portion (210 overlaps a portion or region or area where the wall of 111 at C contacts the wall of 113 at C; note that the claim has not structurally limited this claimed “portion” or region or part) in which the first inner wall and the second inner wall are in contact (portion or region or area where wall of 111 at C contacts wall of 113 at C).
Hwang does not disclose wherein the third insulating layer includes a second inner wall forming the second through hole and having a second inclination angle different than the first inclination angle with respect to the upper surface of the first insulating layer.
Shimizu (US 2012/086861 A1) teaches of a circuit board (Fig 31) wherein a third insulating layer (100a) includes a second inner wall (at C11) forming a second through hole (aperture at cavity R10; see Fig 1 for an analogous cavity R10) and having a second inclination angle (angle on the opposite side of C11 from ɵ21) greater than (see Fig 31; [0174]; as seen in Fig 31, angle at F12 is smaller than the angle at C11) a first inclination angle (angle on the opposite side of F12 from ɵ22) with respect to an upper surface of a first insulating layer (102).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the board as disclosed by Hwang, wherein the third insulating layer includes a second inner wall forming the second through hole and having a second inclination angle different than the first inclination angle with respect to the upper surface of the first insulating layer as taught by Shimizu, in order to suppress cracking, make it easier to place an electronic device and easier to align an electronic device (Shimizu, [0104,0113,0123-0131,0140,0174]).
Regarding Claim 25, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Shimizu further teaches the circuit board (Fig 31) of claim 24, wherein the first inclination angle is smaller than (see Fig 31; [0174]; as seen in Fig 31, angle at F12 is smaller than the angle at C11) the second inclination angle.
Regarding Claim 26, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang does not disclose the circuit board of claim 25, wherein the first inclination angle ranges from 91 degrees to 110 degrees, and wherein the second inclination angle ranges from 115 degrees to 150 degrees.
Shimizu seemingly teaches the circuit board (Fig 31) of claim 1, wherein the first inclination angle (angle at F12) ranges from 91 degrees to 110 degrees (as seen in Fig 31, angle at F12 is greater than 90 degrees [0100,0101,0131]), and wherein the second inclination angle (angle at C11 is shown greater than the angle at F12) ranges from 115 degrees to 150 degrees ([0100,0101,0131]).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the board as taught by Hwang in view of Shimizu, wherein the first inclination angle ranges from 91 degrees to 110 degrees, and wherein the second inclination angle ranges from 115 degrees to 150 degrees, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art, in order to suppress cracking, make it easier to place an electronic device and easier to align an electronic device (Shimizu, [0104,0113,0123-0131,0140,0174]). In re Aller, 105 USPQ 233.
Regarding Claim 27, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 25, wherein the electronic device (210) overlaps the first inner wall (111 at C), the second inner wall (113 at C), and the circuit layer (layer at 122) in the horizontal direction.
Regarding Claim 28, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 27, wherein a vertical thickness (as seen in Fig 11, thickness of 111 is greater than the thickness of 113) of a portion (part or region of 111) of the second insulating layer (111) having the first inclination angle is greater than a vertical thickness of a portion (part or region of 113) of the third insulating layer (113) having the second inclination angle.
Regarding Claim 29, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang further discloses the circuit board (Fig 3,11) of claim 27, further comprising: a metal layer (140; [0074]) disposed between the first insulating layer (114) and the second insulating layer (111), and wherein the metal layer (140) extends along the horizontal direction to an outside of the first inner wall (wall of 111 at C).
Claim(s) 17 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 2022/0039261) in view of Shimizu (US 2012/086861 A1) as applied to claim 16 above and further in view of Furutani (US 2019/0104615 A1; herein referenced as “Furutani’615”).
Regarding Claim 17, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang does not disclose the circuit board of claim 16, wherein the burying insulating layer is provided of a material different from a material of the first insulating layer, the second insulating layer, and the third insulating layer.
Furutani (US 2019/0104615 A1; herein referenced as “Furutani’615”) teaches of a circuit board (Fig 1) wherein a burying insulating layer (30) is provided of a material different (Abstract, [0005,0021,0030], claim 1) from a material of a first insulating layer (21), a second insulating layer (21,13), and a third insulating layer (21).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the board as taught by Hwang in view of Shimizu, wherein the burying insulating layer is provided of a material different from a material of the first insulating layer, the second insulating layer, and the third insulating layer as taught by Furutani’615, in order to provide a material that ensures filling spaces between a component and board, provide a material with desired coefficient of expansion, provide a material with a desired elastic modulus, and ensure reliable filling (Furutani’615, [0020-0022,0030,0040-0042]) and furthermore since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice, in order to provide a material that ensures filling spaces between a component and board, provide a material with desired coefficient of expansion, provide a material with a desired elastic modulus, and ensure reliable filling. In re Leshin, 125 USPQ 416. Please note that in the instant application, page 43 [0205] “but is not limited thereto”, applicant has not disclosed any criticality for the claimed limitations.
Claim(s) 21 is rejected under 35 U.S.C. 103 as being unpatentable over Hwang (US 2022/0039261) in view of Shimizu (US 2012/086861 A1) as applied to claim 20 above and further in view of Furutani (US 2013/0256007 A1; herein referenced as “Furutani’007”).
Regarding Claim 21, Hwang in view of Shimizu teaches the limitations of the preceding claim.
Hwang does not explicitly disclose the circuit board of claim 20, wherein the vertical thickness of the portion of the second insulating layer having the first inclination angle is between 1.5 and 30 times the vertical thickness of the portion of the third insulating layer having the second inclination angle.
Furutani (US 2013/0256007 A1; herein referenced as “Furutani’007”) teaches of a circuit board (Fig 1), wherein a vertical thickness ([0160-0165]) of the portion of a second insulating layer (100) is between 1.5 and 30 times a vertical thickness of the portion of a third insulating layer (101).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to modify the board as taught by Hwang in view of Shimizu, wherein the vertical thickness of the portion of the second insulating layer is between 1.5 and 30 times the vertical thickness of the portion of the third insulating layer as taught by Furutani’007, in order to provide satisfactory protection around an embedded component, provide sufficient surrounding material around an embedded component, such that the combination of Hwang in view of Shimizu and Furutani’007 would teach the vertical thickness of the portion of the second insulating layer having the first inclination angle is between 1.5 and 30 times the vertical thickness of the portion of the third insulating layer having the second inclination angle.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Otsubo (US 2014/0030471 A1) teaches of a circuit board (Fig 1) comprising: a first insulating layer (2); a second insulating layer (2) disposed on the first insulating layer and including a first through hole (at 9); a third insulating layer (2) disposed on the second insulating layer and including a second through hole; and an electronic device (3) disposed in the first through hole, wherein the first through hole overlaps the second through hole in a vertical direction, wherein the second insulating layer includes a first inner wall forming the first through hole and having a first inclination angle (side surface of inner wall of middle 2 has an angled surface wall at 9) with respect to an upper surface of the first insulating layer, wherein the third insulating layer includes a second inner wall (side surface of inner wall of second-highest 2 has an angled surface wall at 9) forming the second through hole and having a second inclination angle greater (see second highest 2 has a great angle at inner wall than the middle layer 2 below) than the first inclination angle with respect to the upper surface of the first insulating layer. This could be used in a 103 Rejection.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROSHN K VARGHESE whose telephone number is (571)270-7975. The examiner can normally be reached M-Th: 900 am-300 pm.
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/ROSHN K VARGHESE/Primary Examiner, Art Unit 2847
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