DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawing Objections
Examiner withdraws the previous drawing objections based upon the submission of new figures, amendments to the specification, and the cancelation of claim 11.
The drawings are objected to because:
Regarding claim 1, and claim 12, the claimed subject matter “source-drain doped regions in the substrate on two sides of each gate structure” is not shown in the drawings.
Applicant in the remarks dated June 11, 2026 states that this is shown in figure 3. Figure 3 does not show a source-drain doped region in the substrate on two sides of each gate structure. Figure 3 shows a single source-drain doped region in the substrate between two gate structure, i.e. in the middle of two gate structures. The claim requires a source-drain doped region on each side of the gate structure. For figure 3 this would mean that there needs to be three (3) 140, so that each 140 is on the two sides of each gate structure.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification Objections
Examiner withdraws some of the previous specification objections based upon Applicant’s amendment to the specification.
The disclosure is objected to because of the following informalities:
¶¶ 0033-41 describe the prior art. Therefore, these paragraphs need to moved to the Background section of the specification.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3, 5, 12, 17, 19, and 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jiquan (CN 109427677 A) (“Jiquan”) by means of machine translation, in view of Gu et al. (US 2020/0013678 A1) (“Gu”).
Regarding claims 1 and 12, Jiquan teaches at least in figure 17:
a substrate (200);
gate structures (210/211) on the substrate (200);
source-drain doped regions (208) in the substrate (200) on two sides of each gate structure (210/211);
a bottom dielectric layer (209) between adjacent gate structures (210/211) and covering the source-drain doped regions (209 covers 208 in the same manner shown in Applicant’s figures);
liner metal layers (217) on top surfaces of the gate structures (210/211) and in contact with the gate structures (210/211),
wherein the liner metal layers (217) are made of a material including a pure metal (pg. 8 at ¶ 7-8);
a top dielectric layer (212) on the bottom dielectric layer (209) and covering the liner metal layers (217); and
gate plugs (223/224), penetrating through the top dielectric layer (212) and in contact with the liner metal layers (217).
Jiquan does not teach:
wherein a projection of the top dielectric layer onto the substrate at least partially overlaps with a projection of the liner metal layers onto the substrate.
This is because Jiquan teaches the linear metal layer (217) sidewalls are coplanar with the gate plugs, and therefore, the top dielectric layer (212) does not overlap with it.
However, Gu teaches at least in figures 7-8:
wherein a projection of the top dielectric layer (110) onto the substrate (120) at least partially overlaps with a projection of the liner metal layers (130) onto the substrate (120).
It would have been obvious to one of oridnray skill in the art to modify the liner metal layers of Jiquan as shown in Gu because by having the liner metal layers extend past the gate plug one would be able to accept more positional error in overlay. This would allow one to use less expensive, older, lithography machines which do not have as tight overlay tolerances as newer, more expensive, lithography machines. Because the liner metal layer extends past the gate plug one does not need to be as precise with the manufacturing step of forming the gate plugs.
Regarding claim 3, Jiquan teaches at least in figure 17:
a thickness of the liner metal layers (217) is about 1.5 nm to about 3 nm (pg. 10 at last ¶, where the thickness is 10 angstroms, 1nm, to 50 angstroms, 5nm).
Regarding claims 5, and 17, Jiquan teaches at least in figure 17:
the gate plugs (223/224) are made of a material same as the liner metal layers (pg. 9 at ¶ 5, where 217 and 223/224 are all metals. Jiquan does not state the material of 223/224. However, since 217 and 224/224 are all metals, it would have been obvious that they would be the same metal.).
Regarding claim 19, Jiquan teaches at least in figure 17:
wherein forming the gate plugs (223/224) includes (detailed below):
forming gate contact holes (216) penetrating through the top dielectric layer (this is shown in figure 15),
wherein the gate contact holes (216) expose the liner metal layers (217 in figure 15); and
forming gate plugs (223/224) in the gate contact holes (216) using the first selective deposition process (the process to form 223/224),
wherein the gate plugs (223/224) are in contact with the liner metal layers (217).
Regarding claim 23, Gu teaches at least in figures 7-8:
wherein the top dielectric layer (detailed below) further includes a first etch stop layer (112) located between the bottom dielectric layer (114) and the first dielectric layer (116), and
between the liner metal layers (118) and the first dielectric layer (114) (¶ 0041, where one can choose suitable material for 112/114/116 such that the etch selectivity between the material renders 112 acting like an etch stop layer).
Claim(s) 2, 6-7, 10, 13, 18, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jiquan, in view of Gu, in view of Cheng et al. (US 10,946,792 B1) (“Cheng”).
Regarding claims 2 and 13, Jiquan does not teach:
the liner metal layers are made of a material including W, Ru, or Mo.
Cheng teaches at least in figure 2:
the liner metal layers (246B) are made of a material including W, Ru, or Mo (col. 11 at line 2).
It would have been obvious to one of ordinary skill in the art to combine Cheng with Jiquan and use the materials of the liner metal layer of Song as Song evidences that the material are art recognized as being suitable for the intended purpose of being a liner metal layer on top of a gate. MPEP 2144.07.
Regarding claims 6 and 18,
the gate plugs (Jiquan 223/224) are made of a material including one or more of W or Ru (based upon the Analysis in claim 5 below it would have been obvious that 223/224 of Jiquan are made out of the same material as 246B of Cheng. Said material would be W).
Regarding claim 7,
the gate structures (211) are metal gate structures (Jiquan pg. 7 at ¶ 2); and
one metal gate structure includes a work function layer (234B) , or includes a metal electrode layer (238B) and a work function (234B) layer located on a bottom and sidewalls of the metal electrode layer (238A) (Col 14 at lines 42-47 where the material of 234A is disclosed; Col. 15 at lines 46-56, where the materials of 238B are disclosed).
Regarding claim 8,
the work function layer is made of a material including one or more of TiA, TaAIN, TiAIN, MoN, TaCN, AIN, Ta, TiN, TaN, TaSiN, or TiSiN (Col 14 at lines 42-47 where the material of 234B is disclosed); and
the metal electrode layer is made of a material including one or more of W, Al, Cu, Ag, Au, Pt, Ni, or Ti (Col. 15 at lines 46-56, where the materials of 238A are disclosed).
Regarding claim 10, the combination of references teaches:
the top dielectric layer (Jiquan 212) includes:
a first dielectric layer (Jiquan a part of 212) on the bottom dielectric layer (Jiquan 209) and covering the liner metal layers (Jiquan 217); and
a second dielectric layer (Jiquan a second part of 212) on the first dielectric layer (Jiquan a part of 212);
the semiconductor structure further includes (detailed below):
source-drain interconnection layers (Cheng 235A) which penetrate through the bottom dielectric layer (Cheng 230) and the first dielectric layer (Cheng 232) on tops of the source-drain doped regions (105/236), and are in contact with the source-drain doped region (105/236); and s
source-drain plugs (248A/246A), penetrating through the second dielectric layer (240) and in contact with the source-drain interconnection layers (235A).
Regarding claim 20, Cheng teaches at least in figure 2:
the first selective deposition process includes a selective chemical vapor deposition process (col. 11 at lines 42)..
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jiquan, in view of Gu, in view of Cheng, in view of Ilg et al. (US 6,130,145) (“Ilg”).
Regarding claim 4, Jiquan does not teach:
the liner metal layers (Jiquan 217; Cheng 246A) include flourine element (WF6; pg. 7 at ¶ 2).
Cheng teaches at least in figure 2:
That the W liner metal layer is formed using fluorine WF6 ( (col. 11 at lines 5-15).
Ilg teaches:
That W can be formed using a precursor of WF6 or WCl6 Col. 4 at lines 60-65.
According to Applicant’s specification the at ¶¶ 0081-83, the chlorine gets into the tungsten by means of using chlorine as a part of the reactant for W deposition. Iig teaches that WCl6 is an obvious variant to WF6 for forming W deposits. Thus, one of ordinary skill in the art would know they could substitute one version of W precursor for another.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jiquan, in view of Gu, in view of Cheng, in view of Ando et al. (US 2013/0009257 A1) (“Ando”)
Regarding claim 9, Jiquan and Cheng do not clearly teach:
gate spacers on sidewalls of the gate structures; and
gate dielectric layers between the gate structures and the substrate.
Ando teaches:
gate spacers (62) on sidewalls of the gate structures (54-56); and
gate dielectric layers (49-50) between the gate structures (54-56) and the substrate (8).
It would have been obvious to one of ordinary skill in the art to combine Ando with the previous prior art because adding gate spaces and gate dielectric layers as claimed is routine in the art. The gate dielectric layers are standard transistor elements of the gate, and the sidewall spacers allow for one to the well-known replacement gate process.
Claim(s) 14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jiquan, in view of Gu, in view of Cheng, in view of Ilg, in view of Fu et al. (US 2014/0120723 A1) (“Fu”).
Regarding claims 14-16,
These claims require an ALD process using WCL5 and H2 to form a W layer.
The previous prior art does not teach all of the specifics of this process.
Fu teaches:
That one of ordinary skill in the art can use ALD with hydrogen and WCL5 or WCL6 to form a tungsten film. (¶¶ 0015, and 92)
It would have been obvious to one of ordinary skill in the art to combine Fu with the previous prior art as Fu teaches that WCL5 and WCL6 are obvious variant precursor gases, and the use of hydrogen to form a tungsten film. This appears to be a standard means in the art to form tungsten films.
Response to Arguments
Applicant’s amendments have overcome the previous grounds of rejection. However, upon further consideration, a new ground(s) of rejection is made in view of the previous prior art, in view of Gu.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/VINCENT WALL/ Primary Examiner, Art Unit 2898
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