Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Rejections - 35 USC § 103
1. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
2. A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
3. Claims 1 and 29-47 are rejected under 35 U.S.C. 103 as being unpatentable over Oda et al. (Japanese Patent Publication No. JP 2009-256154 A), hereinafter Oda; in view of Sumida et al. (Japanese Patent Publication No. JP 2012-114263 A), hereinafter Sumida.
4. Regarding Claims 1 and 29-47, Oda teaches (Paragraphs [0002-0028], Figs. 1-4 – component 11) a template substrate. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) a main substrate containing silicon. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) a substrate side surface. Oda teaches (Paragraphs [0002-0028], Figs. 1-4 – component 21) an underlying layer that is located above the main substrate. Oda teaches (Paragraphs [0002-0028], Figs. 1-4 – component 14) a protecting portion overlapping the side surface in a side view. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the protecting portion containing a material different from gallium. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the protecting portion and the underlying layer overlap in a plan view. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the underlying layer includes a seed layer. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the protecting portion and the seed layer overlap in a plan view. Oda teaches (Paragraphs [0002-0028], Figs. 1-4 – component 14) the underlying layer includes a buffer layer located above the main substrate. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the protecting portion and the buffer layer overlap in a plan view. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the protecting portion and the underlying layer overlap in a side view. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) an upper surface of the underlying layer contacts with the protecting portion. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the protecting portion comprises a nitride film containing silicon, an oxide film containing silicon. Oda teaches (Paragraphs [0002-0028], Figs. 1-4 – component 22) a GaN-based semiconductor. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) a distance is secured between an edge of the seed layer and the side surface of the main substrate in a plan view seen in a normal direction of the main substrate. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the side surface comprises a curved surface. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) the protecting portion is in contact with a lower surface of the main substrate. Oda teaches (Paragraphs [0002-0028], Figs. 1-4) a semiconductor substrate comprising a semiconductor part.
5. However, Oda fails to explicitly teach a mask pattern located above the main substrate. Furthermore, Oda fails to explicitly teach a pattern opening portion. Furthermore, Oda fails to explicitly teach an underlying layer that is located above the main substrate and overlaps the mask pattern. Furthermore, Oda fails to explicitly teach the underlying layer includes a seed layer. Furthermore, Oda fails to explicitly teach the protecting portion and the seed layer overlap in a plan view. Furthermore, Oda fails to explicitly teach the underlying layer includes a seed layer and a buffer layer located between the main substrate and the seed layer. Furthermore, Oda fails to explicitly teach the mask pattern comprises a mask portion comprising the protecting portion. Furthermore, Oda fails to explicitly teach the mask pattern comprises a mask portion. Furthermore, Oda fails to explicitly teach the protecting portion comprises a material different from the mask portion. Furthermore, Oda fails to explicitly teach the mask pattern comprises a mask portion overlapping the side surface in a side view. Furthermore, Oda fails to explicitly teach the mask portion is constituted of a processing film of the main substrate. Furthermore, Oda fails to explicitly teach the opening portion has a longitudinal shape, and
a distance is secured between a tip of the opening portion and the side surface of the main substrate in a plan view seen in a normal direction of the main substrate. Furthermore, Oda fails to explicitly teach the protecting portion covers at least part of the edge of the mask portion. Furthermore, Oda fails to explicitly teach a semiconductor part located above the mask pattern. Furthermore, Oda fails to explicitly teach the opening portion overlaps the semiconductor part in a plan view seen in a normal direction of the main substrate.
6. Oda teaches (Paragraph [0001]) a semiconductor crystal growth substrate for growing a semiconductor layer composed of a nitride-based compound semiconductor crystal. Sumida teaches (Paragraph [0001]) semiconductor element and a method for manufacturing the same, and in particular, is suitable for application to a semiconductor element using a gallium nitride (GaN)-based semiconductor. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) a mask, therein growth mask, pattern located above the main substrate, therein a Si substrate. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) a pattern opening portion. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) an underlying layer that is located above the main substrate and overlaps the mask pattern. Sumida teaches (Paragraph [0031]) a thickness of the protecting portion is greater than a thickness of the mask portion. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the underlying layer includes a seed layer, therein a GaN film. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the protecting portion and the seed layer overlap in a plan view. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the underlying layer includes a seed layer and a buffer layer, therein an AlN film, located between the main substrate and the seed layer. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the mask pattern comprises a mask portion, therein growth mask, comprising the protecting portion. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the mask pattern comprises a mask portion. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the protecting portion comprises a material different from the mask portion. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the mask pattern comprises a mask portion overlapping the side surface in a side view. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the mask portion is constituted of a processing film of the main substrate. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the opening portion has a longitudinal shape. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) a distance is secured between a tip of the opening portion and the side surface of the main substrate in a plan view seen in a normal direction of the main substrate. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the protecting portion covers at least part of the edge of the mask portion. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) a semiconductor part located above the mask pattern. Sumida teaches (Paragraph [0003, 0020, and 0091-0094]) the opening portion overlaps the semiconductor part in a plan view seen in a normal direction of the main substrate. Sumida teaches (Paragraph [0007-0010]) the method therein suppressing stress and cracking in the semiconductor layer resulting from curvature of the substrate.
7. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Oda to incorporate the teachings of Sumida to teach a mask pattern located above the main substrate; a pattern opening portion; an underlying layer that is located above the main substrate and overlaps the mask pattern; the underlying layer includes a seed layer; the protecting portion and the seed layer overlap in a plan view; the underlying layer includes a seed layer and a buffer layer located between the main substrate and the seed layer; the mask pattern comprises a mask portion comprising the protecting portion; the mask pattern comprises a mask portion; the protecting portion comprises a material different from the mask portion; the mask pattern comprises a mask portion overlapping the side surface in a side view; the mask portion is constituted of a processing film of the main substrate; the opening portion has a longitudinal shape; a distance is secured between a tip of the opening portion and the side surface of the main substrate in a plan view seen in a normal direction of the main substrate; the protecting portion covers at least part of the edge of the mask portion; a semiconductor part located above the mask pattern; the opening portion overlaps the semiconductor part in a plan view seen in a normal direction of the main substrate. Doing so would result in suppressing stress and cracking in the semiconductor layer, as recognized by Sumida.
Conclusion
8. Any inquiry concerning this communication should be directed to RICHARD D CHAMPION at telephone number (571) 272-0750. The examiner can normally be reached on 8 a.m. - 5 p.m. Mon-Fri EST.
9. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, KEITH D HENDRICKS can be reached at (571) 272-1401. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Keith D. Hendricks/Supervisory Patent Examiner, Art Unit 1733
/R.D.C./Examiner, Art Unit 1737
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