Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18582591 filed on 02/20/2024.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election with traverse of claims 1-6, 8-20 in the reply filed on 5/25/2026 is acknowledged.
The restriction requirement between species I and III is withdrawn in view of applicant argument.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Allowable subject matter
Claims 8-9, 20 are objected to as being dependent upon a rejected base claim (independent claim 1), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Obata et al. (US 2021/0151429).
With respect to dependent claim 8, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the interlayer dielectric film includes a gate oxide film provided between the gate runner and the semiconductor substrate”.
With respect to dependent claim 9, the cited prior art does not anticipate or make obvious, inter alia, the step of: “wherein the gate runner is provided below the conductive wiring portion with the interlayer dielectric film being sandwiched between the gate runner and the conductive wiring portion”.
With respect to dependent claim 20, the cited prior art does not anticipate or make obvious, inter alia, the step of: “a protective film provided to be spaced apart from the solder layer, above the front surface side electrode”.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the limitation “wherein a contact region between the front surface side electrode and the interlayer dielectric film covers the PN junction, in a top view” must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-6, 10-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Obata et al. (US 2021/0151429).
Regarding independent claim 1, Obata et al. teach a semiconductor device comprising:
an active portion (Fig. 2, element 120, paragraph 0036) which is provided in a semiconductor substrate (Fig. 5, element 10, paragraph 0035);
a temperature sensing portion (Fig. 5, element 178, paragraph 0055) which has a PN junction (Fig. 5, elements 186 & 184, paragraph 0079) provided above the semiconductor substrate;
an interlayer dielectric film (Fig. 5, element 38, paragraph 0082) provided above the semiconductor substrate; and
a front surface side electrode (Fig. 5, element 181, paragraph 0079) provided above the interlayer dielectric film,
wherein a contact region (Figs. 2-3, 5) between the front surface side electrode and the interlayer dielectric film covers the PN junction, in a top view.
Regarding claim 2, Obata et al. teach a conductive wiring portion (Fig. 5, element 48-5, paragraph 0072) electrically connected to the temperature sensing portion, inside the interlayer dielectric film.
Regarding claim 3, Obata et al. teach wherein the interlayer dielectric film has a first dielectric layer provided on a lower surface of the conductive wiring portion (Fig. 5, lower portion of 38 below element 48-5), and a second dielectric layer (Fig. 5, upper portion of 38 above element 48-5) provided on an upper surface of the conductive wiring portion.
Regarding claim 4, Obata et al. teach wherein the conductive wiring portion extends in a predetermined direction, and an entire periphery of a cross section of the conductive wiring portion is covered with the interlayer dielectric film which is non-doped (Fig. 5).
Regarding claim 5, Obata et al. teach wherein a cross sectional area of the PN junction is smaller than a cross sectional area of the conductive wiring portion (Figs. 3 & 5).
Regarding claim 6, Obata et al. teach a gate runner (Fig. 3, element 48-4a, paragraph 0074) electrically connected to a gate pad (Fig. 3, element 50, paragraph 0064) of the active portion, wherein the gate runner is provided to at least partially overlap the conductive wiring portion, in the top view (Fig. 3).
Regarding claim 10, Obata et al. teach wherein the conductive wiring portion has a first wiring (Fig. 5, left side 48-5) which is connected to one end of the temperature sensing portion, and which extends in a predetermined direction inside the interlayer dielectric film; and a second wiring (Fig. 5, right side 48-5) which is connected to another end of the temperature sensing portion, and which extends in a predetermined direction inside the interlayer dielectric film.
Regarding claim 11, Obata et al. teach wherein the gate runner is made of polysilicon (paragraph 0064).
Regarding claim 12, Obata et al. teach wherein the second dielectric layer covers an upper surface of the temperature sensing portion (Fig. 5).
Regarding claim 13, Obata et al. teach wherein the conductive wiring portion is made of polysilicon (paragraph 0064).
Regarding claim 14, Obata et al. teach wherein the conductive wiring portion is made of polysilicon (paragraph 0064).
Regarding claim 15, Obata et al. teach wherein the conductive wiring portion is made of polysilicon (paragraph 0064).
Regarding claim 16, Obata et al. teach wherein the conductive wiring portion is made of a metal material (paragraph 0064).
Regarding claim 17, Obata et al. teach wherein the conductive wiring portion is made of a metal material (paragraph 0064).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Obata et al. (US 2021/0151429) in view of Hoshi et al. (US 2020/0395456).
Regarding claim 18, Obata et al. teach all of the limitations as discussed above.
Obata et al. do not explicitly disclose a plating film provided on an upper surface of the front surface side electrode, wherein a contact region between the plating film and the front surface side electrode covers the temperature sensing portion, in the top view.
Hoshi et al. teach a semiconductor device comprising a plating film (Fig. 2, element 47b, paragraph 0122) provided on an upper surface of the front surface side electrode (Fig. 2, element 22, paragraph 0063). Obata et al. modified by Hoshi et al . would teach wherein a contact region between the plating film and the front surface side electrode covers the temperature sensing portion, in the top view (Figs. 2-3, 5 of Obata and Fig. 5 of Hoshi).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Obata et al. according to the teachings of Hoshi et al. with the motivation to provide lower resistance and faster electrical signal.
Regarding claim 19, Obata et al. modified by Hoshi et al. teach a solder layer (paragraph 0097) which is provided on an upper surface of the plating film, and which covers an upper side of the temperature sensing portion.
Cited Prior Art
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHAHED AHMED/
Primary Examiner, Art Unit 2813
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