Last updated: July 17, 2026

Application No. 18/582,798

WIRING SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME

Non-Final OA

Filed

Feb 21, 2024

Priority

Aug 02, 2023 — RE 10-2023-0101111

Examiner

WARD, ERIC A

Art Unit

2891

Tech Center

2800 — Semiconductors & Electrical Systems

Assignee

Samsung Electronics Co., Ltd.

OA Round

1 (Non-Final)

Interview Optional

— +13.4% interview lift. Interview already conducted in this application's prosecution history. This examiner has a 78% grant rate with +13.4% interview lift. Since an interview has already been tried, recommend written response with narrowed claims based on precedent claim evolution patterns.

Based on 742 resolved cases, 2023–2026

Examiner Intelligence

WARD, ERIC A View full profile →

Grants 78% — above average

Career Allowance Rate

577 granted / 742 resolved

+9.8% vs TC avg

Moderate +13% lift

Without

With

+13.4%

Interview Lift

resolved cases with interview

Typical timeline

2y 5m

Avg Prosecution

28 currently pending

Career history

768

Total Applications

across all art units

Statute-Specific Performance

§101

0.3%

-39.7% vs TC avg

§103

87.5%

+47.5% vs TC avg

§102

6.0%

-34.0% vs TC avg

§112

3.6%

-36.4% vs TC avg

Black line = Tech Center average estimate • Based on career data from 742 resolved cases

Prosecution Timeline

Feb 21, 2024

Application Filed

May 28, 2026

Non-Final Rejection mailed

Jul 14, 2026

Examiner Interview Summary

Jul 14, 2026

Applicant Interview (Telephonic)

Precedent Cases

Applications granted by this same examiner with similar technology

17/886,533

Patent 12684844

SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THEREOF

3y 11m to grant Granted Jul 14, 2026

18/185,065

Patent 12684793

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

3y 4m to grant Granted Jul 14, 2026

18/462,876

Patent 12684791

SEMICONDUCTOR DEVICE MANUFACTURING METHOD

2y 10m to grant Granted Jul 14, 2026

17/951,708

Patent 12672302

Barrier Structure for Dispersion Reduction in Transistor Devices

3y 9m to grant Granted Jun 30, 2026

18/383,569

Patent 12666609

SEMICONDUCTOR DEVICE WITH PROGRAMMABLE INSULATING LAYER AND METHOD FOR FABRICATING THE SAME

2y 8m to grant Granted Jun 23, 2026

Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.

Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2

Expected OA Rounds

78%

Grant Probability

91%

With Interview (+13.4%)

2y 5m (~1m remaining)

Median Time to Grant

Low

PTA Risk

Based on 742 resolved cases by this examiner. Grant probability derived from career allowance rate.