DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-9, 11, 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Derluyn (USPGPUB DOCUMENT: 2008/0006845, hereinafter Derluyn) in view of Ni (USPGPUB DOCUMENT: 2019/0267470, hereinafter Ni) and Sumiyoshi(USPGPUB DOCUMENT: 2018/0090584, hereinafter Sumiyoshi).
Re claim 1 Derluyn discloses in Fig 2 a semiconductor device comprising: a barrier layer(2) having an upper surface; a channel layer(3) having an upper surface, provided on the barrier layer(2); a silicon nitride film(3) provided on the channel layer(3); a dielectric film(10) provided on the silicon nitride film(3); and a gate electrode(7) provided on the dielectric film(10), wherein a relative dielectric constant(HfO2)[0048] of the dielectric film(10) is higher than a relative dielectric constant of the silicon nitride film(3) (since HfO2 has a higher dielectric constant than silicon nitride, this may be interpreted as wherein a relative dielectric constant of the dielectric film is higher than a relative dielectric constant of the silicon nitride film).
Derluyn does not discloses a semiconductor device comprising: a barrier layer(2) having an upper surface with a nitrogen polarity; a channel layer(3) having an upper surface with a nitrogen polarity, provided on the barrier layer(2); a gate electrode overlying the silicon nitride film
Ni discloses a semiconductor device comprising: a barrier layer(2) having an upper surface with a nitrogen polarity[0007,0023]; a channel layer(3) having an upper surface with a nitrogen polarity, provided on the barrier layer(2)[0007,0023];
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Ni to the teachings of Derluyn in order to benefit large-scale production and utilization of the nitrogen-face polarity gallium nitride epitaxial structure [0014, Ni].
Derluyn and Ni does not discloses a gate electrode overlying the silicon nitride film
Sumiyoshi discloses a gate electrode(28) overlying the silicon nitride film(26 of Sumiyoshi)
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Ni to the teachings of Derluyn in order to have a film that protects the electrode [0002, Sumiyoshi].
Re claim 2 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, wherein the silicon nitride film(3) has a thickness[0008-0011] greater than or equal to 1 nm.
Re claim 3 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, wherein a first capacitance[0005] of the dielectric film(10) is less than or equal to a second capacitance[0005] of the silicon nitride film(3) along a thickness[0008-0011] direction.
Re claim 4 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, wherein a third capacitance[0005] between the upper surface of the barrier layer(2) and a lower surface of the silicon nitride film(3) is less than or equal to a second capacitance[0005] of the silicon nitride film(3) along a thickness[0008-0011] direction.
Re claim 5 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, wherein a third capacitance[0005] between the upper surface of the barrier layer(2) and a lower surface of the silicon nitride film(3) is less than or equal to the first capacitance[0005] of the dielectric film(10) along a thickness[0008-0011] direction.
Re claim 6 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, further comprising: a cap layer including a third nitride semiconductor between the channel layer(3) and the silicon nitride film(3).
Re claim 7 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, wherein the dielectric film(10) includes at least one element selected from a group consisting of hafnium, lanthanum, and zirconium.
Re claim 8 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, wherein the silicon nitride film(3) has a thickness[0008-0011] less than or equal to 10 nm.
Re claim 9 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, further comprising: a first recess[0012] and a second recess[0012] provided in at least the channel layer(3); a first nitride semiconductor layer, provided inside the first recess[0012], and having an electrical resistance[0013] lower than an electrical resistance[0013] of the channel layer(3); a second nitride semiconductor layer, provided in the second recess[0012], and having an electrical resistance[0013] lower than the electrical resistance[0013] of the channel layer(3); a source electrode making an ohmic contact[0006] with the first nitride semiconductor layer; and a drain electrode making an ohmic contact[0006] with the second nitride semiconductor layer.
Re claim 11 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 1, wherein: the silicon nitride film(26 of Sumiyoshi)
is provided between the channel layer and the dielectric film, and the dielectric film is separated from the channel layer by the silicon nitride film.
Re claim 12 Derluyn and Ni and Sumiyoshi disclose the semiconductor device as claimed in claim 6, wherein: the silicon nitride film(26 of Sumiyoshi)
is provided between the cap layer and the dielectric film, and the dielectric film is separated from the cap layer by the silicon nitride film.
Allowable Subject Matter
Claim(s) 10 is/are allowed.
The following is an examiner’s statement of reasons for allowance:
Claim(s) 10 is/are allowed because all prior arts on record either singularly or in combination fail to anticipate or render obvious a semiconductor device comprising: a barrier layer having an upper surface with a nitrogen polarity; a channel layer having an upper surface with a nitrogen polarity, provided on the barrier layer; a silicon nitride film provided on the channel layer; a dielectric film provided on the silicon nitride film; a gate electrode provided on the dielectric film; a first recess and a second recess provided in the channel layer and in the barrier layer; a first nitride semiconductor layer, provided inside the first recess, and having an electrical resistance lower than an electrical resistance of the channel layer; a second nitride semiconductor layer, provided inside the second recess, and having an electrical resistance lower than the electrical resistance of the channel layer; a source electrode making an ohmic contact with the first nitride semiconductor layer; and a drain electrode making an ohmic contact with the second nitride semiconductor layer, wherein a relative dielectric constant of the dielectric film is higher than a relative dielectric constant of the silicon nitride film, the dielectric film includes at least one element selected from a group consisting of hafnium, lanthanum, and zirconium, the silicon nitride film has a thickness greater than or equal to 1 nm, a first capacitance of the dielectric film is less than or equal to a second capacitance of the silicon nitride film along a thickness direction, a third capacitance between the upper surface of the barrier layer and a lower surface of the silicon nitride film is less than or equal to the second capacitance of the silicon nitride film along a thickness direction, and the third capacitance less than or equal to the first capacitance, in combination with the rest of claim limitations as claimed and defined by the Applicant.
In the reference of record Derluyn (USPGPUB DOCUMENT: 2008/0006845) discloses in Fig 2 a semiconductor device comprising: a barrier layer(2) having an upper surface with a nitrogen polarity; a channel layer(3) having an upper surface with a nitrogen polarity, provided on the barrier layer(2); a silicon nitride film(3) provided on the channel layer(3); a dielectric film(10) provided on the silicon nitride film(3); a gate electrode(7) provided on the dielectric film(10); a first recess[0012] and a second recess[0012] provided in the channel layer(3) and in the barrier layer(2); but does not disclose the relationship of semiconductor device comprising: a barrier layer having an upper surface with a nitrogen polarity; a channel layer having an upper surface with a nitrogen polarity, provided on the barrier layer; a silicon nitride film provided on the channel layer; a dielectric film provided on the silicon nitride film; a gate electrode provided on the dielectric film; a first recess and a second recess provided in the channel layer and in the barrier layer; a first nitride semiconductor layer, provided inside the first recess, and having an electrical resistance lower than an electrical resistance of the channel layer; a second nitride semiconductor layer, provided inside the second recess, and having an electrical resistance lower than the electrical resistance of the channel layer; a source electrode making an ohmic contact with the first nitride semiconductor layer; and a drain electrode making an ohmic contact with the second nitride semiconductor layer, wherein a relative dielectric constant of the dielectric film is higher than a relative dielectric constant of the silicon nitride film, the dielectric film includes at least one element selected from a group consisting of hafnium, lanthanum, and zirconium, the silicon nitride film has a thickness greater than or equal to 1 nm, a first capacitance of the dielectric film is less than or equal to a second capacitance of the silicon nitride film along a thickness direction, a third capacitance between the upper surface of the barrier layer and a lower surface of the silicon nitride film is less than or equal to the second capacitance of the silicon nitride film along a thickness direction, and the third capacitance less than or equal to the first capacitance. Therefore, it would not be obvious to make the semiconductor structure as claimed.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-9, 11, 12 have been considered but are moot because the arguments do not apply to any of the references being used in the current rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812
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