Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5, 8-10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liaw (hereinafter Liaw, US 2020/0105761).
In regards to independent claim 1, Liaw teaches a standard cell including a plurality of regions, comprising:
a first region including a first active region extending in a first direction and having a first width (Liaw, Fig. 4, Cell 2-1);
a second region including a second active region extending in the first direction and having a second width greater than the first width (Liaw, Fig. 4, Cell 2-1); and
a first gate electrode extending in a second direction perpendicular to the first direction (Fig. 6A, 6B, ITem 685),
wherein a first transistor corresponding to at least a portion of the first active region and the first gate electrode includes a first channel having the first width (Liaw, Fig. 6B, W1 Vs W2),
wherein a second transistor corresponding to at least a portion of the second active region and the first gate electrode includes a second channel having the second width (Liaw, Fig. 6B, W1 Vs W2), and
wherein the first region and the second region contact in the second direction and have the same width with respect to the second direction (Liaw, Fig. 6A).
In regards to dependent claim 2, Liaw teaches the standard cell of claim 1, wherein the first transistor includes a first nanosheet having the first width and corresponds to the first channel, and wherein the second transistor includes a second nanosheet having the second width and corresponds to the second channel (Liaw, [0019], Fig. 6B).
In regards to dependent claim 3, Liaw teaches the standard cell of claim 2, wherein the first nanosheet is surrounded by the first gate electrode in a region of the first gate electrode corresponding to the first active region, and wherein the second nanosheet is surrounded by the first gate electrode in a region of the first gate electrode corresponding to the second active region (Liaw, [0019], Fig. 6A, 6B).
In regards to dependent claim 4, Liaw teaches the standard cell of claim 1, wherein the second transistor operates at a second speed higher than a first speed of the first transistor, and operates with a second power greater than a first power of the first transistor (Liaw, [0015]).
In regards to dependent claim 5, Liaw teaches the standard cell of claim 1, wherein the first transistor corresponds to a first source-drain region corresponding to both sides of the first gate electrode in the first active region and the first gate electrode, and wherein the second transistor corresponds to a second source-drain region corresponding to the both sides of the first gate electrode in the second active region and the first gate electrode (Liaw, Fig. 6A).
In regards to dependent claim 8, Liaw teaches the standard cell of claim 4, further comprising:
a second gate electrode parallel to the first gate electrode, and
wherein a portion of the first active region and the second gate electrode correspond to a third transistor, and wherein the third transistor includes a third channel having the first width and is adjacent to the first transistor (Liaw, Fig. 6A).
In regards to dependent claim 9, Liaw teaches the standard cell of claim 8, wherein the third transistor includes a third nanosheet having the first width and corresponds to the third channel, and wherein the third nanosheet is surrounded by the second gate electrode in a region of the second gate electrode corresponding to the first active region (Liaw, Fig. 6A).
In regards to dependent claim 10, Liaw teaches the standard cell of claim 1, wherein the first region has a first height in the first direction, and wherein the second region has a second height greater than the first height in the first direction (Liaw, Fig. 3, H1 vs H2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6, 7, 11-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liaw in view of Kim et al. (hereinafter Kim, US 2016/0300851).
In regards to dependent claim 6, Liaw fails to explicitly teach a first power line extending in the first direction from an edge in which the first region and the second region contact each other; a second power line extending in the first direction from an edge of the first region parallel to an edge adjacent to the second region; and a third power line extending in the first direction from an edge of the second region parallel to an edge adjacent to the first region, and wherein the second power line and the third power line apply the same voltage to at least a portion of the first region and the second region, respectively.
Kim teaches:
a first power line extending in the first direction from an edge in which the first region and the second region contact each other; a second power line extending in the first direction from an edge of the first region parallel to an edge adjacent to the second region; and a third power line extending in the first direction from an edge of the second region parallel to an edge adjacent to the first region, and wherein the second power line and the third power line apply the same voltage to at least a portion of the first region and the second region, respectively (Kim, Fig. 5, PL1-3).
It would have been obvious to one of ordinary skill in the art, having the teachings of Liaw and Kim before him before the effective filing date of the claimed invention, to modify Nanosheet standard cells taught by Liaw to include the adjacent power lines of Kim in order to obtain nanosheet standard cells that contain adjacent power lines. One would have been motivated to make such a combination because it reduces the complexity of the interconnect level by creating common powerline amongst cells.
In regards to dependent claim 7, Liaw fails to explicitly teach wherein the first active region includes a first PMOS region and a first NMOS region spaced apart from each other in the second direction, the second active region includes a second PMOS region and a second NMOS region spaced apart from each other in the second direction, the first NMOS region and the second NMOS region are adjacent to the first power line, the first PMOS region is adjacent to the second power line, and the second PMOS region is adjacent to the third power line. Kim teaches wherein the first active region includes a first PMOS region and a first NMOS region spaced apart from each other in the second direction, the second active region includes a second PMOS region and a second NMOS region spaced apart from each other in the second direction, the first NMOS region and the second NMOS region are adjacent to the first power line, the first PMOS region is adjacent to the second power line, and the second PMOS region is adjacent to the third power line (Kim, Fig. 5, [0063]). It would have been obvious to one of ordinary skill in the art, having the teachings of Liaw and Kim before him before the effective filing date of the claimed invention, to modify Nanosheet standard cells taught by Liaw to include the PMOS and NMOS channels of Kim in order to obtain nanosheet standard cells that contain both PMOS and NMOS channels. One would have been motivated to make such a combination because it enables the standard cell design to be used across a variety of devices instead of using a single device thereby enabling it to be used to create complex processors.
In regards to independent claim 11, Liaw teaches an integrated circuit including a standard cell comprising:
wherein the standard cell includes:
a first active region extending in the first direction and having a first width in a first region between the first power line and the second power line (Liaw, Fig. 4, Cell1-1);
a second active region extending in the first direction and having a second width greater than the first width in a second region between the first power line and the third power line (Liaw, Fig. 4, Cell 2-1); and
a first gate electrode extending in the second direction (Fig. 6A, 6B, ITem 685),
wherein a first transistor corresponding to at least a portion of the first active region and the first gate electrode includes a first channel having the first width (Liaw, Fig. 6B, W1 Vs W2), and
wherein a second transistor corresponding to at least a portion of the second active region and the first gate electrode includes a second channel having the second width (Liaw, Fig. 6B, W1 Vs W2).
Liaw fails to explicitly teach:
a first power line extending in a first direction;
a second power line and a third power line extending in the first direction and spaced apart from the first power line by a first distance in a second direction perpendicular to the first direction; and
a standard cell including regions between the first power line, the second power line, and the third power line.
Kim teaches:
a first power line extending in a first direction (Kim, Fig. 5, PL1-3);
a second power line and a third power line extending in the first direction and spaced apart from the first power line by a first distance in a second direction perpendicular to the first direction (Kim, Fig. 5, PL1-3); and
a standard cell including regions between the first power line, the second power line, and the third power line (Kim, Fig. 5, PL1-3),
It would have been obvious to one of ordinary skill in the art, having the teachings of Liaw and Kim before him before the effective filing date of the claimed invention, to modify Nanosheet standard cells taught by Liaw to include the adjacent power lines of Kim in order to obtain nanosheet standard cells that contain adjacent power lines. One would have been motivated to make such a combination because it reduces the complexity of the interconnect level by creating common powerline amongst cells..
In regards to dependent claim 12, Liaw teaches wherein the first transistor includes a first nanosheet having the first width in a region of the first gate electrode corresponding to the first active region, wherein the second transistor includes a second nanosheet having the second width in a region of the first gate electrode corresponding to the second active region, and wherein the first nanosheet and the second nanosheet are surrounded by the first gate electrode (Liaw, [0019], Fig. 6A, 6B).
In regards to dependent claim 13, Liaw teaches wherein the second transistor operates at a second speed higher than a first speed of the first transistor, and operates with a second power greater than a first power of the first transistor (Liaw, [0015]).
In regards to dependent claim 14, Liaw teaches wherein the first transistor corresponds to a first source-drain region corresponding to both sides of the first gate electrode in the first active region and the first gate electrode, and wherein the second transistor corresponds to a second source-drain region corresponding to the both sides of the first gate electrode in the second active region and the first gate electrode (Liaw, Fig. 6A).
In regards to dependent claim 15, Liaw fails to explicitly teach wherein the first power line, the second power line, and the third power line apply one of a drain voltage and a source voltage to the first region and at least a portion of the second region, and wherein the second power line and the third power line apply the same voltage to the first region and the second region.
Kim teaches wherein the first power line, the second power line, and the third power line apply one of a drain voltage and a source voltage to the first region and at least a portion of the second region, and wherein the second power line and the third power line apply the same voltage to the first region and the second region (Kim, Fig. 5, PL1-3).
It would have been obvious to one of ordinary skill in the art, having the teachings of Liaw and Kim before him before the effective filing date of the claimed invention, to modify Nanosheet standard cells taught by Liaw to include the adjacent power lines of Kim in order to obtain nanosheet standard cells that contain adjacent power lines. One would have been motivated to make such a combination because it reduces the complexity of the interconnect level by creating common powerline amongst cells.
In regards to dependent claim 16, Liaw fails to explicitly teach wherein the first active region includes a first PMOS region and a first NMOS region spaced apart from each other in the second direction, the second active region includes a second PMOS region and a second NMOS region spaced apart from each other in the second direction, the first NMOS region and the second NMOS region are adjacent to the first power line, the first PMOS region is adjacent to the second power line, and the second PMOS region is adjacent to the third power line. Kim teaches wherein the first active region includes a first PMOS region and a first NMOS region spaced apart from each other in the second direction, the second active region includes a second PMOS region and a second NMOS region spaced apart from each other in the second direction, the first NMOS region and the second NMOS region are adjacent to the first power line, the first PMOS region is adjacent to the second power line, and the second PMOS region is adjacent to the third power line (Kim, Fig. 5, [0063]). It would have been obvious to one of ordinary skill in the art, having the teachings of Liaw and Kim before him before the effective filing date of the claimed invention, to modify Nanosheet standard cells taught by Liaw to include the PMOS and NMOS channels of Kim in order to obtain nanosheet standard cells that contain both PMOS and NMOS channels. One would have been motivated to make such a combination because it enables the standard cell design to be used across a variety of devices instead of using a single device thereby enabling it to be used to create complex processors.
In regards to dependent claim 17, Liaw teaches:
a second gate electrode parallel to the first gate electrode and crossing the first region and the second region, and wherein a portion of the first active region and the second gate electrode correspond to a third transistor, and wherein the third transistor includes a third channel having the first width and is adjacent to the first transistor (Liaw, Fig. 6A).
In regards to dependent claim 18, Liaw teaches wherein the third transistor includes a third nanosheet having the first width and corresponds to the third channel, and wherein the third nanosheet is surrounded by the second gate electrode in a region of the second gate electrode corresponding to the first active region (Liaw, Fig. 6A)..
In regards to dependent claim 19, Liaw teaches the integrated circuit of claim 11, wherein the first region has a first height in the first direction, and wherein the second region has a second height greater than the first height in the first direction (Liaw, Fig. 3, H1 vs H2).
In regards to independent claim 20, Liaw teaches a method of designing an integrated circuit including a standard cell, the method comprising:
wherein the at least one standard cell includes:
a first region including a first active region extending in a first direction and having a first width (Liaw, Fig. 4, Cell 2-1);
a second region including a second active region extending in the first direction and having a second width greater than the first width (Liaw, Fig. 4, Cell 2-1); and
a first gate electrode extending in a second direction perpendicular to the first direction (Fig. 6A, 6B, ITem 685),
wherein a first transistor formed by the first gate electrode and at least a portion of the first active region includes a first channel having the first width (Liaw, Fig. 6B, W1 Vs W2),
wherein a second transistor formed by the first gate electrode and at least a portion of the second active region includes a second channel having the second width (Liaw, Fig. 6B, W1 Vs W2), and
wherein the first region and the second region contact in the second direction and have the same width with respect to the second direction (Liaw, Fig. 6A).
Liaw fails to explicitly teach:
receiving input data defining the integrated circuit;
identifying at least one standard cell among a plurality of standard cells included in a standard cell library based on the input data;
performing placement and routing on the identified at least one standard cell based on the input data;
generating output data defining the integrated circuit based on a result of the placement and routing; and
designing the integrated circuit based on the output data.
Kim teaches:
receiving input data defining the integrated circuit (Kim, [0043-0060]);
identifying at least one standard cell among a plurality of standard cells included in a standard cell library based on the input data (Kim, [0043-0060]);
performing placement and routing on the identified at least one standard cell based on the input data (Kim, [0043-0060]);
generating output data defining the integrated circuit based on a result of the placement and routing (Kim, [0043-0060]); and
designing the integrated circuit based on the output data (Kim, [0043-0060]);
It would have been obvious to one of ordinary skill in the art, having the teachings of Liaw and Kim before him before the effective filing date of the claimed invention, to modify Nanosheet standard cells taught by Liaw to the cell design software of Kim in order to obtain nanosheet standard cells that is created through design software. One would have been motivated to make such a combination because it reduces the cell footprint by optimizing layout through software based on user design criteria.
Conclusion
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/WILLIAM C TRAPANESE/Primary Examiner, Art Unit 2812
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