Prosecution Insights
Last updated: August 15, 2026
Application No. 18/583,737

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES

Non-Final OA §102
Filed
Feb 21, 2024
Examiner
SALERNO, SARAH KATE
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Amkor Technology Singapore Holding Pte. Ltd.
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
650 granted / 885 resolved
+5.4% vs TC avg
Moderate +15% lift
Without
With
+14.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
30 currently pending
Career history
912
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
57.6%
+17.6% vs TC avg
§102
33.8%
-6.2% vs TC avg
§112
7.3%
-32.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 885 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group I, Species I in the reply filed on 6/3/26 is acknowledged. Claims 2, 5, 15 and 17-20 are cancelled from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 6/3/26. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 10, 14, 16, 21, 23 and 25 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Farooq et al. (US PGPub 2015/0097273). Claim 10: Farooq teaches (Figs 3-6) a method of making a semiconductor device, comprising: providing a first conductor (122); providing a second conductor (92-2) protruding above the first conductor; providing a first dielectric layer (86), wherein a first gap is defined between an inner wall of the first dielectric layer and a lateral side of the second conductor (Fig. 5); providing a first seed layer (89) over the second conductor, over the first dielectric layer, and in the first gap; and providing a third conductor (82) over the first seed layer, wherein third conductor extends into the first gap defined between the lateral side of the second conductor and the inner wall of the first dielectric layer (Fig. 6). Claim 14: Farooq teaches [0027-0028] the lateral side of the second conductor is separated from the inner wall of the first dielectric layer by less than about 10 micrometers. Since the height measurements are less than 10 micrometers the lateral distances are less since they are shown to be less in the drawings. Claim 16: Farooq teaches (Fig. 6) a portion of the third conductor between the inner wall of the first dielectric layer and the lateral side of the second conductor comprises an annular geometry. Claim 21: Farooq teaches (Figs 3-6) a method of making a semiconductor device, comprising: providing a first dielectric layer (120); providing a first conductor (92-2) over the first dielectric layer providing a second conductor (82) over the first conductor and around lateral sides of the first conductor; providing a second dielectric layer (86) over the first dielectric layer, wherein a first gap is defined between a lateral side of the second conductor and an inner wall of the second dielectric layer; and providing a third conductor (89) [0031] extending over the second dielectric layer and into the first gap defined between the lateral side of the second conductor and the inner wall of the second dielectric layer. Claim 23: Farooq teaches (Fig. 6) a portion of the third conductor that extends into the first gap comprises an annular geometry. Claim 25: Farooq teaches (Fig. 6) the lateral side of the second conductor is separated from the inner wall of the first dielectric layer by a width less than about 10 micrometers. Since the height measurements are less than 10 micrometers the lateral distances are less since they are shown to be less in the drawings. Allowable Subject Matter The following is a statement of reasons for the indication of allowable subject matter: Claims 1-9 are allowable over the prior art as it does not teach the claimed combination of photoresists, gap formation, and multiple conductor placement in the dielectric layers and in relation to each other. Claims 12-13, 22 and 25 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art of record does not each these limitations in conjunction with the independent claims from which they depend. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SARAH KATE SALERNO whose telephone number is (571)270-1266. The examiner can normally be reached M-F 6:30am-2:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached at 5712721705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SARAH K SALERNO/Primary Examiner, Art Unit 2814
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Prosecution Timeline

Feb 21, 2024
Application Filed
Aug 07, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
73%
Grant Probability
88%
With Interview (+14.8%)
2y 11m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 885 resolved cases by this examiner. Grant probability derived from career allowance rate.

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