Last updated: July 17, 2026

Application No. 18/584,481

STAGE APPARATUS, LITHOGRAPHY APPARATUS, AND ARTICLE MANUFACTURING METHOD

Non-Final OA

Filed

Feb 22, 2024

Priority

Feb 24, 2023 — JP 2023-027318

Examiner

ARORA, AJAY

Art Unit

2892

Tech Center

2800 — Semiconductors & Electrical Systems

Assignee

Canon Inc.

OA Round

1 (Non-Final)

Interview Optional

— +6.1% interview lift. Interview already conducted in this application's prosecution history. This examiner has a 84% grant rate with +6.1% interview lift. Since an interview has already been tried, recommend written response with narrowed claims based on precedent claim evolution patterns.

Based on 908 resolved cases, 2023–2026

Examiner Intelligence

ARORA, AJAY View full profile →

Grants 84% — above average

Career Allowance Rate

767 granted / 908 resolved

+16.5% vs TC avg

Moderate +6% lift

Without

With

+6.1%

Interview Lift

resolved cases with interview

Typical timeline

2y 6m

Avg Prosecution

10 currently pending

Career history

925

Total Applications

across all art units

Statute-Specific Performance

§101

0.2%

-39.8% vs TC avg

§103

89.9%

+49.9% vs TC avg

§102

6.8%

-33.2% vs TC avg

§112

1.6%

-38.4% vs TC avg

Black line = Tech Center average estimate • Based on career data from 908 resolved cases

Prosecution Timeline

Feb 22, 2024

Application Filed

Mar 30, 2026

Examiner Interview (Telephonic)

Apr 28, 2026

Non-Final Rejection mailed (current)

Precedent Cases

Applications granted by this same examiner with similar technology

18/052,246

Patent 12685209

SEMICONDUCTOR PACKAGE AND METHOD FOR PRODUCING THE SAME

3y 8m to grant Granted Jul 14, 2026

17/982,619

Patent 12677691

ELECTRONIC PACKAGE AND METHOD FOR MANUFACTURING THE SAME

3y 8m to grant Granted Jul 07, 2026

18/384,025

Patent 12677499

SEMICONDUCTOR DEVICE INCLUDING BONDED SUBSTRATES AND MANUFACTURING METHOD THEREOF

2y 8m to grant Granted Jul 07, 2026

18/433,752

Patent 12669733

ACTIVE MATRIX SUBSTRATE, METHOD FOR MANUFACTURING SAME, AND LIQUID CRYSTAL DISPLAY DEVICE

2y 4m to grant Granted Jun 30, 2026

18/511,039

Patent 12672336

SEMICONDUCTOR DEVICE WITH RECESSED GATE AND METHOD FOR FABRICATING THE SAME

2y 7m to grant Granted Jun 30, 2026

Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.

Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2

Expected OA Rounds

84%

Grant Probability

91%

With Interview (+6.1%)

2y 6m (~1m remaining)

Median Time to Grant

Low

PTA Risk

Based on 908 resolved cases by this examiner. Grant probability derived from career allowance rate.