Prosecution Insights
Last updated: October 02, 2026
Application No. 18/584,816

BIAS SUPPLY WITH RESONANT SWITCHING

Non-Final OA §103§112§Other
Filed
Feb 22, 2024
Priority
Jan 26, 2022 — continuation of 11/942,309
Examiner
REYES, JOSHUA NATHANIEL PI
Art Unit
Tech Center
Assignee
Advanced Energy Industries Inc.
OA Round
1 (Non-Final)
41%
Grant Probability
Moderate
1-2
OA Rounds
1y 1m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 41% of resolved cases
41%
Career Allowance Rate
29 granted / 70 resolved
-18.6% vs TC avg
Strong +51% interview lift
Without
With
+51.2%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
38 currently pending
Career history
127
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
68.7%
+28.7% vs TC avg
§102
10.7%
-29.3% vs TC avg
§112
17.3%
-22.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 70 resolved cases

Office Action

§103 §112 §Other
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Status of Claims Responsive to communication filed 07/13/2026 Claims 1-20 are pending Claim 17 has been withdrawn Claims 1-4, 9-16, and 19-20 are rejected Claim 1 is cancelled Claims 5-8 and 18 are objected Elections/Restrictions Applicant’s election without traverse of Species A1 and B1, drawn to claims 1-16 and 18-20 in the reply filed on 07/13/2026, is acknowledged. Claims 17 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 07/13/2026. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2-16 and 18-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding Claim 2: Claim 2 recites the limitation “a second voltage source coupled to the second node and third node.” This limitation is unclear in light of the disclosure as a whole because the specification discloses that the second voltage source is coupled to second node and the return node, not the third node [IA - 0028]. As such, for purposes of prosecution on the merits, the limitation will be read as “a second voltage source coupled to the second node and a return node Regarding Claims 3-4, 6-7, and 9-10: Claims 3-4, 6-7, and 9-10 are rejected at least based on their dependency on claim 2. Regarding Claim 5: Claim 5 recites the limitation “wherein the second voltage source is in series with an inductive element and the second voltage source and the inductive element are coupled between the second node and the third node.” This limitation is unclear in light of the disclosure as a whole because the specification discloses that the second voltage source is coupled to second node and the return node, not the third node [IA - 0028]. As such, for purposes of prosecution on the merits, the limitation will be read as “wherein the second voltage source is in series with an inductive element and the second voltage source and the inductive element are coupled between the second node and the return node Regarding Claim 8: Claim 8 recites the limitation “wherein the second voltage source is arranged in series with a third inductor, and the second voltage source and the third inductor are arranged between the second node and the third node.” This limitation is unclear in light of the disclosure as a whole because the specification discloses that the second voltage source is coupled to second node and the return node, not the third node [IA - 0028]. As such, for purposes of prosecution on the merits, the limitation will be read as “wherein the second voltage source is arranged in series with a third inductor, and the second voltage source and the third inductor are arranged between the second node and the return node Regarding Claim 11: Claim 11 recites the limitation “a second voltage source coupled to the second node and third node.” This limitation is unclear in light of the disclosure as a whole because the specification discloses that the second voltage source is coupled to second node and the return node, not the third node [IA - 0028]. As such, for purposes of prosecution on the merits, the limitation will be read as “a second voltage source coupled to the second node and a return node Regarding Claims 12-13: Claims 12-13 are rejected at least based on their dependency on claim 11. Regarding Claim 14: Claim 14 recites the limitation “a switch and a first diode arranged in series within a first current pathway between a first node and a second node; a second current pathway between the second node and a third node comprising a second diode.” This limitation is unclear in light of the disclosure as a whole because the specification discloses that the diode D1 is arranged between the first node and fourth node, while the diode D2 is arranged between the fourth node and third node [IA - 0035]. As such, for purposes of prosecution on the merits, the limitation will be read as “a switch and a first diode arranged in series within a first current pathway between a first node and a fourth node the fourth node and a third node comprising a second diode.” Regarding Claims 15 and 20: Claims 15 and 20 are rejected at least based on their dependency on claim 14. Regarding Claim 16: Claim 16 recites the limitation “wherein the first current pathway comprises a series combination of the switch, a first inductive element, and the first diode coupled between the first node and the second node.” This limitation is unclear in light of the disclosure as a whole because the specification discloses that the diode D1 is arranged between the first node and fourth node, while the diode D2 is arranged between the fourth node and third node [IA - 0035]. As such, for purposes of prosecution on the merits, the limitation will be read as “wherein the first current pathway comprises a series combination of the switch, a first inductive element, and the first diode coupled between the first node and the fourth node Regarding Claim 18: Claim 18 recites the limitation “apply a second voltage between the second node and a third node.” This limitation is unclear in light of the disclosure as a whole because the specification discloses that the second voltage source is coupled to second node and the return node, not the output node [IA - 0028]. As such, for purposes of prosecution on the merits, the limitation will be read as “a series combination of the second voltage source and an inductive element coupled between a second node and the return node.” Regarding Claim 19: Claim 19 recites the limitation “wherein the second voltage source is coupled between the second node and the return node.” However, in light of the examiner’s interpretation of claim 14 (see above), there would be an issue of antecedent basis. As such, for purposes of prosecution on the merits, claim 19 will be read as “wherein the second voltage source is coupled between a second node and the return node.” Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2-4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nguyen et al. (US 20210013006) in view of Rogers et al. (US 20200161155). Regarding Claim 2: Nguyen teaches an apparatus to apply a periodic voltage comprising: a switch (switch S) coupled to a first node (second node 1674) and a second node (first node 1670); a first voltage source (DC supply 1633) coupled to the first node and a third node (second node 1676); and a controller configured to: close the switch to connect and disconnect a current pathway between the first node and the second node to cause an application of an asymmetric periodic voltage waveform at the second node relative to the third node, wherein each cycle of the asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage, a second portion that changes from the positive peak voltage to a third voltage level and a fourth portion that includes a negative voltage ramp from the third voltage level to a fourth voltage level (as evidenced by Fig. 4, the switch S is closed/opened to cause various portions of a periodic voltage waveform to go from a negative voltage to a positive peak voltage, and thereinafter changes from the peak voltage to a third voltage level that negatively ramps to a fourth voltage level) [Fig. 16D & 0047, 0065]. Nguyen does not specifically disclose a second voltage source coupled to the second node and a return node. Rogers teaches a second voltage source (DC voltage source 703) coupled to the second node and a return node (as evidenced by Fig. 7, the voltage source 703 is coupled to various nodes) [Fig. 7 & 0030]. It would have been obvious to one of ordinary skill in the art to modify the apparatus of Nguyen to include a second voltage source, as in Rogers, to alleviate the effects of excess charge [Rogers - 0030]. Regarding Claim 2: Nguyen teaches wherein each cycle of the asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage, a second portion that changes from the positive peak voltage to a third voltage level and a fourth portion that includes a negative voltage ramp from the third voltage level to a fourth voltage level (as evidenced by Fig. 4, the switch S is closed/opened to cause various portions of a periodic voltage waveform to go from a negative voltage to a positive peak voltage, and thereinafter changes from the peak voltage to a third voltage level that negatively ramps to a fourth voltage level) [Fig. 16D & 0047, 0065]. Regarding Claim 3: Nguyen teaches wherein connecting the current pathway between the first node and the second node causes the first portion of the asymmetric periodic voltage waveform that begins with a first negative voltage and changes to the positive peak voltage (as evidenced by Fig. 4, the switch S is closed/opened to cause various portions of a periodic voltage waveform to go from a negative voltage to a positive peak voltage, and thereinafter changes from the peak voltage to a third voltage level that negatively ramps to a fourth voltage level) [Fig. 16D & 0047, 0065]. Regarding Claim 4: Nguyen teaches wherein disconnecting the current pathway causes the second portion of the asymmetric periodic voltage waveform that changes from the positive peak voltage level to the third voltage level (as evidenced by Fig. 4, the switch S is closed/opened to cause various portions of a periodic voltage waveform to go from a negative voltage to a positive peak voltage, and thereinafter changes from the peak voltage to a third voltage level that negatively ramps to a fourth voltage level) [Fig. 16D & 0047, 0065]. Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nguyen et al. (US 20210013006) in view of Rogers et al. (US 20200161155), as applied to claims 2-4 above, and further in view of Yasui et al. (US 20050081999). The limitations of claims 204 have been set forth above. Regarding Claim 9: Modified Nguyen does not specifically disclose wherein the switch includes a plurality of switches arranged in series. Yasui teaches wherein the switch includes a plurality of switches arranged is series (switching element 18 may use switches in series) [Fig. 13 & 0045]. It would have been obvious to one of ordinary skill in the art to modify the apparatus of modified Nguyen to include switches in parallel and in series, as in Yasui, to better withstand current and voltage [Yasui - 0045]. Regarding Claim 10: Modified Nguyen does not specifically disclose wherein the switch includes a plurality of switches arranged in parallel. Yasui teaches wherein the switch includes a plurality of switches arranged in parallel (switching element 18 may use switches in parallel) [Fig. 13 & 0045]. It would have been obvious to one of ordinary skill in the art to modify the apparatus of modified Nguyen to include switches in parallel and in series, as in Yasui, to better withstand current and voltage [Yasui - 0045]. Claim(s) 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nguyen et al. (US 20210013006) in view of Rogers et al. (US 20200161155). Regarding Claim 11: Nguyen teaches an apparatus to apply a periodic voltage comprising: a switch (switch S) coupled to a first node (second node 1674) and a second node (first node 1670); a third node (second node 1676); the switch section comprising a current pathway between the first node and the second node (as evidenced by Fig. 16D, the switch S has a pathway to the second node 1674 and the first node 1670) a controller coupled to the switch section and configured to control the switch section to: apply a first voltage between a first node and a third node; connect and disconnect a current pathway between the first node and the second node to cause an application of an asymmetric periodic voltage waveform at the second node, wherein each cycle of the asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage, a second portion that changes from the positive peak voltage to a third voltage level and a fourth portion that includes a negative voltage ramp from the third voltage level to a fourth voltage level (as evidenced by Fig. 4, the switch S is closed/opened to cause various portions of a periodic voltage waveform to go from a negative voltage to a positive peak voltage, and thereinafter changes from the peak voltage to a third voltage level that negatively ramps to a fourth voltage level) [Fig. 16D & 0047, 0065]. Nguyen does not specifically disclose apply a second voltage between the second node and a return node. Rogers teaches a second voltage source (DC voltage source 703) coupled to the second node and a return node (as evidenced by Fig. 7, the voltage source 703 is coupled to various nodes) [Fig. 7 & 0030]. It would have been obvious to one of ordinary skill in the art to modify the apparatus of Nguyen to include a second voltage source, as in Rogers, to alleviate the effects of excess charge [Rogers - 0030]. Regarding Claim 12: Rogers teaches wherein the connecting and disconnecting causes unidirectional current through the current pathway between the first node and the second node (the switch S electrically connects the second node 1674 and the first node 1670) [Fig. 16D & 0047, 0065]. Regarding Claim 13: Rogers teaches wherein the connecting and disconnecting causes unidirectional current through a second current pathway between the second node and the third node (the switch S electrically connects the second node 1674 and the first node 1670 and the second node 1674) [Fig. 16D & 0047, 0065]. Claim(s) 14-16 and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nguyen et al. (US 20210013006) in view of Rogers et al. (US 20200161155). Regarding Claim 14: Nguyen teaches an apparatus to apply a periodic voltage comprising: an output node (output node 1604); a first current pathway between a first node and a fourth node; a second current pathway between the fourth node and a third node (the switch S electrically connects the second node 1674 and the first node 1670 and the second node 1674); a first voltage source (DC supply 1633) coupled to the first node and a third node (second node 1676) [Fig. 16D & 0047, 0065]. Nguyen does not specifically disclose a return node; a switch and a first diode arranged in series within a first current pathway between a first node and a fourth node; a second current pathway between the fourth node and a third node comprising a second diode, and a second voltage source coupled to the return node. Rogers teaches a return node (the node subsequent to DC voltage source 708); a second voltage source (DC voltage source 703) coupled to the return node (as evidenced by Fig. 7, the voltage source 703 is coupled to various nodes) [Fig. 7 & 0030]. It would have been obvious to one of ordinary skill in the art to modify the apparatus of Nguyen to include a second voltage source, as in Rogers, to alleviate the effects of excess charge [Rogers - 0030]. It is noted that although Rogers does not specifically disclose "a switch and a first diode arranged in series within a first current pathway between a first node and a fourth node; a second current pathway between the fourth node and a third node comprising a second diode," Rogers does disclose utilizing diodes as a known technique in the art. As such, placing diodes after a switch would merely be applying a known technique to a known device to yield predictable results (See MPEP 2143 I. D.). The limitations “wherein closing the switch causes unidirectional current in the first and second current pathways to cause an application of the periodic voltage between the output node and the return node,” are merely intended use and are given weight to the extent that the prior art is capable of performing the intended use. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). It is noted that the combination of references utilizes two voltage sources, and as such, would be capable of applying a current through the output node when another voltage source is switched off. Regarding Claim 15: The limitations of claims 15 are merely intended use and are given weight to the extent that the prior art is capable of performing the intended use. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). It is noted that the combination of references utilizes two voltage sources, and as such, would be capable of applying a current through the output node when another voltage source is switched off. It is noted that the combination of references utilizes two voltage sources, and as such, would be capable of applying a current through the output node when another voltage source is switched off. Regarding Claim 16: Nguyen teaches wherein the first current pathway comprises a series combination of the switch and a first inductive element (as evidenced by Fig. 16D, the switch S is in series with inductor L1) [Fig. 16D & 0047, 0065]. Nguyen does not specifically disclose wherein the first current pathway comprises a series combination of the switch, a first inductive element, and the first diode coupled between the first node and the fourth node. It is noted that although Rogers does not specifically disclose "wherein the first current pathway comprises a series combination of the switch, a first inductive element, and the first diode coupled between the first node and the fourth node," Rogers does disclose utilizing diodes as a known technique in the art. As such, placing diodes after a switch would merely be applying a known technique to a known device to yield predictable results (See MPEP 2143 I. D.). Regarding Claim 19: Nguyen does not specifically disclose wherein the second voltage source is coupled between the second node and the return node. Rogers teaches a second voltage source (DC voltage source 703) is coupled between the second node and the return node (as evidenced by Fig. 7, the voltage source 703 is coupled to various nodes) [Fig. 7 & 0030]. It would have been obvious to one of ordinary skill in the art to modify the apparatus of Nguyen to include a second voltage source, as in Rogers, to alleviate the effects of excess charge [Rogers - 0030]. Regarding Claim 20: Nguyen does not specifically disclose wherein a negative terminal of the second voltage source is coupled to a negative terminal of the first voltage source. Rogers teaches a second voltage source (DC voltage source 703) is coupled between the second node and the return node (as evidenced by Fig. 7, the voltage source 703 is coupled to various nodes) [Fig. 7 & 0030]. It would have been obvious to one of ordinary skill in the art to modify the apparatus of Nguyen to include a second voltage source, as in Rogers, to alleviate the effects of excess charge [Rogers - 0030]. The combination of references would disclose "wherein a negative terminal of the second voltage source is coupled to a negative terminal of the first voltage source," since placing the second voltage source (DC voltage source 703) of Rogers to be coupled to the output node 1604 of Nguyen would result in that voltage source being coupled to the DC supply 133 of Nguyen. Allowable Subject Matter Claims 5-8 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, as well as the correction of any rejections under 35 USC 112b (see the rejection above). For example, if Claim 8 was to be amended as “wherein the second voltage source is arranged in series with a third inductor, and the second voltage source and the third inductor are arranged between the second node and the return node The prior art of record whether alone or in combination fails to teach or fairly suggest specific claim limitations “wherein the second voltage source is arranged in series with a third inductor, and the second voltage source and the third inductor are arranged between the second node and the third node,” in the context of other limitations in the claim. The examiner regards Nguyen et al. (US 20210013006) and Rogers et al. (US 20200161155) as the closest prior art of record. Nguyen in view of Rogers teaches a second voltage source attached to a node, however, the examiner has not been able to find references with motivation to specifically provide that second voltage source to be in series with an inductor that are both arranged between the second node and third node specifically. In summary, the examiner has not found motivation to place a inductor/second voltage at the specific third node as claimed. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant’s disclosure. McDonald (US 20080036301) and Hatano et al. (US 20030230938) teach switches [McDonald – Fig. 3; Hatano – Fig. 1]. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOSHUA NATHANIEL PINEDA REYES whose telephone number is (571)272-4693. The examiner can normally be reached Monday - Friday 8 AM to 4:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Gordon Baldwin can be reached at (571) 272-5166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.R./Examiner, Art Unit 1718 /Kurt Sweely/Primary Examiner, Art Unit 1718
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Prosecution Timeline

Feb 22, 2024
Application Filed
Sep 23, 2026
Non-Final Rejection mailed — §103, §112, §Other (current)

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Prosecution Projections

1-2
Expected OA Rounds
41%
Grant Probability
93%
With Interview (+51.2%)
3y 8m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 70 resolved cases by this examiner. Grant probability derived from career allowance rate.

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