DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statements (IDSs) submitted on 02/23/2024 and 02/29/2024 are being considered by the examiner.
Election/Restrictions
4. Applicant's election with traverse of Group II claims 1-13 in the reply filed on 01/21/2026 is acknowledged. The traversal is on the ground(s) that the two groups of claims subject to restriction (Groups I and II) are closely related and that a proper search of any of the claims of one group would likely include a search of the claims of the other group; thus, the claims can be searched simultaneously and has a duplicative
search with possibly inconsistent results may occur if the restriction requirement is maintained.
This is not found persuasive because since the inventions of Group I and II drawn to distinct inventions (a device/product and method), the determination of patentability of inventions of Group I and II would require different searches in different classes and subclasses which will be a serious burden on the examiner. The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
6. Claims 1-5 and 11-12 are rejected under 35 U.S.C. 102(a) as being anticipated by Su (2015/0371873 A1).
Pertaining to claim 1, Su discloses A circuit board (100, see fig. 10) comprising: a first insulating layer (16, see fig. 10) that has a first surface and a second surface opposing each other; a first wire layer (144, see fig. 10) that is buried within the first insulating layer (16); and a bump (32, see fig. 10) that includes a base portion (124, see fig. 10) disposed laterally to the first wire layer (144, see fig. 10) to be buried within the first insulating layer (16) and a protrusion portion (26,see fig. 10) integrally extending and protruding from the base portion (124) and having a width at an upper end thereof less than a width of the protrusion portion (26, see fig. 10) at a height of the first surface (see fig. 10).
Pertaining to claim 2, Su discloses, wherein in the protrusion portion (26), the width at the height of the first surface is the largest and a width at the upper end of the protrusion portion is the smallest (see fig. 10).
Pertaining to claim 3, Su discloses, wherein the width of the protrusion portion (26) increases in a direction away from the first surface (see fig. 10).
Pertaining to claim 4, Su discloses, wherein in a height measured in a direction perpendicular to the first surface (see fig. 10), the base portion (124) and the first wire layer (first 144 of wiring layer) have portions disposed at the same height as each other (see fig. 10).
Pertaining to claim 5, Su discloses, wherein the base portion (124) and the protrusion portion (26) have the same width at the height of the first surface (see fig. 10).
Pertaining to claim 11, Su discloses, wherein the bump includes copper (Cu) (see paragraph [0031], lines 21-23).
Pertaining to claim 12, Su discloses, further comprising a build-up structure disposed on the second surface of the first insulating layer (the second surface of 16, see fig. 10) and including a plurality of build-up insulating layers (see fig. 10) and a plurality of build-up wire layers (144).
Claim Rejections - 35 USC § 103
7. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
8. Claims 6-10 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Su (2015/0371873 A1) in view of Kim (US 2016/0135326 A1).
Pertaining to claim 6, Su discloses all claimed limitations except, a first solder resist layer disposed on the first surface.
However, Kim teaches a first solder resist layer (130, see fig. 8) disposed on the first surface.
Therefore, At the time of the invention, it would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to provide a first solder resist layer disposed on the first surface in the device of Su based on the teachings of Kim in order to provide reliability, electrical performance, and manufacturing yield. By penetrating the resist layer, the bump creates a direct, robust connection to the underlying copper pad.
Pertaining to claim 7, Su as modified by Kim further discloses wherein the bump (340, see fig. 8 of Kim) is disposed to penetrate the first solder resist layer (130 of Kim, see fig. 8).
Pertaining to claim 8, Su as modified by Kim further discloses, wherein the bump (340 of Kim) protrudes from the first solder resist layer (130 of Kim).
Pertaining to claim 9, Su as modified by Kim further discloses, wherein the protrusion portion (110b of Kim, see fig. 8) is disposed to contact the first solder resist layer (130 of Kim).
Pertaining to claim 10, Su as modified by Kim further discloses, wherein the first solder resist layer (130 of Kim) is disposed to surround a portion of a side surface of the protrusion portion (110b of Kim).
Pertaining to claim 13, Su discloses all claimed limitations except, further comprising a second solder resist layer disposed on an outermost insulating layer disposed at an outermost side of the plurality of build-up insulating layers.
However, Kim teaches a second solder resist layer (132, see fig. 8) disposed on an outermost insulating layer disposed at an outermost side of the plurality of build-up insulating layers (120, see fig. 8)
Therefore, At the time of the invention, it would have been obvious before the effective filing date of the claimed invention to a person of ordinary skill in the art to provide a second solder resist layer disposed on an outermost insulating layer disposed at an outermost side of the plurality of build-up insulating layers in the device of Su based on the teachings of Kim in order to provide improving reliability, durability, and manufacturing precision in high-density interconnect (HDI) application.
Conclusion
9. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Bonk (US-20150156882-A1), He (US-20180315712-A1) and Ko (US-20140000952-A1).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDARGIE M AYCHILLHUM whose telephone number is (571)270-1607. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at (571) 272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANDARGIE M AYCHILLHUM/Primary Examiner, Art Unit 2847
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