Prosecution Insights
Last updated: October 01, 2026
Application No. 18/586,573

ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS

Final Rejection §103
Filed
Feb 26, 2024
Priority
Feb 27, 2023 — JP 2023-028802
Examiner
GONZALES, VICENTE ROLANDO
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Seiko Epson Corporation
OA Round
2 (Final)
100%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
3 granted / 3 resolved
+32.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
18 currently pending
Career history
28
Total Applications
across all art units

Statute-Specific Performance

§103
66.2%
+26.2% vs TC avg
§102
18.8%
-21.2% vs TC avg
§112
9.8%
-30.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 3 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1, 2, 4, 6, 7, 10, and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nimura (US Patent Pub 20150041833 A1) in view of Ito (20200133086 A1). Regarding Claim 1, Nimura teaches an electro-optical device comprising: a transistor including a drain region (Fig. 5, transistor 24 including drain region 24d); a pixel electrode provided corresponding to the transistor (Fig. 5, Pixel electrode 28) a lens layer arranged in a layer between the transistor and the pixel electrode and including silicon oxynitride (Fig. 5, lens layer 15 between 24 and 28. Paragraph 0075 teaches 15 is formed of silicon oxynitride); a first relay electrode arranged in a layer between the lens layer and the pixel electrode and electrically coupled to the pixel electrode via a first conductive portion (Fig. 5, first relay electrode 46 electrically coupled to 28 via first conductive portion (portion of 28 located in CH6); a passivation film in contact with the lens layer (Fig. 5, passivation film 17); and a second conductive portion arranged in a through hole extending through the lens layer and the passivation film and electrically coupled to the first relay electrode (Fig. 5, second conductive portion (portion of 46 located in CH5) arranged in through hole CH5 that goes through lens layer 15. The second conductive portion is electrically coupled to the first relay electrode 28). Nimura fails to teach the passivation film is arranged in a layer between the lens layer and the first relay electrode, as well as fails to teach the second conductive portion extends through the passivation film. However, Ito teaches an electro-optical device wherein: a passivation film is arranged in a layer between the lens layer and the first relay electrode and being in contact with the lens layer (Ito, fig. 4, passivation film 34 arranged between the lens layer 33 and the first relay electrode (wiring located to the left of 28 is the first relay electrode). 34 is in contact with 33), and a second conductive portion arranged in a through hole extending through the lens layer and the passivation film and electrically coupled to the first relay electrode (Ito, Fig. 4, second conductive portion (portion that is located to the left of 35 coupled to the first relay electrode and extends downward) extends in a through hole through lens layer 33 and the passivation film 34. The second conductive portion is electrically coupled to the first relay electrode). It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Ito into the method of Nimura by forming the electro-optical device wherein a passivation film is arranged in a layer between the lens layer and the first relay electrode and being in contact with the lens layer, and a second conductive portion arranged in a through hole extending through the lens layer and the passivation film and electrically coupled to the first relay electrode. The ordinary artisan would have been motivated to modify Nimura in the manner set forth above for at least the purpose of improving adhesiveness with respect to the pixel electrodes (Ito, paragraph 0086). Regarding Claim 2, Nimura in view of Ito teaches the electro-optical device according to claim 1, wherein the passivation film includes silicon oxide or silicon nitride (Nimura, paragraph 0077 teaches the passivation film 17 can be formed of silicon oxide). Regarding Claim 4, Nimura in view of Ito teaches the electro-optical device according to claim 1, wherein an average thickness of the passivation film is smaller than an average thickness of the lens layer (Ito, fig. 4 shows that the average thickness of the passivation layer 34 is smaller than an average thickness of the lens layer 33. Regarding Claim 6, Nimura in view of Ito teaches the electro-optical device according to claim 1, wherein the first conductive portion and the second conductive portion are arranged at different positions in plan view (Nimura, Fig 4 teaches the first conductive portion (located in CH6) and the second conductive portion (located in CH5) are arranged at different positions in plan view). Regarding Claim 7, Nimura in view of Ito teaches the electro-optical device according to claim 1, further comprising a second relay electrode arranged in a layer between the transistor and the lens layer and electrically coupled to the first relay electrode via the second conductive portion, wherein the first relay electrode and the second relay electrode overlap with each other in plan view (Nimura, Fig. 5 teaches a second relay electrode 45 arranged between the transistor 24 and the lens layer 15 and electrically coupled to the first relay electrode 46 via the second conductive portion (portion of 46 in CH5). A portion of 45 is directly below 46, therefore wherein the first relay electrode and the second relay electrode overlap with each other in plan view). Regarding Claim 10, Nimura in view of Ito teaches the electro-optical device according to claim 1, wherein the lens layer includes a plurality of lens surfaces and a planar surface on an opposite side of the plurality of lens surfaces, and the passivation film is in contact with the planar surface (Nimura, Fig. 5 teaches lens layer 15 has a plurality of lens surfaces (ML2 on the left side of the figure, and a second ML2 on the right side of the figure of the lens layer) and a planar surface on an opposite side of the plurality of lens surfaces. The passivation film 17 is in contact with the planar surfaces located between the lens surfaces). Regarding Claim 11, Nimura in view of Ito teaches an electronic apparatus comprising: the electro-optical device according to claim 1 (Ito, Fig. 30, electro-optical device 100); and a control unit configured to control an operation of the electro-optical device (Ito, Fig. 30 and paragraph 0227 teach a control unit 3000 configured to control an operation of the electro-optical device). Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nimura in view of Ito (Us Patent Pub 20200133086 A1, hereafter referred to as Ito 086) as applied to claims 1, 2, 4, 6, 7, 10, and 11 above, and further in view of Ito (US Patent Pub 20210157194 A1, hereafter referred to as Ito 194). Regarding claim 3, Nimura in view of Ito 086 teaches the electro-optical device according to claim 1, having a second conductive portion (Nimura, Fig. 5, second conductive portion (portion of 46 located in CH5)). Nimura in view of Ito 086 fails to teach that the second conductive portion is formed of Tungsten. However, Ito 194 teaches an electro-optical device wherein the second conductive portion includes tungsten (Ito 194, Fig. 4 teaches a second conductive portion 3b. Paragraph 0082 teaches the second conductive portion is formed of tungsten). It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Ito into the method of Nimura by forming the electro-optical device wherein the second conductive portion includes tungsten. The ordinary artisan would have been motivated to modify Nimura in view of Ito 086 in the manner set forth above for at least the purpose of forming high-precision columnar contacts, which allows for the contacts to be made smaller, suppressing a plan view shape of the lens from being made smaller (Ito 194, paragraph 0082). Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nimura in view of Ito 086 as applied to claims 1, 2, 4, 6, 7, 10, and 11 above, and further in view of Ahn et al. (US Patent Pub 20050200734 A1). Regarding Claim 5, Nimura in view of Ito 086 teaches the electro-optical device according to claim 1. Nimura in view of Ito 086 fails to teach an average thickness of the passivation film is from 100 nm to 1000 nm. However, Ahn teaches an electro-optical device wherein an average thickness of the passivation film is from 100 nm to 1000 nm (Ahn, Fig. 2A and paragraph 0031-0032 teaches passivation film 120. Paragraph 0031 teaches 120 is deposited to a thickness of 500-800 nm, which is within the claimed thickness range). It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Ahn into the method of Nimura in view of Ito 086 by forming the electro-optical device wherein an average thickness of the passivation film is from 100 nm to 1000 nm. The ordinary artisan would have been motivated to modify Nimura in view of Ito 086 in the manner set forth above for at least the purpose of reducing the size and increasing the curvature of an inner lens (Ahn, paragraph 0032). Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nimura in view of Ito 086 as applied to claims 1, 2, 4, 6, 7, 10, and 11 above, and further in view of Sugimoto (US Patent Pub 20200075774 A1). Regarding Claim 8, Nimura in view of Ito 086 teaches the electro-optical device according to claim 7, further comprising: a third relay electrode arranged in a layer between the transistor and the second relay electrode (Nimura, Fig. 5, third relay electrode 44 arranged between transistor 24 and the second relay electrode 45); and a third conductive portion configured to electrically couple the second relay electrode and the third relay electrode to each other. (Nimura, fig. 5, third conductive portion (portion of 45 located in CH4) which electrically couples 45 and 44). Nimura in view of Ito 086 fails to teach the second conductive portion and the third conductive portion overlap with each other in plan view. However, Sugimoto teaches an electro-optical device wherein the second conductive portion and the third conductive portion overlap with each other in plan view (Sugimoto, Fig. 5, second conductive portion (the portion of 4d that extends through contact hole 44) and third conductive portion (the portion of 3e that extends through 44) are on directly on top of each other, and therefore would overlap in plan view). It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Sugimoto into the method of Nimura in view of Ito 086 by forming the electro-optical device wherein the second conductive portion and the third conductive portion overlap with each other in plan view. The ordinary artisan would have been motivated to modify Nimura in view of Ito 086 in the manner set forth above for at least the purpose of improving the degree of freedom of a relative positional relationship between layers (Sugimoto, paragraph 0110). Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nimura in view of Ito as applied to claims 1, 2, 4, 6, 7, 10, and 11 above, and further in view of Haruyama (US Patent No. 10942388 B1). Regarding Claim 12, Nimura in view of Ito teaches the electro-optical device according to claim 1, Nimura in view of Ito fails to specifically teach the electro-optical device wherein the pixel electrode, the first relay electrode, the passivation film and the lens layer are arranged in this order in a direction toward the transistor. However, Haruyama teaches an electro-optical device wherein the pixel electrode, the first relay electrode, the passivation film and the lens layer are arranged in this order in a direction toward the transistor (Haruyama, Fig 5 teaches the pixel electrode 9a, the first relay electrode (portion of 9a located in 44a. A portion of 9a is above 48, therefore 9a is on 48), the passivation film 48 (Paragraph 0089 of Applicant’s instant specification teaches the passivation layer can be formed of silicon oxide. Column 7 lines 55-57 teach 48 is formed of silicon oxide. Therefore, 48 is a passivation layer), and lens layer 47 arranged in order in a direction toward the transistor (31a/31b/31c/31g). It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Haruyama into the method of Nimura in view of Ito by forming the electro-optical device wherein the pixel electrode, the first relay electrode, the passivation film and the lens layer are arranged in this order in a direction toward the transistor. The ordinary artisan would have been motivated to modify Nimura in view of Ito in the manner set forth above for at least the purpose of optimizing the arrangement of the device to increase the amount of light emitted, resulting in a bright image (Haruyama, Column 9 lines 30-42). Allowable Subject Matter Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant's arguments filed 07/02/2026 have been fully considered but they are not persuasive. Applicant argues that Ito fails to disclose a first relay electrode arranged in a layer between the lens layer and the pixel electrode and electrically coupled to the pixel electrode via a fist conductive portion, and therefore the combination of Nimura in view of Ito fails disclose the invention of claim 1. However, this is not persuasive. Nimura teaches all features recited in claim 1 except for the passivation film being arranged in a layer between the lens layer and the first relay electrode, as well as fails to teach the second conductive portion extends through the passivation film. Ito teaches a similar electro-optical device that teaches the missing features. Specifically, Nimura teaches a first relay electrode arranged in a layer between the lens layer and the pixel electrode and electrically coupled to the pixel electrode via a first conductive portion (described in detail above), but fails to teach the passivation film is arranged in a layer between the lens layer and the first relay electrode, and that the second conductive portion extends through the passivation film. Ito however teaches a similar electro-optical device wherein a passivation film is arranged in a layer between the lens layer and the first relay electrode and being in contact with the lens layer (Ito, fig. 4, passivation film 34 arranged between the lens layer 33 and the first relay electrode (wiring located to the left of 28 is the first relay electrode). 34 is in contact with 33), and a second conductive portion arranged in a through hole extending through the lens layer and the passivation film and electrically coupled to the first relay electrode (Ito, Fig. 4, second conductive portion (portion that is located to the left of 35 coupled to the first relay electrode and extends downward) extends in a through hole through lens layer 33 and the passivation film 34. The second conductive portion is electrically coupled to the first relay electrode). Thus, the combination of Nimura in view of Ito discloses the invention of claim 1, and it would have been obvious to one of ordinary skill in the art to incorporate the teachings of Ito into the method of Nimura for at least the purpose of improving adhesiveness with respect to the pixel electrodes (Ito, paragraph 0086). Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICENTE R GONZALES whose telephone number is (571)272-3365. The examiner can normally be reached Monday - Friday 7:30 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at (571) 272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /V.R.G./Examiner, Art Unit 2899 /JOHN M PARKER/Primary Examiner, Art Unit 2899
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Prosecution Timeline

Feb 26, 2024
Application Filed
May 21, 2026
Non-Final Rejection mailed — §103
Jul 02, 2026
Response Filed
Sep 16, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12740486
ELECTRONIC DEVICE INCLUDING STACKED SEMICONDUCTOR CHIPS AND METHOD OF MANUFACTURING THE SAME
2y 11m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 1 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
2y 9m (~2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 3 resolved cases by this examiner. Grant probability derived from career allowance rate.

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