DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-9 and 11-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1, 11 and 17 recite the limitation wherein, “the image sensor does not include any micro lens on the first surface of the semiconductor substrate.” Examiner notes that there is no clear definition of “micro lens” in the specification. For example, the substrate 120 in Figs. 4A-4E, itself acts as a micro lens (as stated in para [0075] of the original specification), and is on the first surface of the substrate, thus contradicting the claim limitation. Therefore, it is unclear what the applicant means by “micro lens”, which makes the claims 1, 11 and 17 indefinite and hence rejected. Claims 2-9, 12-16 and 18-20 depend from claims 1, 11 and 17 respectively and inherit the same indefiniteness. For examination purposes, the limitation will be treated such that substrate layer 120 may serve as a micro lens (as stated in para [0075] of the original specification) and the image sensor does not include any additional micro lens on the first surface of the substrate.
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claims 1-2, 4 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record), and further in view of Jung et al. (US 2022/0068981 A1, newly cited).
Re Claim 1, Oshiyama teaches an image sensor (Fig. 11G), comprising:
a semiconductor substrate (10, Fig. 11G, para [0040]) including a first surface (top surface of 10) and a second surface (bottom surface of 10) opposite to the first surface;
an anti-reflection layer (13, Fig. 11G, para [0063]) on the first surface of the semiconductor substrate (top surface of 10); and
a photoelectric converter (11, Fig. 11G, para [0040]) configured to absorb incident light that is incident through the semiconductor substrate (10) and photoelectrically convert the incident light (para [0040]),
wherein the semiconductor substrate (10) includes a refraction pattern (square-wave pattern, Fig. 11G, para [0040]) on the first surface of the semiconductor substrate (top surface of 10), the refraction pattern configured to refract the incident light (see para [0040]), and
wherein the image sensor does not include any micro lens on the first surface of the semiconductor substrate (no lens on top surface of 10, see Fig. 11G).
Oshiyama is silent about the limitation wherein the photoelectric converter includes quantum dots. Oshiyama discloses that the photoelectric converter can be a photodiode (11, PIN type photodiode, para [0057]).
Related art, Jung teaches that the photoelectric converter can be a photodiode or a combination of quantum dot and photodiode (para [0055]). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the photoelectric converter of Oshiyama, such that it is a combination of quantum dot and photodiode as taught by Jung. The photoelectric converter can simply be a photodiode or a combination of quantum dot and photodiode (Jung, para [0055]), and one of ordinary skill would realize that these are art-recognized alternate structures for a photoelectric converter. The use of a known photoelectric converter for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Re Claim 2, Oshiyama modified by Jung teaches the image sensor of claim 1, wherein the photoelectric converter includes at least one of PbS, PbSe, InAs, InGaAs, Ag2Se or CaTiO3 (the substrate is made of InGaAs, within which the photo-electric converter is embedded by doping the substrate, para [0057], Oshiyama).
Re Claim 4, Oshiyama modified by Jung teaches the image sensor of claim 1, further comprising:
an interlayer insulating layer (12, Fig. 11G, paras [0040], Oshiyama) between the semiconductor substrate (10) and the anti-reflection layer (13),
wherein the refraction pattern of the semiconductor substrate (square-wave pattern on top surface of 10, see Fig. 11G, Oshiyama) is in contact with the interlayer insulating layer (12).
Re Claim 9, Oshiyama modified by Jung teaches the image sensor of claim 1, wherein the photoelectric converter (photodiode 11 is PIN type, para [0057], Oshiyama) comprises:
an electron transport layer (n-type region of PIN-type photodiode, para [0057], Oshiyama) on the second surface of the semiconductor substrate (bottom surface of 10);
an absorption layer (intrinsic region of the PIN-type photodiode, para [0057], Oshiyama) on the electron transport layer; and
a hole transport layer (p-type region of PIN-type photodiode, para [0057], Oshiyama) on the absorption layer.
Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record) and Jung et al. (US 2022/0068981 A1, newly cited), and further in view of Kobayashi et al. (US 2012/0062777 A1, of record).
Re Claim 5, Oshiyama modified by Jung teaches the image sensor of claim 1, further comprising:
a conductive layer (20, Fig. 11G, para [0069], Oshiyama) on the photoelectric converter (11);
a plurality of conductive patterns (21+22+23, Figs. 1 and 11G para [0069], Oshiyama); and
an insulating layer (24, Figs. 1 and 11G, para [0069], Oshiyama) covering the plurality of conductive patterns (21+22+23, see Figs. 1 and 11G).
Oshiyama does not explicitly show a conductive path for transmitting an electrical signal between the photoelectric converter and the conductive layer.
One of ordinary skill would look into related art to find the details of the electrical connection. Related art, Kobayashi shows how a photodiode (PD, Fig. 3) is electrically connected to the multilayer wiring layer (41, Fig. 1, para [0067]). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the teachings Kobayashi into the device of Oshiyama to provide a conductive path for transmitting electrical signals between the photodiode and the wiring layers.
Re Claim 6, Oshiyama modified by Jung and Kobayashi teaches the image sensor of claim 5, wherein the semiconductor substrate (10, Fig. 11G, Oshiyama) includes a circuit area (drive circuit and control circuit, Fig. 2, Oshiyama) spaced apart from the photoelectric converter (pixel area 100A, Fig. 2) in a first direction (see Fig. 2, Oshiyama).
Oshiyama does not explicitly show that the circuit area is between the insulating layer and the anti-reflection layer.
One of ordinary skill would look into related art to find the details on how the circuit area is formed. Related art, Kobayashi shows a detailed cross-sectional view on how the circuit section (24, Fig. 3, para [0059]) is formed which is spaced apart from the photodiode (PD, Fig. 3) in a horizontal direction, where the circuits (transistors, Tr3 and Tr4, Fig. 3) are formed between the insulating layer (insulating layer 39, Fig. 3) and the anti-reflection layer (reflection prevention film 61, Fig. 3, para [0068]). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the teachings Kobayashi into the device of Oshiyama on how to build a control circuit which will control the functionalities of the photodiodes.
Re Claim 7, Oshiyama modified by Jung and Kobayashi teaches the image sensor of claim 6,
wherein the plurality of conductive patterns includes an upper conductive pattern (conductive layer 40, Fig. 3, para [0072], Kobayashi, similar to 21+22+23, Figs. 1 and 11G of Oshiyama), and
the upper conductive pattern (conductive layer 40, Fig. 3, Kobayashi) extends from the photoelectric converter (PD, Fig. 3, Kobayashi) onto the circuit area (circuit section 24, Fig. 3, Kobayashi) in the first direction (horizontal direction, Fig. 3, Kobayashi).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record) and Jung et al. (US 2022/0068981 A1, newly cited), and further in view of Masuda et al. (US 2023/0057090 A1, of record).
Re Claim 8, Oshiyama modified by Jung teaches the image sensor of claim 1, teaches that the semiconductor substrate (10, Fig. 11G, Oshiyama) is in contact with the photoelectric converter (11, Fig. 11G)
Oshiyama does not explicitly disclose that the semiconductor substrate includes a doped layer that is in contact with the photoelectric converter and includes P-type impurities.
However, related semiconductor art Masuda teaches that the substrate (substrate 2, Fig. 3, para [0041]) is usually p-type doped semiconductor (see Fig. 3), as that would be required to complete the circuit for the p-n/p-i-n photodiode. It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, that the substrate of Oshiyama has to be p-doped as taught by Masuda, as that would be required to complete the circuit for the p-n/p-i-n photodiode.
Claims 11, 13 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record), and further in view of Jung et al. (US 2022/0068981 A1, newly cited) and Toda et al. (US 2015/0373243 A1, newly cited).
Re Claim 11, Oshiyama teaches an image sensor (Fig. 11G), comprising:
a semiconductor substrate (10, Fig. 11G, para [0040]) including a first surface (top surface of 10) and a second surface (bottom surface of 10) opposite to the first surface;
an anti-reflection layer (13, Fig. 11G, para [0063]) on the first surface of the semiconductor substrate (top surface of 10);
an interlayer insulating layer (12, Fig. 11G, paras [0040]) between the semiconductor substrate (10) and the anti-reflection layer (13); and
a photoelectric converter (11, Fig. 11G, para [0040]) configured to absorb incident light that is incident through the semiconductor substrate (10) and photoelectrically convert the incident light (para [0040]),
wherein the photoelectric converter (photodiode 11 is PIN type, para [0057]) includes
an electron transport layer (n-type region of PIN-type photodiode, para [0057]) on the second surface of the semiconductor substrate (bottom surface of 10),
an absorption layer (intrinsic region of the PIN-type photodiode, para [0057]) on the electron transport layer, and
a hole transport layer (p-type region of PIN-type photodiode, para [0057]) on the absorption layer,
wherein the semiconductor substrate (10) includes a refraction pattern (square-wave pattern, Fig. 11G, para [0040]) on the first surface of the semiconductor substrate (top surface of 10), the refraction pattern contacting the interlayer insulating layer (12, see Fig. 11G), and
wherein the image sensor does not include any micro lens on the first surface of the semiconductor substrate (no lens on top surface of 10, see Fig. 11G).
Oshiyama is silent about the limitation wherein the absorption layer of the photoelectric converter includes quantum dots.
Related art, Jung teaches that the photoelectric converter can be a photodiode or a combination of quantum dot and photodiode (para [0055], Jung). For example, Toda teaches a similar photoelectric conversion unit (Fig. 25, paras [0359] – [0389]) which includes an electron transport layer (413, Fig. 25, which can be a n-type layer, para [0380]), a hole transport layer (415, Fig. 25, which can be a p-type layer, para [0385]), and an absorption layer (414, Fig. 25) in between, where the absorption layer includes quantum dots (Fig. 25, para [0383]) because high quantum efficiency of light reception can be obtained using quantum dots (para [0383]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the photoelectric converter of Oshiyama, such that it is a combination of quantum dot and photodiode as taught by Jung and Toda. The photoelectric converter can simply be a photodiode or a combination of quantum dot and photodiode (Jung, para [0055]), and one of ordinary skill would realize that these are art-recognized alternate structures for a photoelectric converter. The use of a known photoelectric converter for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007). Furthermore, the quantum dots will be present in the absorption layer as taught by Toda, because high quantum efficiency of light reception can be obtained using quantum dots (para [0383], Toda).
Re Claim 13, Oshiyama modified by Jung and Toda teaches the image sensor of claim 11, wherein
the image sensor does not include any transparent electrode on the first surface or the second surface of the semiconductor substrate (no transparent electrode on top or bottom surfaces of substrate 10, see Fig. 11G, Oshiyama).
Re Claim 15, Oshiyama modified by Jung and Toda teaches the image sensor of claim 11, wherein the refraction pattern includes any one of a triangular shape, a square shape, a lens shape, or a wave pattern shape (square-wave pattern on top surface of 10, see Fig. 11G, Oshiyama).
Re Claim 16, Oshiyama modified by Jung and Toda teaches the image sensor of claim 11, wherein at least the second surface of the semiconductor substrate is planar (bottom surface of substrate 10 is planar, see Fig. 11G, Oshiyama).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record), Jung et al. (US 2022/0068981 A1, newly cited) and Toda et al. (US 2015/0373243 A1, newly cited), and further in view of Kobayashi et al. (US 2012/0062777 A1, of record).
Re Claim 12, Oshiyama modified by Jung and Toda teaches the image sensor of claim 11, further comprising:
a conductive layer (20, Fig. 11G, para [0069], Oshiyama) on the hole transport layer (p-type region of PIN-type photodiode 11);
a plurality of conductive patterns (21+22+23, Figs. 1 and 11G para [0069], Oshiyama); and
an insulating layer (24, Figs. 1 and 11G, para [0069], Oshiyama) partially covering the plurality of conductive patterns (21+22+23, see Figs. 1 and 11G),
wherein the plurality of conductive patterns (21+22+23, Figs. 1 and 11G, Oshiyama) includes at least one of Al, Ag, Cu, or Au (wiring layers 21+22+23 can be made of copper, para [0070], Oshiyama).
Oshiyama does not explicitly show a conductive path for transmitting an electrical signal between the photoelectric converter and the conductive layer.
One of ordinary skill would look into related art to find the details of the electrical connection. Related art, Kobayashi shows how a photodiode (PD, Fig. 3) is electrically connected to the multilayer wiring layer (41, Fig. 1, para [0067]). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the teachings Kobayashi into the device of Oshiyama to provide a conductive path for transmitting electrical signals between the photodiode and the wiring layers.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record), Jung et al. (US 2022/0068981 A1, newly cited) and Toda et al. (US 2015/0373243 A1, newly cited), and further in view of Lee et al. (US 2019/0260952 A1, newly cited).
Re Claim 14, Oshiyama modified by Jung and Toda teaches the image sensor of claim 11, but does not explicitly disclose that
the absorption layer includes at least one of PbS, PbSe, InAs, InGaAs, Ag2Se, or CaTiO3, and
the absorption layer is configured to absorb infrared rays incident on the first surface of the semiconductor substrate.
Toda discloses that the absorption layer includes quantum dots like CdSe, CdS, InP, ZnSe, ZnTe, GaAs (para [0383]). Related art, Lee teaches that the quantum dots may include PbSe, PbS, InSe, CdSe, CdTe, CdS, InP, InSe, ZnO, ZnSe, ZnS, InAs, or GaS, or a combination thereof (para [0147]), and the quantum dots can absorb light of wavelength of 940 nm (para [0147]) which is within infrared range.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the absorption layer of Oshiyama modified by Jung and Toda, such that the quantum dots include materials like PbSe, PbS or InAs as taught by Lee. Lee teaches that PbSe, PbS, InSe, CdSe, CdTe, CdS, InP, InSe, ZnO, ZnSe, ZnS, InAs, or GaS are art-recognized alternate materials for quantum dots for absorption layer and one of ordinary skill would find it obvious to substitute PbS, PbSe or InAs in place of CdSe, CdS or InP. The use of a known quantum dot materials for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Claims 17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record), and further in view of Jung et al. (US 2022/0068981 A1, newly cited), Toda et al. (US 2015/0373243 A1, newly cited) and Lee et al. (US 2019/0260952 A1, newly cited).
Re Claim 17, Oshiyama teaches An image sensor, comprising:
a semiconductor substrate (10, Fig. 11G, para [0040]) including a first surface (top surface of 10) and a second surface (bottom surface of 10) opposite to the first surface;
an anti-reflection layer (13, Fig. 11G, para [0063]) on the first surface of the semiconductor substrate (top surface of 10);
an interlayer insulating layer (12, Fig. 11G, paras [0040]) between the semiconductor substrate (10) and the anti-reflection layer (13); and
a photoelectric converter (11, Fig. 11G, para [0040]) configured to absorb incident light that is incident through the semiconductor substrate (10) and photoelectrically convert the incident light (para [0040]),
wherein the photoelectric converter (photodiode 11 is PIN type, para [0057]) includes
an electron transport layer (n-type region of PIN-type photodiode, para [0057]) on the second surface of the semiconductor substrate (bottom surface of 10),
an absorption layer (intrinsic region of the PIN-type photodiode, para [0057]) on the electron transport layer, and
a hole transport layer (p-type region of PIN-type photodiode, para [0057]) on the absorption layer,
wherein the absorption layer is configured to absorb infrared rays (the device in Fig. 11G can detect infrared rays, para [0107]) incident on the first surface of the semiconductor substrate (top surface of 10).
wherein the semiconductor substrate (10) includes a refraction pattern (square-wave pattern, Fig. 11G, para [0040]) on the first surface of the semiconductor substrate (top surface of 10) and in contact with the interlayer insulating layer (12, see Fig. 11G),
wherein the refraction pattern includes any one of a triangular shape, a square shape, a lens shape, or a wave pattern shape (square-wave pattern on top surface of 10, see Fig. 11G), and
wherein the image sensor does not include any micro lens on the first surface of the semiconductor substrate (no lens on top surface of 10, see Fig. 11G).
Oshiyama is silent about the limitation wherein the absorption layer of the photoelectric converter includes quantum dots, and that includes one of PbS, PbSe, InAs, InGaAs, Ag2Se, or CaTiO3.
Related art, Jung teaches that the photoelectric converter can be a photodiode or a combination of quantum dot and photodiode (para [0055], Jung). For example, Toda teaches a similar photoelectric conversion unit (Fig. 25, paras [0359] – [0389]) which includes an electron transport layer (413, Fig. 25, which can be a n-type layer, para [0380]), a hole transport layer (415, Fig. 25, which can be a p-type layer, para [0385]), and an absorption layer (414, Fig. 25) in between, where the absorption layer includes quantum dots (Fig. 25, para [0383]) because high quantum efficiency of light reception can be obtained using quantum dots (para [0383]).
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the photoelectric converter of Oshiyama, such that it is a combination of quantum dot and photodiode as taught by Jung and Toda. The photoelectric converter can simply be a photodiode or a combination of quantum dot and photodiode (Jung, para [0055]), and one of ordinary skill would realize that these are art-recognized alternate structures for a photoelectric converter. The use of a known photoelectric converter for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007). Furthermore, the quantum dots will be present in the absorption layer as taught by Toda, because high quantum efficiency of light reception can be obtained using quantum dots (para [0383], Toda).
Oshiyama modified by Jung and Toda does not explicitly state the quantum dots include one of PbS, PbSe, InAs, InGaAs, Ag2Se, or CaTiO3.
Toda discloses that the absorption layer includes quantum dots like CdSe, CdS, InP, ZnSe, ZnTe, GaAs (para [0383]). Related art, Lee teaches that the quantum dots may include PbSe, PbS, InSe, CdSe, CdTe, CdS, InP, InSe, ZnO, ZnSe, ZnS, InAs, or GaS, or a combination thereof (para [0147], Lee), and the quantum dots can absorb light of wavelength of 940 nm (para [0147]) which is within infrared range.
It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the absorption layer of Oshiyama modified by Jung and Toda, such that the quantum dots include materials like PbSe, PbS or InAs as taught by Lee. Lee teaches that PbSe, PbS, InSe, CdSe, CdTe, CdS, InP, InSe, ZnO, ZnSe, ZnS, InAs, or GaS are art-recognized alternate materials for quantum dots for absorption layer and one of ordinary skill would find it obvious to substitute PbS, PbSe or InAs in place of CdSe, CdS or InP. The use of a known quantum dot materials for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Re Claim 19, Oshiyama modified by Jung, Toda and Lee teaches the image sensor of claim 17, wherein the absorption layer is configured to absorb infrared rays of any one wavelength in a range of about 780 nm to about 3000 nm (absorption layer include quantum dots like PbSe, PbS or InAs, which can absorb light of wavelength of about 940 nm, which is within infrared range, para [0147], Lee).
Re Claim 20, Oshiyama modified by Jung, Toda and Lee teaches the image sensor of claim 17, wherein
the image sensor does not include any transparent electrode on the first surface or the second surface of the semiconductor substrate (no transparent electrode on top or bottom surfaces of substrate 10, see Fig. 11G, Oshiyama), and
at least the second surface of the semiconductor substrate is planar (bottom surface of substrate 10 is planar, see Fig. 11G, Oshiyama).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record), Jung et al. (US 2022/0068981 A1, newly cited), Toda et al. (US 2015/0373243 A1, newly cited) and Lee et al. (US 2019/0260952 A1, newly cited), and further in view of Kobayashi et al. (US 2012/0062777 A1, of record).
Re Claim 18, Oshiyama modified by Jung, Toda and Lee teaches the image sensor of claim 17, wherein the image sensor further includes
a conductive layer (20, Fig. 11G, para [0069], Oshiyama) on the hole transport layer (p-type region of PIN-type photodiode 11),
a plurality of conductive patterns (21+22+23, Figs. 1 and 11G para [0069], Oshiyama), and
an insulating layer (24, Figs. 1 and 11G, para [0069], Oshiyama) partially covering the plurality of conductive patterns (21+22+23, see Figs. 1 and 11G, Oshiyama),
the semiconductor substrate (10) includes a circuit area (drive circuit and control circuit, Fig. 2, Oshiyama) spaced apart from the photoelectric converter (pixel area 100A, Fig. 2, Oshiyama) in a first direction (see Fig. 2), and
the plurality of conductive patterns includes at least one of Al, Ag, Cu, or Au (wiring layers 21+22+23 can be made of copper, para [0070], Oshiyama),
the plurality of conductive patterns (21+22+23, Figs. 1 and 11G, Oshiyama) includes an upper conductive pattern (23, Figs. 1 and 11G).
Oshiyama does not explicitly show a conductive path for transmitting an electrical signal between the photoelectric converter and the conductive layer.
One of ordinary skill would look into related art to find the details of the electrical connection. Related art, Kobayashi shows how a photodiode (PD, Fig. 3) is electrically connected to the multilayer wiring layer (41, Fig. 1, para [0067]). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the teachings Kobayashi into the device of Oshiyama to provide a conductive path for transmitting electrical signals from the photodiode to the wiring layers.
Additionally, Oshiyama also does not explicitly show that that the circuit area is between the insulating layer and the anti-reflection layer, and that an upper conductive pattern extends from the photoelectric converter onto the circuit area in the first direction.
One of ordinary skill would look into related art to find the details on how the circuit area is formed and how it controls the photodetector. Related art, Kobayashi shows a detailed cross-sectional view on how the circuit area (circuit section 24, Fig. 3, para [0059]) is formed which is spaced apart from the photodiode (PD, Fig. 3) in a horizontal direction, where the circuits (transistors, Tr3 and Tr4, Fig. 3) are formed between the insulating layer (insulating layer 39, Fig. 3) and the anti-reflection layer (reflection prevention film 61, Fig. 3, para [0068]), and a conductive pattern (conductive layer 40, Fig. 3, para [0072]) extends from the photodiode (PD, Fig. 3) onto the circuit area (circuit section 24, Fig. 3) in the first direction (horizontal direction, Fig. 3). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to incorporate the teachings Kobayashi into the device of Oshiyama on how to build a control circuit which will control the functionalities of the photodiodes.
Rejection 2
Claims 1 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Oshiyama et al. (US 2023/0335656 A1, of record), and further in view of Jung et al. (US 2022/0068981 A1, newly cited).
Re Claim 1 (Rejection-2), Oshiyama teaches an image sensor (Fig. 1), comprising:
a semiconductor substrate (10, Fig. 11G, para [0040]) including a first surface (top surface of 10) and a second surface (bottom surface of 10) opposite to the first surface;
an anti-reflection layer (12+13, Fig. 11G, paras [0040] and [0063], Examiner notes that an anti-reflection layer can include any layer that allows light, the claim limitation does not preclude this treatment) on the first surface of the semiconductor substrate (top surface of 10); and
a photoelectric converter (11, Fig. 11G, para [0040]) configured to absorb incident light that is incident through the semiconductor substrate (10) and photoelectrically convert the incident light (para [0040]),
wherein the semiconductor substrate (10) includes a refraction pattern (square-wave pattern, Fig. 11G, para [0040]) on the first surface of the semiconductor substrate (top surface of 10), the refraction pattern configured to refract the incident light (see para [0040]), and
wherein the image sensor does not include any micro lens on the first surface of the semiconductor substrate (no lens on top surface of 10, see Fig. 11G).
Oshiyama is silent about the limitation wherein the photoelectric converter includes quantum dots. Oshiyama discloses that the photoelectric converter can be a photodiode (11, PIN type photodiode, para [0057]).
Related art, Jung teaches that the photoelectric converter can be a photodiode or a combination of quantum dot and photodiode (para [0055]). It would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, absent unexpected results, to modify the photoelectric converter of Oshiyama, such that it is a combination of quantum dot and photodiode as taught by Jung. The photoelectric converter can simply be a photodiode or a combination of quantum dot and photodiode (Jung, para [0055]), and one of ordinary skill would realize that these are art-recognized alternate structures for a photoelectric converter. The use of a known photoelectric converter for its known purpose to yield predictable results is prima facie obvious. Also see KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Re Claim 3, Oshiyama modified by Jung teaches the image sensor of claim 1 (Rejection-2), wherein
the refraction pattern of the semiconductor substrate (square-wave pattern on top surface of 10, see Fig. 1, Oshiyama) is in contact with the anti-reflection layer (12+13, see Fig. 1), and
the refraction pattern of the semiconductor substrate includes any one of a triangular shape, a square shape, a lens shape, or a wave pattern shape (square-wave pattern, see Fig. 1).
Response to Arguments
Applicant’s arguments with respect to claims 1, 11 and 17 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PINAKI DAS whose telephone number is (703)756-5641. The examiner can normally be reached M-F 8-5 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JULIO MALDONADO can be reached at (571)272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/P.D./Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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