Prosecution Insights
Last updated: August 16, 2026
Application No. 18/587,461

SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS

Non-Final OA §103§Other
Filed
Feb 26, 2024
Priority
Aug 30, 2021 — JP 2021-139780 +1 more
Examiner
WIEGAND, TYLER J
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co., Ltd.
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
74 granted / 99 resolved
+6.7% vs TC avg
Moderate +10% lift
Without
With
+9.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 5m
Avg Prosecution
37 currently pending
Career history
131
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
41.5%
+1.5% vs TC avg
§102
32.2%
-7.8% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 99 resolved cases

Office Action

§103 §Other
DETAILED ACTION This action is responsive to the election received on 06/11/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election of Invention I (claims 1-11) in the reply filed on 06/11/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Claim(s) 12-15 is/are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Priority Acknowledgment is made of applicant's claim for priority under 35 U.S.C. 119(a)-(d) or (f), 365(a) or (b), or 386(a) based upon an application filed in JAPAN on 08/30/2021. Information Disclosure Statement The information disclosure statement (IDS) submitted on 02/26/2024 has/have been considered by the examiner and made of record in the application file. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-4 and 6-11 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2010/0270483 A1; Omura, Eiichi; 10/2010; (“Omura”) in view of US 2017/0271229 A1; Santos et al.; 09/2017; (“Santos”). Regarding Claim 1. Omura discloses A semiconductor device (#31, Figure 4, optical coupler which is interpreted as a semiconductor device as it is tested with a semiconductor tester according to [0066], Figure 5 is a top down view according to [0046]) comprising: a first lead (#32, Figure 4, lead frame) including a first die pad (#32a, Figure 4, element mounting section) having a first obverse surface (Figure 4, top surface of #32a) and a first reverse surface (Figure 4, bottom surface of #32a) facing away from each other in a thickness direction (Figure 4, top and bottom surfaces face away from one another in a thickness direction of #32a); a second lead (#33, Figure 4, lead frame) including a second die pad (#33a, Figure 4, element mounting section) having a second obverse surface (Figure 4, top surface of #33a) facing a same side as the first obverse surface in the thickness direction (Figure 4, both top surfaces of #32a and #33a face upward in the thickness direction) and a second reverse surface (Figure 4, bottom surface of #33a) facing a same side as the first reverse surface in the thickness direction (Figure 4, both bottom surfaces of #32a and #33a face downward in the thickness direction); a light-emitting element (#34, Figure 4, light emitting element) mounted on the first obverse surface (Figure 4, #34 is mounted on the top surface of #32a); a light-receiving element (#35, Figure 4, light receiving element) mounted on the second obverse surface (Figure 4, #35 is mounted on the top surface of #33a); a transparent resin (#36, Figure 4, transparent resin) covering at least a portion of each of the light-emitting element and the light-receiving element (Figure 4, #36 covers at least a portion of #34 and #35); and a first resin (#48, Figure 4, reflective resin layer) covering the transparent resin (Figure 4, #48 at least partially covers a top surface of #36), wherein the transparent resin includes a transparent-resin obverse surface facing a same side as the first obverse surface in the thickness direction (Figure 4, top surface of #36 faces a same side as the top surface of #32a in the thickness direction), and a transparent-resin reverse surface facing a same side as the first reverse surface in the thickness direction (Figure 4, bottom surface of #36 faces a same side as the bottom surface of #32a in the thickness direction). Omura does not explicitly disclose that the transparent-resin reverse surface has a surface roughness larger than a surface roughness of the transparent-resin obverse surface. Santos teaches a semiconductor device (#100, Figure 13, electronic component) including a semiconductor chip (#104, electronic chip) on a top surface of a lead (#102, lead frame conductive chip carrier) and embedded in a resin (#106, encapsulant which may be a resin according to [0033]) and the bottom surface of the resin has a surface roughness larger than the surface roughness of the upper surface of the resin (Figures 8-13, [0027] and [0064], the bottom surface of the encapsulant may be roughened relative to the rest of the encapsulant). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to consider roughening the bottom surface of the transparent resin relative to the upper surface of the transparent resin in Omura as was done by Santos since the added roughness provides greater adhesion with the underlying structure to provide better sealing quality and protection of the encapsulated devices (see [0011] of Santos) Regarding Claim 2. Omura in view of Santos discloses The semiconductor device according to claim 1, wherein the transparent resin (Santos, #36, Figure 4) includes a portion offset from the first reverse surface toward a side in which the first reverse surface faces, between the first die pad and the second die pad as viewed in the thickness direction (Santos, Figure 4, #36 includes a portion which is offset from the bottom surface of #32a towards the bottom surface of the device, which the bottom surface of #32a faces, that is located at least partially between #32a and #33a when viewed in the thickness direction, see Figure 5). Regarding Claim 3. Omura in view of Santos discloses The semiconductor device according to claim 2, wherein the transparent resin (Santos, #36, Figure 4) covers at least a portion of the first reverse surface and the second reverse surface (Santos, Figure 4, #36 covers at least a portion of the bottom surfaces of both #32a and #33a). Regarding Claim 4. Omura in view of Santos discloses The semiconductor device according to claim 1, wherein a portion of the light-receiving element is exposed from the transparent resin (Santos, Figure 4, a portion of #35 is exposed from #36 where #39 extends through #36 to make contact). Regarding Claim 6. Omura in view of Santos discloses The semiconductor device according to claim 1, wherein the first resin (Santos, #48, Figure 4) comprises a white resin (Santos, [0058], “the light reflective resin layer 48 covering the top surface of the transparent resin 36 is formed of a material suitable for reflection of an optical signal. For instance, a colored resin having a high reflectivity (mainly, a white resin filled with a material having a good reflectivity, such as titanium oxide) may be used”, i.e. #48 comprises a white resin). Regarding Claim 7. Omura in view of Santos discloses The semiconductor device according to claim 1, wherein the first die pad (Santos, #32a, Figures 4 and 5) includes a first opposing surface facing the second die pad (Santos, Figure 5, leftmost surface of #32a facing #33a), and two first side surfaces (Santos, Figure 5, top and bottom surface of #32a) connected to the first obverse surface, the first reverse surface, and the first opposing surface (Santos, Figures 4 and 5, the top and bottom surfaces of #32a in the Figure 5 view are necessarily connected to the top and bottom surfaces in the Figure 4 view and the surface facing #33a), and as viewed in the thickness direction, an interface between the transparent resin and the first resin protrudes outward from the two side surfaces (Santos, [0056]-[0058], [0066], Figures 4 and 5, the entire top surface of #36 is covered by #48 such that the contact interface between #36 and #48 protrudes outward from the side surfaces of #32a since #36 protrudes outward from the side surfaces). Regarding Claim 8. Omura in view of Santos discloses The semiconductor device according to claim 7, wherein the transparent resin covers an entirety of the first opposing surface (Santos, Figures 4 and 5, #36 covers an entirety of the surface of #32a facing #33a based on the views in Figures 4 and 5). Regarding Claim 9. Omura in view of Santos discloses The semiconductor device according to claim 1, wherein the second die pad includes a second opposing surface facing the first die pad (Santos, Figure 5, rightmost surface of #33a facing #32a), and the transparent resin covers an entirety of the second opposing surface (Santos, Figures 4 and 5, #36 covers an entirety of the surface of #33a facing #32a based on the views in Figures 4 and 5). Regarding Claim 10. Omura in view of Santos discloses The semiconductor device according to claim 1, wherein a first dimension of the transparent resin in a first direction that is perpendicular to the thickness direction and in which the light-emitting element and the light-receiving element are aligned (Santos, Figures 4 and 5, the width in the left-right direction of Figure 5 of the portion of #36 between #32a and #33a which is in a direction perpendicular to the thickness direction and is the direction #34 and #35 are aligned in) is smaller than a second dimension of the transparent resin in a second direction perpendicular to the thickness direction and the first direction (Santos, Figures 4 and 5, the greatest width in the up-down direction of Figure 5 of the portion of #36 protruding from either side of #33a which is perpendicular to both the thickness and left-right directions of Figure 5) (Santos, Figure 5, the width in the left-right direction of Figure 5 of the portion of #36 between #32a and #33a is smaller than the up-down width of #36 protruding from either side of #33a). Regarding Claim 11. Omura in view of Santos discloses The semiconductor device according to claim 10, further comprising a third resin (Santos, #37, Figure 4, sealing resin) covering an entirety of the first resin (Figure 4, #37 covers the entirety of #48 based on [0056] stating that only end sections of the lead frames are left unsealed), wherein a third dimension of the first resin in the first direction is smaller than a fourth dimension of the first resin in the second direction (Santos, Figures 4 and 5, a horizontal thickness of #48 in the left right direction of #48 in Figure 4 is smaller than a total width of #48 in the up-down direction of Figure 5 or the in/out of the page direction in Figure 4 as #48 is formed as only a thin layer but covers the entire upper surface of #36). Allowable Subject Matter Claim(s) 5 is/are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: None of the cited prior art, either alone or in combination, teaches “the second resin is arranged in contact with the element obverse surface” as recited in claim 5 and in combination with all of the other required limitations of the claim. Regarding Claim 5. Omura in view of Santos discloses The semiconductor device according to claim 4, further comprising a second resin (Santos, #37, Figure 4, sealing resin), wherein the light-receiving element includes an element obverse surface (Santos, Figure 4, top surface of #35) facing a same side as the first obverse surface (Santos, Figure 4, both top surfaces of #32a and #35 face upward in the thickness direction), and the second resin is arranged in contact with the transparent resin and the first resin (Santos, Figure 4, #37 is in contact with #48 and #36). Omura in view of Santos do not disclose that the second resin is arranged in contact with the element obverse surface. Figures 4 and 5 of Santos do not show #37 as being in contact with the top surface of #35. This is further not interpreted by the examiner as an obvious change in shape and/or size (MPEP 2144.04.IV) since the instant application has shown the particular configuration to be significant over the prior art. In particular, page 18 of the instant application states “the white resin 62 stops the flow of the fluidized material of the transparent resin 5 during the formation of the transparent resin 5. As such, the transparent resin 5 is formed to cover the light-receiving section 121a and not to cover the circuit forming section 121b”, i.e. the second resin in contact with the top surface of the light receiving element controls the extent of coverage of the light receiving element by the subsequently formed transparent resin to prevent its formation over the circuit forming section. Therefore, claim 5 is interpreted as containing allowable subject matter and would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2021/0080320 A1; Roth, Alexander; 03/2021 – Figure 2 discloses a semiconductor device including a light emitting element (#102) and a light receiving element (#106) which are encased in a transparent resin (#112) wherein the light receiving element is electrically coupled to a control unit (#110) which is not covered by the transparent resin. However, the control unit is a separate element which is separated from the light receiving element in order to prevent coverage by the transparent resin. US 2020/0203551 A1; Chew et al.; 06/2020 – Figures 4 and 6 disclose a semiconductor device including a light emitting element (#21) and a light receiving element (#22) which are encased in a transparent resin (#23) wherein the largest lateral extent of the transparent resin in a direction parallel to the alignment of #21 and #22 is smaller than the largest lateral extent of the transparent resin in the perpendicular lateral direction (see Figure 6). US 2024/0113238 A1; Arimura et al.; 04/2024 – Figure 3 discloses a semiconductor device including a light emitting element (#20) and a light receiving element (#30) which are encased in a transparent resin (#60) wherein the light receiving element is only partially covered by the transparent resin to allow light only to reach the light receiving surface (#33) (see [0141]). However, the reference does not appear to describe a second resin which is in contact with the upper surface of the light receiving element (#30), the transparent resin (#60), and the first white resin (#70, [0154]). US 2011/0211790 A1; Kubota, Tetsuro; 09/2011 – Figures 4-22 disclose various semiconductor device including light emitting elements (#34) and a light receiving element (#35) which are encased in a transparent resin (#23) with further description of how the orientation and the dimensions of the transparent resin can influence the operational parameters of the device due to changing light reflection behavior. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TYLER JAMES WIEGAND whose telephone number is (571)270-0096. The examiner can normally be reached Mon-Fri. 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHRISTINE KIM can be reached at (571) 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TYLER J WIEGAND/Examiner, Art Unit 2812
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Prosecution Timeline

Feb 26, 2024
Application Filed
Jul 17, 2026
Non-Final Rejection mailed — §103, §Other (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
84%
With Interview (+9.8%)
3y 5m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 99 resolved cases by this examiner. Grant probability derived from career allowance rate.

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