CTNF 18/589,172 CTNF 101964 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 12-151 AIA 26-51 12-51 Status of Claims Claims 1-20 are pending, as originally filed. Claims 1-14 are elected and claims 15-20 are withdrawn from consideration, as noted in the phone election discussed below. An action on the merits for Claims 1-14 follows. Election/Restrictions This application contains claims directed to the following patentably distinct species: Species I, corresponding to at least figure 1 (described in at least paragraphs 0027-0039): drawn to a package and substrate comprising a passive interposer between an integrated device and board, classified in H10W70/60. Claims 1-14 appear to correspond to this species. Species II, corresponding to at least figure 9 (described in at least paragraphs 0052-0065): drawn to a package comprising an active interposer surrounded by an encapsulant connecting devices to a board, classified in H10W70/60. Claims 15-20 appear to correspond to this species. The species are independent or distinct because the claims to the different species recite the mutually exclusive characteristics of such species such that the structure of the connecting substrate is substantially different between the embodiments. That is, a package wherein a passive interposer connects to an integrated device with no encapsulation layer and not itself including an integrated device; and a package wherein an active interposer contains an active device, is covered by an encapsulation layer, and connects multiple devices to a board. Currently, no claims appear to be generic. Applicant is required under 35 U.S.C. 121 to elect a single disclosed species, or a single grouping of patentably indistinct species, for prosecution on the merits to which the claims shall be restricted if no generic claim is finally held to be allowable. There is a serious search and/or examination burden for the patentably distinct species as set forth above because at least the following reason(s) apply: The inventions have acquired a separate status in the art in view of their different classification; The inventions have acquired a separate status in the art due to their recognized divergent subject matter; and/or 08-01 The inventions require a different field of search (e.g., searching different classes/subclasses or electronic resources, or employing different search strategies or search queries). In the instant case, search for a package with an encapsulation layer between two substrates and containing an integrated device is unlikely to result in finding a package with a substrate and core layer not including an encapsulation layer or an integrated device. Applicant is advised that the reply to this requirement to be complete must include (i) an election of a species to be examined even though the requirement may be traversed (37 CFR 1.143) and (ii) identification of the claims encompassing the elected species or grouping of patentably indistinct species, including any claims subsequently added. An argument that a claim is allowable or that all claims are generic is considered nonresponsive unless accompanied by an election. The election may be made with or without traverse. To preserve a right to petition, the election must be made with traverse. If the reply does not distinctly and specifically point out supposed errors in the election of species requirement, the election shall be treated as an election without traverse. Traversal must be presented at the time of election in order to be considered timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are added after the election, applicant must indicate which of these claims are readable on the elected species or grouping of patentably indistinct species. Should applicant traverse on the ground that the species, or groupings of patentably indistinct species from which election is required, are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing them to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the species unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other species. Upon the allowance of a generic claim, applicant will be entitled to consideration of claims to additional species which depend from or otherwise require all the limitations of an allowable generic claim as provided by 37 CFR 1.141. Applicant is reminded that upon the cancelation of claims to a non-elected invention, the inventorship must be corrected in compliance with 37 CFR 1.48(a) if one or more of the currently named inventors is no longer an inventor of at least one claim remaining in the application. A request to correct inventorship under 37 CFR 1.48(a) must be accompanied by an application data sheet in accordance with 37 CFR 1.76 that identifies each inventor by his or her legal name and by the processing fee required under 37 CFR 1.17(i). Telephone Communication 08-23 AIA During a telephone conversation with S. Sean Thavonekham on May 13, 2026 a provisional election was made without traverse to prosecute the invention of species I , claim s 1-14 . Affirmation of this election must be made by applicant in replying to this Office action. Claim s 15-20 are withdrawn from further consideration by the examiner, 37 CFR 1.142(b), as being drawn to a non-elected invention. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1, 3, 4, 5, 6, 7, 10, 11, 12, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Chia-Pin Chiu (US 20090065930 A1), hereinafter Chiu in view of Shahidi et al. (US 20230063808 A1), hereinafter Shahidi . Regarding Claim 1 , Chiu teaches at least a package ("package," (201); Figs. 2 (cross-section of package), 3a, (top view of package substrate before singulation), 4a (top plan view of package substrate after singulation), 4b (side cross section of substrate), Paragraph [0017]) comprising: an integrated device ("die," (204); Fig. 2, Paragraph [0017]); and a substrate ("package substrate," (202); Figs. 3, 4a) coupled to the integrated device (204) through at least a plurality of solder interconnects ("solder connection is shown between die (204) and package substrate (202);" Fig. 2, Paragraph [0017]) , wherein the substrate (202) comprises a plurality of interconnects ("contact," (225); Fig. 4a, Paragraph [0022]) , and wherein the plurality of interconnects (225) comprises: a second via interconnect ("ground contact," (225b); Fig. 4a, Paragraph [0022]) comprising a partial ring planar cross section (Fig. 4a) . Chiu does not explicitly teach wherein the plurality of interconnects comprises: a first via interconnect comprising a partial concentric planar cross section; and wherein the second via interconnect laterally surrounds at least part of the first via interconnect. Shahidi (Figs. 7 (side-view), 8 (cross section of Fig. 7)) teaches a coaxial interposer (62; Paragraph [0041]) : a first via interconnect ("conductive barrel," (88); Fig. 7, Paragraph [0042]) comprising a partial concentric planar cross section (Fig. 8) ; and a second via interconnect ("outer metal coating," (86); Fig. 7, Paragraph [0042]) comprising a partial ring planar cross section (Fig. 8) , wherein the second via interconnect (86) laterally surrounds at least part of the first via interconnect (88) . It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of Shahidi into the package of Chiu such that the coaxial vias and related power source of Shahidi were used in the device of Chiu and that the coaxial vias of Shahidi were singulated through in accordance with Fig. 4a of Chiu. This is because the vias serve a similar purpose, acting as ground/power contacts (Shahidi, Paragraph [0042]) and doing so would provide the added benefit of shielding the device from each signal transmitted and reducing cross-talk (Shahidi, Paragraph [0043]). Additionally, it provides protection on the edge of the device without need for edge plating that can limit available space (Shahidi, Paragraph [0044]). For clarity, the proposed modification involves replacing the plated through-holes of Chiu with the coaxial via of Shahidi resulting in the singulation of the coaxial vias at Chiu, Fig. 4a. This effectively results in the coaxial vias being sliced in half leaving exposed the visible structure of Shahidi, Fig. 7 along the edges of the package substrate of Chiu. Regarding Claim 3 , Chiu as modified by Shahidi teaches the package of claim 1, wherein the first via interconnect (Shahidi, 88) is configured to provide a first electrical path for power (Shahidi, "serves as a signal carrier;" Fig. 7, Paragraph [0042]) ; and wherein the second via interconnect (Shahidi, 86) is configured to provide a second electrical path for ground (Shahidi, "may serve as a ground shield;" Fig. 7, Paragraph [0042]) . Regarding Claim 4 , Chiu as modified by Shahidi teaches the package of claim 1, further comprising: a first pad interconnect (Shahidi, (1st pad); Fig. 7) coupled to the first via interconnect (Shahidi, 88) , wherein the first pad interconnect (Shahidi, (1st pad); Fig. 7) comprises a first partial concentric planar cross section (Shahidi, Fig. 7) ; a second pad interconnect (Shahidi, (2nd pad); Fig. 7) coupled to the first via interconnect (Shahidi, 88) , wherein the second pad interconnect (Shahidi, (2nd pad); Fig. 7) comprises a second partial concentric planar cross section (Shahidi, Fig. 7) ; a third pad interconnect (Shahidi, (3rd pad); Fig. 7) coupled to the second via interconnect (Shahidi, 86) , wherein the third pad interconnect (Shahidi, (3rd pad); Fig. 7) comprises a third partial concentric planar cross section (Shahidi, Fig. 7) ; and a fourth pad interconnect (Shahidi, (4th pad); Fig. 7) coupled to the second via interconnect (Shahidi, 86) , wherein the fourth pad interconnect (Shahidi, (4th pad); Fig. 7) comprises a fourth partial concentric planar cross section (Shahidi, Fig. 7) . (Note: since the entire structure of the coaxial via in Shahidi is circular as shown in Fig. 8, the pads whose cross-section is not shown but are extensions of (88, 86) implicitly have a partial concentric planar cross section. See Annotated Fig. 7.) PNG media_image1.png 722 1127 media_image1.png Greyscale Regarding Claim 5 , Chiu as modified by Shahidi teaches the package of claim 1, wherein the plurality of interconnects (Chiu, 225) comprises: a plurality of first via interconnects (Shahidi, 88) , where each first via interconnect (Shahidi, 88) comprises a partial concentric planar cross section (Shahidi, Fig. 8) ; and a plurality of second via interconnects (Shahidi, 86) , where each second via interconnect (Shahidi, 86) comprises a partial ring planar cross section (Shahidi, Fig. 8) . Regarding Claim 6 , Chiu as modified by Shahidi teaches the package of claim 5, wherein the plurality of first via interconnects (Shahidi, 88) and the plurality of second via interconnects (Shahidi, 86) are located along at least one edge (Chiu, Figs. 2, 4a) of the package (Chiu, 201) . (Shahidi 88 and 86 in place of Chiu 302 which is cut into Chiu 225 is located on the edge of the package (Chiu, Figs. 2, 4a). Regarding Claim 7 , Chiu as modified by Shahidi teaches the package of claim 5, wherein the plurality of second via interconnects (Shahidi, 86) are configured as an electromagnetic interference shield (Shahidi, "shield certain signals to prevent cross-talk;" Paragraph [0041]; "to prevent cross-talk […] may be shielded with grounded pins;" Paragraph [0006]) (Therefore, the outer metal coating 86 that serves as ground shield acts as an electromagnetic interference shield). Regarding Claim 10 , Chiu teaches a substrate ("package substrate," (202); Figs. 3a, (top view of package substrate before singulation), 4a (top plan view of package substrate after singulation), 4b (side cross section of substrate), Paragraph [0017]) comprising: a plurality of interconnects ("contact," (225); Fig. 4a, Paragraph [0022]) comprising: a second via interconnect ("ground contact," (225b); Fig. 4a, Paragraph [0022]) comprising a partial ring planar cross section (Fig. 4a) . Chiu does not explicitly teach wherein the plurality of interconnects comprises: a first via interconnect comprising a partial concentric planar cross section; and wherein the second via interconnect laterally surrounds at least part of the first via interconnect. Shahidi (Figs. 6 (system-view), 7 (side-view), 8 (cross section of Fig. 7)) teaches at least one dielectric layer ("coaxial interposer (62) […] may include […] any number of non-conductive layers (e.g., core layers, resin layers);" Paragraph [0040]) ; a first via interconnect ("conductive barrel," (88); Fig. 7, Paragraph [0042]) comprising a partial concentric planar cross section (Fig. 8) ; and a second via interconnect ("outer metal coating," (86); Fig. 7, Paragraph [0042]) comprising a partial ring planar cross section (Fig. 8) , wherein the second via interconnect (86) laterally surrounds at least part of the first via interconnect (88) . It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of Shahidi into the package of Chiu such that the coaxial vias and related power source of Shahidi were used in the device of Chiu and that the coaxial vias of Shahidi were singulated through in accordance with Fig. 4a of Chiu. This is because the vias serve a similar purpose, acting as ground/power contacts (Shahidi, Paragraph [0042]) and doing so would provide the added benefit of shielding the device from each signal transmitted and reducing cross-talk (Shahidi, Paragraph [0043]). Additionally, it provides protection on the edge of the device without need for edge plating that can limit available space (Shahidi, Paragraph [0044]). For clarity, the proposed modification involves replacing the plated through-holes of Chiu with the coaxial via of Shahidi resulting in the singulation of the coaxial vias at Chiu, Fig. 4a. This effectively results in the coaxial vias being sliced in half leaving exposed the visible structure of Shahidi, Fig. 7 along the edges of the package substrate of Chiu. Regarding Claim 11 , Chiu as modified by Shahidi teaches the substrate of claim 10, further comprising: a first pad interconnect (Shahidi, (1st pad); Fig. 7) coupled to the first via interconnect (Shahidi, 88) , wherein the first pad interconnect (Shahidi, (1st pad); Fig. 7) comprises a first partial concentric planar cross section (Shahidi, Fig. 7) ; a second pad interconnect (Shahidi, (2nd pad); Fig. 7) coupled to the first via interconnect (Shahidi, 88) , wherein the second pad interconnect (Shahidi, (2nd pad); Fig. 7) comprises a second partial concentric planar cross section (Shahidi, Fig. 7) ; a third pad interconnect (Shahidi, (3rd pad); Fig. 7) coupled to the second via interconnect (Shahidi, 86) , wherein the third pad interconnect (Shahidi, (3rd pad); Fig. 7) comprises a third partial concentric planar cross section (Shahidi, Fig. 7) ; and a fourth pad interconnect (Shahidi, (4th pad); Fig. 7) coupled to the second via interconnect (Shahidi, 86) , wherein the fourth pad interconnect (Shahidi, (4th pad); Fig. 7) comprises a fourth partial concentric planar cross section (Shahidi, Fig. 7) . (Note: since the entire structure of the coaxial via in Shahidi is circular as shown in Fig. 8, the pads whose cross-section is not shown but are extensions of (88, 86) implicitly have a partial concentric planar cross section. See annotated Fig. 7 above.) Regarding Claim 12 , Chiu as modified by Shahidi teaches the substrate of claim 10, wherein the plurality of interconnects (Chiu, 225) comprises: a plurality of first via interconnects (Shahidi, 88) , where each first via interconnect (Shahidi, 88) comprises a partial concentric planar cross section (Shahidi, Fig. 8) ; and a plurality of second via interconnects (Shahidi, 86) , where each second via interconnect (Shahidi, 86) comprises a partial ring planar cross section (Shahidi, Fig. 8) . Regarding Claim 13 , Chiu as modified by Shahidi teaches the substrate of claim 12, wherein the plurality of first via interconnects (Shahidi, 88) and the plurality of second via interconnects (Shahidi, 86) are located along at least one edge (Chiu, Figs. 2, 4a) of the package (Chiu, 201) . (Shahidi 88 and 86 in place of Chiu 302 which is cut into Chiu 225 is located on the edge of the package (Chiu, Figs. 2, 4a) . 07-21-aia AIA Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Chiu and Shahidi, further in view of Patil et al. (US 20220068798 A1), hereinafter Patil . Regarding Claim 2 , Chiu as modified by Shahidi teaches the package of claim 1. Chiu as modified by Shahidi does not explicitly teach wherein the first via interconnect comprises a semi concentric planar cross section. Patil teaches wherein the first via interconnect ("via interconnect," (432b); Fig. 4, Paragraph [0041]) comprises a semi concentric planar cross section ("may have a semi-circular planar shape;" Paragraph [0042]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, to combine the teachings of Patil into the device of Chiu modified by Shahidi such that the first via interconnect comprises a semi concentric planar cross section. This is because it is known to create circular via interconnects (Paragraph [0055]) , and singulating or cutting circular vias as in Chiu or Patil results in a pair of interconnects (Paragraph [0024]) for the added benefit of two vias with semi concentric planar cross sections for every via hole that is singulated where the resulting portions are substantially the same . 07-21-aia AIA Claim s 8, 9, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chiu and Shahidi, further in view of Lu et al. (US 20220230949 A1), hereinafter Lu . Regarding Claim 8 , Chiu as modified by Shahidi teaches the package of claim 1, wherein the substrate Shahidi, "coaxial interposer," (62); Fig. 7, Paragraph [0041]) comprises: a core layer (Shahidi, "multi-layer core," (64); Fig. 7, Paragraph [0044]) ; and a plug dielectric layer (Shahidi, "non-conductive material," (84); Paragraph [0042]) located laterally (Shahidi, Fig. 7) to the core layer (Shahidi, 64) , wherein the first via interconnect (Shahidi, 88) extends through the core layer (Shahidi, 64) , wherein the plug dielectric layer (Shahidi, 84) includes a different material from the core layer (Shahidi, 64) , and wherein the plug dielectric layer (Shahidi, 84) is located laterally between (Shahidi, Fig. 7) the first via interconnect (Shahidi, 88) and the second via interconnect (Shahidi, 86) . (The plug dielectric layer of Shahidi is taken from the modification to Chiu in Claim 1 as it is integral to the overall via structure of Shahidi.) Chiu as modified by Shahidi does not explicitly teach wherein the second via interconnect extends through the core layer. Lu teaches a circuit board with conductive vias wherein the second via interconnect ("conductive connection layer," (138); Fig. 1E (final step of method including Figs. 1A-1F)) extends through the core layer ("core layer," (132); Paragraph [0048]) . It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, to further combine the teachings of Lu with the device of Chiu modified by Shahidi such that the second via interconnect extends through the core layer. Extending through the core layer allows the conductive connection layer to electrically connect conductive elements on either side of the core layer (Paragraph [0041]) which provides an electrical path separate from the first via interconnect. Regarding Claim 9 , Chiu as modified by Shahidi and Lu teaches the package of claim 8, wherein the substrate (Shahidi, "coaxial interposer," (62); Fig. 7, Paragraph [0041]) further comprises a second plug dielectric layer (Shahidi, "non-conductive material," (90); Paragraph [0042]) coupled to the first via interconnect (Shahidi, 88) , wherein the second plug dielectric layer (Shahidi, 90) is located on a side surface of the substrate (Shahidi, 62) , and wherein the second plug dielectric layer (Shahidi, 90) is located at least laterally to the core layer (Shahidi, 64) . (The second plug dielectric layer of Shahidi is taken from the modification to Chiu in Claim 1 as it is integral to the overall via structure of Shahidi.) Regarding Claim 14 , Chiu as modified by Shahidi teaches the substrate of claim 10, wherein the substrate comprises: a core layer (Shahidi, "multi-layer core," (64); Fig. 7, Paragraph [0044]) ; and a plug dielectric layer (Shahidi, "non-conductive material," (84); Paragraph [0042]) located laterally (Shahidi, Fig. 7) to the core layer (Shahidi, 64) , wherein the plug dielectric layer (Shahidi, 84) includes a different material from the core layer (Shahidi, 64) , and wherein the plug dielectric layer (Shahidi, 84) is located laterally between (Shahidi, Fig. 7) the first via interconnect (Shahidi, 88) and the second via interconnect (Shahidi, 86) . (The location of the plug dielectric layer is a result of the modification made to Chiu by Shahidi in claim 10 as it is part of the overall via structure of Shahidi.) Chiu as modified by Shahidi does not explicitly teach wherein the at least one dielectric layer comprises: a first dielectric layer coupled to a first surface of the core layer; and a second dielectric layer coupled to a second surface of the core layer, wherein the first via interconnect extends through the core layer, the first dielectric layer and the second dielectric layer, and wherein the second via interconnect extends through the core layer. Lu teaches a circuit board with conductive vias wherein the at least one dielectric layer comprises: a first dielectric ("a material of the base (122) is, for example, epoxy") layer ("base," (122); Fig. 1E, Paragraph [0048]) coupled to a first surface of the core layer ("core layer," (132); Fig. 1E (of method including 1A-1F), Paragraph [0048]) ; and a second dielectric layer ("insulating layer," (142); Paragraph [0047]) coupled to a second surface of the core layer (132) , wherein the first via interconnect ("conductive material layer," (150); Paragraph [0047]) extends through the core layer (132) , the first dielectric layer (122) and the second dielectric layer (142) , and wherein the second via interconnect ("conductive connection layer," (138); Fig. 1E) extends through the core layer (132) . It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention, to further combine the teachings of Lu with the device of Chiu modified by Shahidi such that the at least one dielectric layer comprises: a first dielectric layer coupled to a first surface of the core layer; and a second dielectric layer coupled to a second surface of the core layer, wherein the first via interconnect extends through the core layer, the first dielectric layer and the second dielectric layer, and wherein the second via interconnect extends through the core layer. The motivation for adding the first and second dielectric layer would be that dielectric layers coupled to surfaces of the core layer covers the core layer and separates the core layer from other conductive elements for the benefit of electrically isolating different conductive elements in the core layer (Paragraph [0043]) . The motivation for the first via interconnect extending through the core layer, first dielectric layer, and second dielectric layer is that it has the benefit of providing a signal path throughout the entire substrate, electrically connecting to exterior circuitry for the benefit of carrying a signal (Paragraph [0047]) . The motivation for the second via interconnect extending through the core layer is that it allows the conductive connection layer to electrically connect conductive elements on either side of the core layer (Paragraph [0041]) which provides an electrical path separate from the first via interconnect. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NOLAN G STUESSY whose telephone number is (571)645-5843. The examiner can 07-100 normally be reached 7:30AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NOLAN GABRIEL STUESSY/Examiner, Art Unit 2812 /DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812 Application/Control Number: 18/589,172 Page 2 Art Unit: 2812 Application/Control Number: 18/589,172 Page 3 Art Unit: 2812 Application/Control Number: 18/589,172 Page 4 Art Unit: 2812 Application/Control Number: 18/589,172 Page 5 Art Unit: 2812 Application/Control Number: 18/589,172 Page 6 Art Unit: 2812 Application/Control Number: 18/589,172 Page 7 Art Unit: 2812 Application/Control Number: 18/589,172 Page 8 Art Unit: 2812 Application/Control Number: 18/589,172 Page 9 Art Unit: 2812 Application/Control Number: 18/589,172 Page 10 Art Unit: 2812 Application/Control Number: 18/589,172 Page 11 Art Unit: 2812 Application/Control Number: 18/589,172 Page 12 Art Unit: 2812 Application/Control Number: 18/589,172 Page 13 Art Unit: 2812 Application/Control Number: 18/589,172 Page 14 Art Unit: 2812 Application/Control Number: 18/589,172 Page 15 Art Unit: 2812 Application/Control Number: 18/589,172 Page 16 Art Unit: 2812
Prosecution Insights