Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
In the response to this office action, the Examiner respectfully requests that support be shown for language added to any original claims on amendment and any new claims. That is, indicate support for newly added claim language by specifically pointing to page(s) and line numbers in the specification and/or drawing figure(s). This will assist the Examiner in prosecuting this application.
CONTINUED EXAMINATION UNDER 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/19/2025 has been entered.
ALLOWABLE SUBJECT MATTER
Claims 5-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 5-6 are objected to because the cited references do not disclose “wherein in an initialization/write period, an emission signal of the emission line, a first gate signal of the first gate line, and a second gate signal of the second gate line each have an active level, while a third gate signal of the third gate line has a non-active level, wherein in a compensation period, the first gate signal and the second gate signal each have the active level, while the emission signal and the third gate signal each have the non-active level, wherein in a bypass period, the emission signal and the second gate signal each have the active level, while the first gate signal and the third gate signal each have the non-active level, and wherein in an emission period, the emission signal has the active level, while the first gate signal and the second gate signal each have the non-active level.“
CLAIM REJECTIONS - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 , if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
1. Claims 1 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. US 20230116660 and further in view of Wang US 20170193901.
Consider claim 1. Kim discloses a display device fig. 1 OLED display panel comprising:
a light-emitting element [0045] fig. 1 OLED display panel. pixel P include LED or OLED;
a driving transistor connected between a driving voltage line and an anode electrode of the light-emitting element fig. 3 T1 connected between voltage line and anode electrode of LED; and
a fifth transistor TR3 fig. 3 connected between the anode electrode of the light-emitting element and a sensing line TR3 or fig. 3 is connected between sensing line SL and anode of LED,
a second transistor connected between a data line and a gate electrode of the driving transistor fig. 3 TR4 connected between DL and gate of TR1;
Kim discloses wherein the fifth transistor is turned on during fabrication or testing of the display device is turned on [0060] TR3 turned on by detection control signal detect EN supplied through gate line. [0053] TR3 is turned pixel defect detecting mode (testing mode).
Kim does not disclose wherein the fifth transistor remains turned off during normal operations of the display device, in a single embodiment. However in another embodiment Kim discloses where the wherein the fifth transistor remains turned off during normal operations of the display device, [0040] the first operating mode (display driving mode) [0051] in an embodiment when the display device operates in a first mode driving circuit may supply data voltage to the converting circuit 24 through the data line.[0064]. Thus the fifth transistor remains off in the first mode and only turns on during the second mode.
It would have been obvious at the time the invention was made to a person having ordinary skill in the art to include wherein the fifth transistor remains turned off during normal operations of the display device, as Kim suggests to enable the pixel circuit to operate in the display driving mode [0051].
Kim does not disclose a fourth transistor connected between an initialization line and the anode electrode of the light-emitting element and the fourth transistor being directly connected to the anode electrode of the light emitting element.
Wang however discloses a fourth transistor connected between an initialization line and the anode electrode of the light-emitting element See fig. 2 [0061] A fifth transistor M5 (read as the 4th transistor) is connected between the initialization power source Vint and an anode electrode of the OLED and the fourth transistor being directly connected to the anode electrode of the light emitting element As see from fig. 2 M5 is directly connected to the anode of the OLED.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the pixel circuit of display panel of Kim to include a fourth transistor connected between an initialization line and the anode electrode of the light-emitting element and the fourth transistor being directly connected to the anode electrode of the light emitting element., as taught by Wang, to enhance black representation capability of the pixels 140 [0062].
Consider claim 7. Kim as modified by Wang discloses the display device of claim 1, further comprising: a detector or a power supply unit connected to the sensing line Kim fig. 3 sensing line SL is connected to the detection circuit 230.
2. Claims 2-4 and 18-21 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. US 20230116660 in view of Wang US 2017032722 and further in view of in view of Choi et al. US 20140197744.
Consider claim 2. Kim as modified by Wang disclose the display device of claim 1, further comprising:
and a second capacitor connected between the gate electrode of the driving transistor and the anode electrode of the light-emitting element Kim fig. 3 Cstg connected to gate of TR1 and anode of LED.
Kim as modified by Wang does not disclose a third transistor connected between the driving voltage line and a source electrode of the driving transistor; a first capacitor connected between the gate electrode of the driving transistor and the source electrode of the driving transistor;
Choi however discloses a third transistor connected between the driving voltage line and a source electrode of the driving transistor fig. 3 T5 connected to ELVDD and source of T1; a first capacitor connected between the gate electrode of the driving transistor and the source electrode of the driving transistor C1 is connected between source of T1 and gate of T1.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the pixel circuit of display panel of Kim as modified by Wang to include a third transistor connected between the driving voltage line and a source electrode of the driving transistor; a first capacitor connected between the gate electrode of the driving transistor and the source electrode of the driving transistor, as taught by Choi, to inspect defects of the pixels [0009].
Consider claim 3. Kim as modified by Wang and Choi discloses the display device of claim 2, further comprising:
a first gate line connected to a gate electrode of the second transistor Kim fig. 3 Gl1;
an emission line connected to a gate electrode of the third transistor Choi fig. 3 Ej;
a second gate line connected to a gate electrode of the fourth transistor. Choi fig. 3 T3 Sj-1; and a third gate line connected to a gate electrode of the fifth transistor Kim fig. 3 Gl2;
Motivation to combine is similar to motivation in claim 2.
Consider claim 4. Kim as modified by Wang and Choi discloses the display device of claim 3, wherein a third gate signal of the third gate line has a non-active level. Kim fig. 7B Detect_En has non-active level.
Claim 18 is rejected for similar reasons to claim 1.
Claim 19 is rejected for similar reasons to claim 2.
Claim 20 is rejected for similar reasons to claim 1.
Claim 21 is rejected for similar reasons to claim 7.
RESPONSE TO ARGUMENTS
Applicant's arguments have been fully considered but are moot in view of the new grounds of rejection.
The Applicant argues (page 8-9) that neither Kim nor Choi disclose “a fourth transistor connected between an initialization line and the anode electrode of the light-emitting element and the fourth transistor being directly connected to the anode electrode of the light emitting element”
The Office agrees and has accordingly updated the rejection to include the Wang reference which teaches the contended limitation (see rejection of claim 1 above).
For at least these reasons the cited references read on the claimed invention
CONCLUSION
Any inquiry concerning this communication or earlier communications from the examiner should be directed to IBRAHIM A KHAN whose telephone number is (571)270-7998. The examiner can normally be reached on 10am-6pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LunYi Lao can be reached on 5712727671. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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IBRAHIM A. KHAN
Primary Examiner
Art Unit 2621
/IBRAHIM A KHAN/ 01/21/2026Primary Examiner, Art Unit 2621