DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species A (Fig. 1; Claims 1-12, 16-18) in the reply filed on 08/25/2026 is acknowledged.
Claim 13-15 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Species , there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 08/26/2026.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 3-6, 10 and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shizumi et al. (US 2017/0077299 A1) in view of Carbal, JR et al. (US 2012/0009771 A1).
Regarding Claim 1, Shizumi (Fig. 1) discloses a semiconductor device, comprising:
a first conductive part (14);
a second conductive part (40) separated from the first conductive part (14) in a first direction;
a third conductive part (18 in the trench 50 latterally adjacent to trench 60) arranged with a portion of the second conductive part (40) in a second direction crossing the first direction (Fig. 1);
a first insulating part including a first insulating region (16) located between the third conductive part (18) and the portion of the second conductive part (40) [0042]; and
a semiconductor part of a first conductivity type (n-type body, n- drift region 24 n n+ drain region 22, with nitrogen as the n-type impurity), the semiconductor part including
a first semiconductor region (portion of drift region 24 below trench 60, between 14 and 40) located between the first conductive part (14) and the second conductive part (40), and
a second semiconductor region located between the first insulating region and the portion of the second conductive part, the second semiconductor region having a Schottky junction with the second conductive part, junction between the metal layer 40 and the drift region 24 is Schottky diode (0043, 0047,Claim 5)]
Shizumi does not explicitly disclose that a first impurity being segregated at an interface between the second conductive part and the second semiconductor region,
the first conductivity type being an n-type and the first impurity including at least one selected from the group consisting of arsenic, phosphorus, antimony, and magnesium, or the first conductivity type being a p-type, and the first impurity including at least one selected from the group consisting of boron, indium, aluminum, and beryllium.
Carbal, JR discloses a segregated interfacial dopant layer at a junction between a semiconductor material and a silicide layer made of dopants from a doped material layer (abstract and Claim 1) and further discloses that for an n-type contact area the dopants are arsenic, phosphorus or antimony [0020] or for p-type contact they are boron, Al, Ga or In [0020] for the purpose to lower the Schotky barrier height of the junction [0022, 0028]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device in Shizumi in view of Carbal, JR such that a first impurity being segregated at an interface between the second conductive part and the second semiconductor region, the first conductivity type being an n-type and the first impurity including at least one selected from the group consisting of arsenic, phosphorus, antimony, and magnesium, or the first conductivity type being a p-type, and the first impurity including at least one selected from the group consisting of boron, indium, aluminum, and beryllium in order to lower the Schotky barrier height of the junction thereby lowering contact resistance[0022, 0028]
Regarding Claim 3, Shizumi in view of Carbal, JR discloses the device according to claim 1, wherein
the second semiconductor region includes:
a first region (30 in contact with 40); and
a second region (drift region 21, below the source regions and above 14) located between the first region (30) and the first conductive part, a first-conductivity-type impurity concentration in the first region is greater than a first-conductivity-type impurity concentration in the second region (source regions 30 are n+; drift regions 24 is n-) the second conductive part includes:
a first conductive region arranged with the first region in the second direction, the first conductive region having a Schottky junction with the first region; (the upper portion of metal layer 40 latterally facing source region 30) and
a second conductive region arranged with the second region in the second direction, the second conductive region having a Schottky junction with the second region, (the lower portion of metal layer 40, laterally facing drift region 24. That junction is expressly Schottky) and
the first impurity is segregated at an interface between the first conductive region and the first region. (abstract and Claim 1 Carbal, JR)
Regarding Claim 4, Shizumi in view of Carbal, JR discloses the device according to claim 3, wherein
a second impurity is segregated at an interface between the second conductive region and the second region, and the first conductivity type is the n-type, and the second impurity includes at least one selected from the group consisting of boron, indium, aluminum, and beryllium, or the first conductivity type is the p-type, and the second impurity includes at least one selected from the group consisting of arsenic, phosphorus, antimony, and magnesium. (acceptor doped metal with boron, Al, Ga or In. segregating an acceptor at drift interface raises barrier at drift region Carbal, JR)
Regarding Claim 5, Shizumi in view of Carbal, JR discloses the device according to claim 4, wherein the first impurity is not segregated at an interface between the second conductive region and the second region. (See hard mask completely covers (see hard mask covers the first contact area during metal deposition and anneal so the donor reaches only the unmasked interface 0024)
Regarding Claim 6, Shizumi in view of Carbal, JR discloses the device according to claim 4, wherein
the first conductive region includes the first impurity (first donor doped metal layer forms the first silicide contact and its segregated layer Carbal, JR), and the second conductive region includes the second impurity. (acceptor doped metal layer forms the adjacent contact and its own segregated layer Carbal, JR)
Regarding Claim 10, Shizumi in view of Carbal, JR discloses the device according to claim 1, wherein the second conductive part includes platinum. (doped metal layer comprising platinum, Claim 1 Carbal, JR)
Regarding Claim 11, Shizumi in view of Carbal, JR discloses the device according to claim 1, further comprising:
a fourth conductive part contacting the second conductive part (source electrode 12 is electrically connected to 40 thereby contacting it)
the second conductive part being positioned between the semiconductor part and the fourth conductive part, (40 sits in trench 60 within SiC layer, with electrode 12 above it on the front face)
a work function of the second conductive part being greater than a work function of the fourth conductive part. (40 has work function of 6.5eV or more; source electrode is Ti or Al both below 6.5eV) [Shizumi 0045]
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shizumi et al. (US 2017/0077299 A1) in view of Carbal, JR et al. (US 2012/0009771 A1) and further in view of Kinoshita et al. (US 2007/0007590 A1)
Regarding Claim 2, Shizumi in view of Carbal, JR discloses device according to claim 1, wherein
the second conductive part (40)
Shizumi in view of Carbal, JR does not explicitly disclose that the second conductive part includes the first impurity.
Kinoshita discloses the electrode carrier impurity at a concentration higher than the channel with peak being at the interface.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify a semiconductor device in Shizumi in view of Carbal, JR and Kinoshita such that the second conductive part includes the first impurity in order to lower to lower contact resistance and since the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945) (See MPEP 2144.07).
Allowable Subject Matter
Claims 7-9, 12 and 16-18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
With regards to claim 7, none of the prior art teaches or suggests, alone or in combination, “the second conductive part further includes a third conductive region arranged with the first semiconductor region in the first direction, the third conductive region has a Schottky junction with the first semiconductor region, and the first impurity is segregated at an interface between the third conductive region and the first semiconductor region.” in the combination required by the claim.
Claim 8 is dependent on Claim 7.
With regards to claim 9, none of the prior art teaches or suggests, alone or in combination, “the first conductive region includes the second impurity.” in the combination required by the claim.
With regards to claim 12, none of the prior art teaches or suggests, alone or in combination, “the fourth conductive part includes a conductive upper portion and a conductive lower portion, the third conductive part is positioned between the conductive upper portion and the first conductive part, and the conductive lower portion is positioned between the conductive upper portion and the semiconductor part and arranged with the third conductive part in the second direction.” in the combination required by the claim.
With regards to claim 16, none of the prior art teaches or suggests, alone or in combination, “the first semiconductor region includes a counter surface arranged with the third conductive part in the second direction, and the counter surface faces the second conductive part.” in the combination required by the claim.
Claims 17 and 18 is dependent on Claim 16.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure
Dolny et al. (US 2017/0323970 A1), Thapar (US 2006/0049454 A1), Thapar (US 2006/0017078 A1), Oyama et al. (US 2016/0372590 A1) generally disclose Schottky Gate and/or Trench MOSFET.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRIY YEMELYANOV whose telephone number is (571)270-7920. The examiner can normally be reached M-F 9a.m.-6p.m.
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/DMITRIY YEMELYANOV/ Examiner, Art Unit 2891
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