DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1,8-11 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by U.S. Patent Application Publication Number 2022/0415735 A1 to Harada et al., “Harada”.
Regarding claim 1, Harada discloses a semiconductor apparatus (FIG. 1 apparatus 101) comprising:
a semiconductor chip (e.g. 3, ¶ [0030]);
a supporting body (22/21/23, ¶ [0028]) that has an upper surface and a lower surface and with which the semiconductor chip (3) is fixed to the upper surface;
a sealing resin (8, ¶ [0037]) that is arranged to seal the semiconductor chip and the supporting body; and
a heat sink (1, ¶ [0028],[0031]) that is bonded to the lower surface of the supporting body; and
wherein a recess (FIG. 3 recess with bottom surface 55 and side surface 54, ¶ [0040],[0041]) portion is formed in an upper surface of the heat sink, the lower surface of the supporting body (22/21/23) is bonded to a bottom surface of the recess portion via a bonding structure (10, ¶ [0032]), and the sealing resin (8) infiltrates a gap (FIG. 3) between at least the bonding structure (10) among the supporting body and the bonding structure and a side surface (54) of the recess portion.
Regarding claim 8, Harada discloses the semiconductor apparatus according to Claim 1, and Harada further discloses wherein the bonding structure (10) includes sintered silver (¶ [0032]).
Regarding claim 9, Harada discloses the semiconductor apparatus according to Claim 1, and Harada further discloses wherein the bonding structure (10) includes solder (¶ [0032]).
Regarding claim 10, Harada discloses the semiconductor apparatus according to Claim 1, and Harada further discloses wherein the supporting body includes an insulating substrate (21, ¶ [0029]) and a metal substrate (22, ¶ [0029]) disposed on the insulating substrate (21) and the semiconductor chip (3) is fixed to a surface of the metal substrate (22) at an opposite side to the insulating substrate (21).
Regarding claim 11, Harada discloses the semiconductor apparatus according to Claim 1, and Harada further discloses wherein the supporting body is constituted of an insulating substrate (21, ¶ [0029]).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1,9-10,12,15 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication Number 2013/0135824 A1 to Harubeppu et al., “Harubeppu”, in view of U.S. Patent Application Publication Number 2022/0068743 A1 to Enomoto, “Enomoto”.
Regarding claim 1, Harubeppu discloses a semiconductor apparatus (e.g. FIG. 1) comprising:
a semiconductor chip (e.g. 2a, ¶ [0052]);
a supporting body (2d,2e,10, ¶ [0052],[0053]) that has an upper surface and a lower surface and with which the semiconductor chip is fixed to the upper surface;
a sealing gel (9, ¶ [0035]) that is arranged to seal the semiconductor chip and the supporting body; and
a heat sink (1, ¶ [0036]) that is bonded to the lower surface of the supporting body; and
wherein a recess portion (e.g. FIG. 2A shows two recesses 1A, ¶ [0037]) is formed in an upper surface of the heat sink (1), the lower surface of the supporting body is bonded to a bottom surface of the recess portion via a bonding structure (11, ¶ [0069],[0070]), and the sealing gel (9) infiltrates a gap between at least the bonding structure (11) among the supporting body and the bonding structure and a side surface of the recess portion (gaps on sides of 11 as pictured):
Harubeppu fails to clearly teach or identify the silicon gel (9) as a resin.
Enomoto teaches wherein a sealing resin (12) may be silicone or other resins (¶0034]).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Harubeppu with the silicone gel either formed as or replace with a resin as taught by Enomoto in order to select a material suitable in terms of insulation, heat resistance, and heat dissipation (Enomoto ¶ [0034]) and since it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945), In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960), and MPEP 2144.07 Art Recognized Suitability for an Intended Purpose.
Regarding claim 9, Harubeppu in view of Enomoto yields the semiconductor apparatus according to Claim 1, and Harubeppu further teaches wherein the bonding structure (11) includes solder (¶ [0069],[0070]).
Regarding claim 10, Harubeppu in view of Enomoto yields the semiconductor apparatus according to Claim 1, and Harubeppu further teaches wherein the supporting body includes an insulating substrate (2e, ¶ [0054]) and a metal substrate (2d, ¶ [0052]) disposed on the insulating substrate and the semiconductor chip (2a) is fixed to a surface of the metal substrate (2c) at an opposite side to the insulating substrate (2e).
Regarding claim 12, Harubeppu in view of Enomoto yields the semiconductor apparatus according to Claim 1, and Harubeppu further teaches wherein the heat sink is a water cooler (refrigerant ¶ [0035],[0049],[0054]-[0055]).
Regarding claim 15, Harubeppu discloses a method (e.g. FIG. 9A-9D) for manufacturing a semiconductor apparatus (e.g. FIG. 1) that includes a semiconductor chip (e.g. 2a, ¶ [0052]), a supporting body (2d,2e,10, ¶ [0052],[0053]) having an upper surface and a lower surface and with which the semiconductor chip is fixed to the upper surface, a heat sink (1, ¶ [0036]) bonded to the lower surface of the supporting body, and a sealing gel (9, ¶ [0035]) sealing the semiconductor chip and the supporting body, the method for manufacturing the semiconductor apparatus comprising:
a bonding step (FIG. 9B, ¶ [0094]) of bonding the semiconductor chip, the supporting body, and the heat sink; and
a sealing step of sealing (FIG. 9C, ¶ [0097]) the semiconductor chip and the supporting body by the sealing gel (9).
Harubeppu fails to clearly teach or identify the silicon gel (9) as a resin.
Enomoto teaches wherein a sealing resin (12) may be silicone or other resins (¶0034]).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have performed the method of Harubeppu with the silicone gel either formed as or replace with a resin as taught by Enomoto in order to select a material suitable in terms of insulation, heat resistance, and heat dissipation (Enomoto ¶ [0034]) and since it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945), In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960), and MPEP 2144.07 Art Recognized Suitability for an Intended Purpose.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication Number 2022/0415735 A1 to Harada et al., “Harada”, in view of U.S. Patent Application Publication Number 2022/0270946 A1 to Aoki et al., “Aoki”.
Regarding claim 2, although Harada discloses the semiconductor apparatus according to Claim 1, Harada fails to clearly teach wherein the side surface of the recess portion is formed to a curved surface shape or an inclined surface shape with which an area of a lateral cross section of the recess portion increases gradually from the bottom surface of the recess portion toward an opening of the recess portion at the upper surface of the heat sink.
Aoki teaches wherein the side surface of the recess portion (2) is formed to an inclined surface shape (taper 16, ¶ [0020]) with which an area of a lateral cross section of the recess portion (2) increases gradually from the bottom surface of the recess portion toward an opening of the recess portion at the upper surface of the heat sink (1, as pictured).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Harada with a taper as taught by Aoki in order to reduce warpage (Aoki ¶ [0003]-[0006],[0022],[0025]).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication Number 2022/0415735 A1 to Harada et al., “Harada”, in view of U.S. Patent Application Publication Number 2015/0041188 A1 to Terasaki et al., “Terasaki”.
Regarding claim 3, although Harada discloses the semiconductor apparatus according to Claim 1, and Harada further teaches wherein the bonding structure (10) includes for example liquid phase diffusion bonding (¶ [0032]), Harada fails to clearly anticipate wherein the bonding structure includes a solid phase diffusion bonding sheet.
Terasaki teaches (FIG. 1) wherein a bonding structure (33) includes a solid phase diffusion bonding sheet (¶ [0061],[0064],[0065]).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Harada using the solid phase diffusion bonding method of Terasaki in order to prevent peeling and achieve good bonding (Terasaki ¶ [0085]) and achieve improved thermal conductivity (Terasaki ¶ [0085],[0091]).
Claims 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication Number 2022/0415735 A1 to Harada et al., “Harada”, in view of U.S. Patent Application Publication Number 2022/0262700 A1 to Komo, “Komo”.
Regarding claim 13, although Harada discloses the semiconductor apparatus according to Claim 1, Harada fails to clearly teach wherein the heat sink (1) is an air cooler.
Komo teaches wherein a heat sink (1) is an air-cooler (i.e. air-cooled ¶ [0036]).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Harada with air-cooling the heat sink as exemplified by Komo in order to further miniaturize the semiconductor module (Komo ¶ [0036]).
Regarding claim 14, although Harada discloses the semiconductor apparatus according to Claim 1, Harada fails to clearly teach wherein the heat sink (1) is constituted of a Cu block.
Komo teaches wherein a heat sink (1) is a Cu block (¶ [0021]).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Harada with the heat sink formed of copper (Cu) as taught by Komo in order to select a material which allows for good heat spreading and reduced package size (Komo ¶ [0004]-[0007]) and since it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945), In re Leshin, 277 F.2d 197, 125 USPQ 416 (CCPA 1960), and MPEP 2144.07 Art Recognized Suitability for an Intended Purpose.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication Number 2013/0135824 A1 to Harubeppu et al., “Harubeppu”, in view of U.S. Patent Application Publication Number 2022/0068743 A1 to Enomoto, “Enomoto”, further in view of U.S. Patent Application Publication Number 2015/0041188 A1 to Terasaki et al., “Terasaki”.
Regarding claim 16, although Harubeppu in view of Enomoto yields the method for manufacturing a semiconductor apparatus according to Claim 15, Harubeppu fails to clearly teach wherein in the bonding step, at least bonding of the supporting body and the heat sink among bonding of the semiconductor chip and the supporting body and the bonding of the supporting body and the heat sink is performed by solid phase diffusion bonding.
Terasaki teaches (FIG. 1) wherein a bonding structure (33) includes a solid phase diffusion bonding sheet (¶ [0061],[0064],[0065]).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have performed the method of Harubeppu in view of Enomoto using the solid phase diffusion bonding method of Terasaki in order to prevent peeling and achieve good bonding (Terasaki ¶ [0085]) and achieve improved thermal conductivity (Terasaki ¶ [0085],[0091]).
Allowable Subject Matter
Claims 4-7 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
U.S. Patent Application Publication Number 2021/0066235 A1 to Oomori et al. teaches (FIG. 1) forming a recess (41, ¶ [0038]) around the bonding area (14) in a semiconductor package;
U.S. Patent Application Publication Number 2022/0189848 A1 to Gu et al. teaches (FIG. 1A) forming a recess (A2, ¶ [0025]) around the bonding area (120) in a semiconductor package, including wherein the recess is rounded (FIG. 4C).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC A WARD whose telephone number is (571)270-3406. The examiner can normally be reached M-F 10-6 ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571)272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Eric A. Ward/Primary Examiner, Art Unit 2891
Prosecution Insights