Prosecution Insights
Last updated: July 17, 2026
Application No. 18/592,179

ENHANCED INTEGRATED CIRCUIT HEAT DISSIPATION USING INACTIVE METAL LINES

Non-Final OA §102§103
Filed
Feb 29, 2024
Examiner
MARIN, JACOB RAUL
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Qualcomm Incorporated
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
17 granted / 17 resolved
+32.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
16 currently pending
Career history
43
Total Applications
across all art units

Statute-Specific Performance

§103
99.0%
+59.0% vs TC avg
§112
1.0%
-39.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 17 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 5-10, and 14-19 are rejected under 35 U.S.C. 102(a)(1) as being unpatentable by Fountain, JR. et al. (US-20230352369-A1 referred as Fountain JR). Regarding claim 1. Fountain JR discloses an electronic device, comprising: one or more substrates with active circuitry ([0053], fig 7, the one substrate #101 is illustrated with active circuitry #130 side); a heat sink structure disposed exterior to the one or more substrates ([0058], figure 7, heat sink structure #705 is disposed exterior to the substrate #101 and the rest of the device #700); one or more thermal through-substrate vias (TTSVs) forming a first set of one or more thermally conductive paths between the one or more substrates and the heat sink structure ([0058], figure 7, one TTSV #703 is formed as one thermally conductive path between the substrate #101 and the heat sink structure #705); and one or more metallization lines disposed in the one or more substrates ([0057], fig 7, one metallization lines #306 is disposed in the substrate #101) wherein in a first mode of operation of the active circuitry, the one or more metallization lines carry active signals of the active circuitry ([0057]), and in a second mode of operation of the active circuitry in which the one or more metallization lines do not carry active signals of the active circuitry, the one or more metallization lines are connected as heat-conductive branches forming a second set of one or more thermally conductive paths in thermal contact with the first set of one or more thermally conductive paths ([0057], fig 7, as described.. due to the metallization lines #306 being able to carry voltage signals or heat signals, they could be configured to have a first mode of operation of carrying active signals and a second mode of operation of providing a thermal pathway). As a note; MPEP 2173.05(g) – describes limitations which recite a feature “by what it does rather than by what it is” and “A functional limitation is often used in association with an element, ingredient, or step of a process to define a particular capability or purpose that is served by the recited element, ingredient or step. In Innova/Pure Water Inc. v. Safari Water Filtration Sys. Inc., 381 F.3d 1111, 1117-20, 72 USPQ2d 1001, 1006-08 (Fed. Cir. 2004)”. The prior art discloses the required structure which can perform the functional limitations such that these limitations do not distinguish from the cited prior art. Particularly, a metallization line having a material property capable to carrying current and also be thermally conductive. Regarding claim 10. Fountain JR discloses a thermal dissipation structure, comprising: a heat sink structure disposed exterior to one or more substrates with active circuitry ([0058], figure 7, heat sink structure #705 is disposed exterior to the substrate #101 and the rest of the device #700); one or more thermal through-substrate vias (TTSVs) forming a first set of one or more thermally conductive paths between the one or more substrates and the heat sink structure ([0058], figure 7, one TTSV #703 is formed as one thermally conductive paths between the substrate #101 and the heat sink structure #705); and one or more metallization lines disposed in the one or more substrates ([0053], fig 7, one metallization lines #306 is disposed in the substrate #101) wherein in a first mode of operation of the active circuitry, the one or more metallization lines carry active signals of the active circuitry ([0057]), and in a second mode of operation of the active circuitry in which the one or more metallization lines do not carry active signals of the active circuitry, the one or more metallization lines are connected as heat-conductive branches forming a second set of one or more thermally conductive paths in thermal contact with the first set of one or more thermally conductive paths ([0057], fig 7, as described.. due to the metallization lines #306 being able to carry voltage signals or heat signals, they could be configured to have a first mode of operation of carrying active signals and a second mode of operation of providing a thermal pathway). Regarding claim 19. Fountain JR discloses method of operating a thermal dissipation structure to dissipate heat generated by active circuitry of one or more substrates, the method comprising: providing one or more thermal through-substrate vias (TTSVs) through at least one substrate of the one or more substrates to form a first set of one or more thermally conductive paths between the at least one substrate of the one or more substrates and a heat sink structure ([0058], figure 7, one TTSV #703 is formed as one thermally conductive paths between the substrate #101 and the heat sink structure #705); in a first mode of operation of the active circuitry, configuring one or more metallization lines of the at least one substrate to carry active signals of the active circuitry ([0057]); and in a second mode of operation of the active circuitry in which the one or more metallization lines do not carry active signals of the active circuitry, connecting the one or more metallization lines as heat-conductive branches to the one or more TTSVs as thermally conductive lines and disconnecting the one or more metallization lines from operating as signal carrying lines ([0058], figure 7, the TTSV #703 is in communication with metallization lines #306 which allows to being able to carry voltage signals or heat signals, they could be configured to have a first mode of operation of carrying active signals and a second mode of operation of providing a thermal pathway). Regarding claims 5 and 14. Fountain JR discloses wherein: the first mode of operation of the active circuitry is a diagnostic mode of operation of the active circuitry; and the second mode of operation of the active circuitry is a normal mode of operation of the active circuitry ([0057], fig 7, as described.. due to the metallization lines #306 configured to have a first mode of operation of carrying active circuitry, the active circuitry could be further configured to have a diagnostic mode and a normal mode of operation). Regarding claims 6, 7, 15, and 16. Fountain JR discloses [claim 6 and claim 15] wherein: the first mode of operation of the active circuitry is a normal mode of operation of the active circuitry; and the second mode of operation of the active circuitry is associated one or more portions of the active circuitry being in a quiescent state ([0057], fig 7, as described.. due to the metallization lines #306 configured to have a first mode of operation of carrying active circuitry, the active circuitry could be further configured to have a first mode of operation which carryies active circuitry, and a second mode of operation which allows a quiescent state). [claim 7 and claim 16] wherein: the one or more metallization lines carry active signals associated with the one or more portions of the active circuitry when the active circuitry is in the first mode of operation and do not carry active signals associated with the one or more portions of the active circuitry when the active circuitry is in the second mode of operation ([0057], fig 7, as described.. due to the metallization lines #306 configured to have a first mode of operation of carrying active circuitry, the active circuitry with the first mode of operation carries active signals and the second mode of operation does not carry active signals). Regarding claims 8 and 17. Fountain JR discloses wherein: the one or more substrates comprise a plurality of stacked substrates ([0058], figure 7, the one substrate #101 comprises of a plurality of stacked substrates #101 (two of which are illustrated in figure 7 as on near the top and one at the center)); the one or more TTSVs extend through the plurality of stacked substrates to form the first set of one or more thermally conductive paths ([0058], figure 7, one TTSV #703 is seen extending through the plurality of stacked substrates #101 to form the first set of thermally conductive path); and the first set of one or more thermally conductive paths includes at least one thermally conductive path between each substrate of the plurality of stacked substrates and the heat sink structure ([0058], figure 7, the first set of thermally conductive path #703 includes one thermally conductive path #306 (materially described in [0036]) between each substrate #101 from the plurality of stacked substrates #101 and heat sink structure #705). Regarding claim 9. Fountain JR discloses wherein the electronic device comprises at least one of: a music player; a video player; an entertainment unit; a navigation device; a communications device; a mobile device; a mobile phone; a smartphone; a personal digital assistant; a fixed location terminal; a tablet computer, a computer; a wearable device; a laptop computer; a server; an internet of things (IoT) device; or a device in an automotive vehicle ([0002], figure 7, the electronic device #700 includes components which allow for the use of a communication device). Regarding claim 18. Fountain JR discloses wherein the heat sink structure comprises: a heat spreader; a heat sink; or a combination thereof ([0058], figure 7, the heat sink structure #705 comprises of a heat sink as described). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Fountain, JR. et al. (US-20230352369-A1 referred as Fountain JR) in view of Zhou et al. (US-20240063090-A1 referred as Zhou). Regarding claim 2 and 11. Fountain JR lacks wherein: the one or more TTSVs comprise a plurality of TTSVs; and the second set of one or more thermally conductive paths are placed in thermal contact with the first set of one or more thermally conductive paths through one or more permanent heat-conductive branches extending between the plurality of TTSVs. PNG media_image1.png 341 685 media_image1.png Greyscale Kim discloses wherein: the one or more TTSVs comprise a plurality of TTSVs ([0029], annotated fig 3 above, the TTSV #112a comprises a plurality of TTSVs as illustrated which make up to be the first set of thermally conductive paths); and the second set of one or more thermally conductive paths are placed in thermal contact with the first set of one or more thermally conductive paths through one or more permanent heat-conductive branches extending between the plurality of TTSVs ([0077], fig 5a, the second set of thermally conductive paths comprising of #112b is in thermal contact with the first set of thermal conductive path #112a through a permanent heat-conductive branch #110. All elements are thermal and conductive vias as described). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Fountain JR to include a plurality of TTSVs and attach the second set of thermally conductive paths to the first second of thermally conductive path with a permanent heat conductive branch as taught by Kim in order to enhance the devices integrity, reduce device failure from future disconnection, and to allow for additional circuit safety. Claims 3, 12, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Fountain, JR. et al. (US-20230352369-A1 referred as Fountain JR) in view of Brintzinger et al. (US-7235859-B2 referred as Brintzinger). Regarding claim 3, 12, and 20. Fountain JR lacks [claim 3 and claim 12] further comprising: one or more anti-fuses configured to connect the one or more metallization lines as the heat-conductive branches; and one or more fuses configured to disconnect the one or more metallization lines from carrying the active signals of the active circuitry. [claim 20] further comprising: actuating one or more anti-fuses to connect the one or more metallization lines as the heat-conductive branches; and actuating one or more fuses to disconnect the one or more metallization lines from carrying the active signals of the active circuitry. Brintzinger discloses [claim 3 and claim 12] further comprising: one or more anti-fuses configured to connect the one or more metallization lines as the heat-conductive branches; and one or more fuses configured to disconnect the one or more metallization lines from carrying the active signals of the active circuitry ([col 2 lines 51-63], figure 1, anti fuses and/or fuses #4 are connected to the metallization line #M1 and could be configured for the fuse to disconnect the metallization line and for the antifuse to carry the active signal). [claim 20] further comprising: actuating one or more anti-fuses to connect the one or more metallization lines as the heat-conductive branches; and actuating one or more fuses to disconnect the one or more metallization lines from carrying the active signals of the active circuitry ([col 2 lines 51-63], figure 1, anti fuses and/or fuses #4 are connected to the metallization line #M1 and could be configured for the fuse to disconnect the metallization line and for the antifuse to carry the active signal). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Fountain JR to include anti fuses and/or fuses #4 are connected to the metallization line as taught by Brintzinger in order to increase safety in the device, provide additional versatility, and to increase device efficiency. Claims 4 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Fountain, JR. et al. (US-20230352369-A1 referred as Fountain JR) in view of Katragadda et al. (US-20110003422-A1 referred as Katragadda). Regarding claim 4 and 13. Fountain JR lacks further comprising: a set of one or more nanoelectromechanical system (NEMS ) switches having a first switch state in which the first set of one or more NEMS switches is configured to connect the one or more metallization lines as the heat-conductive branches, and a second switch state in which the first set of one or more NEMS switches is configured to remove the one or more metallization lines as the heat-conductive branches. Katragadda discloses further comprising: a set of one or more nanoelectromechanical system (NEMS ) switches having a first switch state in which the first set of one or more NEMS switches is configured to connect the one or more metallization lines as the heat-conductive branches, and a second switch state in which the first set of one or more NEMS switches is configured to remove the one or more metallization lines as the heat-conductive branches ([0038-0039], figure 4f, the NEMS switch #404 is connected to the metallization line #420 and connected, as described, and is also could be configured to have a first switch state which allows the NEMS switch to connect to the metallization line as heat-conductive branches and also a second switch state which removes the metallization lines as head-conductive branches). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Fountain JR to a set of one or more nanoelectromechanical system (NEMS ) switches is connected to the one or more metallization lines as taught by Katragadda in order to increase safety in the device, provide additional versatility, and to increase device efficiency. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure includes Prakuzhy et al. (US-12412800-B2) and Lepaksha (US-20250279330-A1) for teaching the heat sinks, TTSV, and metallization lines. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB R MARIN whose telephone number is (571)272-5887. The examiner can normally be reached Monday to Friday from 8:30am - 5:00pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272 - 2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JACOB RAUL MARIN/Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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Prosecution Timeline

Feb 29, 2024
Application Filed
Jun 09, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
3y 2m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 17 resolved cases by this examiner. Grant probability derived from career allowance rate.

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