DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Invention II and Species III in the reply filed on 3/30/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claims 1-7, 12 and 15 were withdrawn by Applicant and claims 11, 13-14, 18 and 20 are withdrawn by the Examiner from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention and/or Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 3/30/2026.
NOTE: Claim 18 discusses that the four pixels are of the same color, however, this is only shown in Fig. 4 and mentioned in paragraphs 41-42 of the specification which are drawn towards a non-elected species. Claims 11 and 20 mentions the second FD region is “adjacent to the center of the sensing unit”, however, in the elected species it is in the venter of the sensing unit and it being “adjacent” is only discussed related to non-elected species as discussed in paragraph 29 of the specification. Claims 13-14 depend upon claim 11 and are withdrawn for similar reasons.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 8-10, 16-17 and 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Patent Application Publication 2022/0077207 A1 to Ejiri.
With respect to claim 8 Ejiri discloses, in Fig. 1-37, an image sensor (11102) (Fig. 37; where the image sensor is interpreted as the camera head which comprises the imager), comprising: a sensing unit (1) comprising: a plurality of photodiodes (PD) (paragraph 64 and Fig. 15); a plurality of transistors electrically connected to the plurality of photodiodes (Fig 15; TRGs and FDGs); and a plurality of source follower transistors (Fig. 15; AMP1s and AMP2s), wherein: the plurality of transistors are located between the plurality of photodiodes and the plurality of source follower transistors in a thickness direction of the image sensor (Fig. 18; where FDG is between AMP 2 and TRG is between AMP 1 and the photodiodes height wise), the plurality of photodiodes (PDs) are electrically connected to a plurality of first source follower (AMP1s) transistors among the plurality of source follower transistors through a plurality of first transistors (TRG) among the plurality of transistors (Fig. 15; where this group of 4 pixels is repeated throughout the imager to satisfy there are a plurality of first source followers AMP1 in the sensing unit 1), and electrically connected to a second source follower transistor (AMP2) among the plurality of source follower transistors through a plurality of second transistors (FDGs) among the plurality of transistors (Fig. 15), the plurality of second transistors (FDGs) are closer to a center of the sensing unit than the plurality of first transistors (TRGs) (Fig. 18 and 21; where it is seen the FDG transistors are located between FD1 and FD2 which is closer to the center of the groups of pixels), and the second source follower transistor (AMP2) is closer to the center of the sensing unit than the plurality of first source follower transistors (AMP1) (Fig. 18; where AMP2 is closer to the center height wise then AMP 1).
With respect to claim 9 Ejiri discloses, in Fig. 1-37, the image sensor as claimed in claim 8, wherein the sensing unit further comprises: a plurality of first floating diffusion regions (FD1) overlapped with and electrically connected to the plurality of first source follower transistors (Fig. 15 and 18), wherein each of the plurality of first floating diffusion regions is shared between at least two corresponding first transistors among the plurality of first transistors (Fig. 15).
With respect to claim 10 Ejiri discloses, in Fig. 1-37, the image sensor as claimed in claim 9, wherein the sensing unit further comprises: a plurality of vertical conductors (49) extended between the plurality of first floating diffusion regions and the plurality of first source follower transistors and electrically connecting the plurality of first floating diffusion regions to the plurality of first source follower transistors (Fig. 18 and paragraph 111).
With respect to claim 16 Ejiri discloses, in Fig. 1-37, an image sensor (11102) (Fig. 37; where the image sensor is interpreted as the camera head which comprises the imager), comprising: a sensing unit (1) comprising: a plurality of photodiodes (PD) within a first substrate (10) (paragraph 64 and Fig. 15); a plurality of first transistors (TRGs) disposed on the first substrate (10) and electrically connected to the plurality of photodiodes (Fig. 15); a plurality of second transistors (FDGs) disposed on the first substrate (10) and electrically connected to the plurality of photodiodes (Fig. 15); a plurality of first source follower transistors (AMP1s) disposed on a second substrate (20) overlapped with the first substrate (Fig. 15 and 18; where this group of 4 pixels is repeated throughout the imager to satisfy there are a plurality of first source followers AMP1 in the sensing unit 1); and a second source follower transistor (AMP2) disposed on the second substrate (20) (Fig. 15), wherein the plurality of photodiodes are electrically connected to the plurality of first source follower transistors through the plurality of first transistors, and electrically connected to the second source follower transistor through the plurality of second transistors (Fig. 15).
With respect to claim 17 Ejiri discloses, in Fig. 1-37, the image sensor as claimed in claim 16, wherein in the sensing unit: the plurality of first transistors and the plurality of second transistors are within a first interconnect structure (46) on the first substrate (Fig 18), the plurality of first source follower transistors (AMP1) and the second source follower transistor (AMP2) are within a second interconnect structure on the second substrate (Fig. 21), and the first interconnect structure is bonded and electrically connected to the second interconnect structure (paragraph 83).
With respect to claim 19 Ejiri discloses, in Fig. 1-37, the image sensor as claimed in claim 16, wherein the sensing unit further comprises: a plurality of first floating diffusion regions (FD1s) within the first substrate and electrically connected to the plurality of first source follower transistors (Fig. 15), wherein each of the plurality of first floating diffusion regions is shared between at least two corresponding first transistors among the plurality of first transistors (Fig. 15).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL M PASIEWICZ whose telephone number is (571)272-5516. The examiner can normally be reached M-F 9 AM - 5:30 PM EST.
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/DANIEL M PASIEWICZ/Primary Examiner, Art Unit 2699
April 13, 2026
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