DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species A, claims 1-21 in the reply filed on 06/02/2026 is acknowledged.
Foreign Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. JP2023-088707, filed on 05/30/2023.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/01/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 are rejected under U.S.C. 103 as being unpatentable over Sato et al.; US 2022/0044980 A1; 12/2018 in view of Pfaffenlehner et al.; US 2020/0357883 A1; 05/2020 and Yamazaki et al.; US 11,372,276 B2; 12/2020
Claim 1: Sato discloses a semiconductor device comprising: a semiconductor substrate ( Fig. 1 substrate 40 ) made of a wide band gap semiconductor ( Fig. 1 wide band-gap semiconductor 1 ) and having a first principal surface ( [0023] The semiconductor chip 1 further includes a second main electrode 102 on the front surface serving as an anode connected to the p-type semiconductor region 12 ) and a second principal surface ( [0023] The semiconductor chip 1 also includes a first main electrode 101 on the rear surface serving as a cathode ) ; an active region ( Fig. 1 semiconductor region 12 ) provided in a central portion when viewed from the first principal surface side of the semiconductor substrate ( as shown in Fig. 1 ); wherein the active region has at least one junction of different conductivity types having a first conductivity type region and a second conductivity type region ( Fig. 1 p-n junction 13 )
Sato does not appear to disclose an edge termination region provided to surround the active region; and a dicing line provided to surround the edge termination region, wherein a step surface provided on the first principal surface side between the edge termination region and the dicing line so as to be on the second principal surface side with respect to the junction of different conductivity types is provided, and wherein the step surface is covered with a first protective film having a low light transmittance.
Pfaffenlehner discloses an edge termination region ( Fig. 1 edge termination region 1-3 ) provided to surround the active region ( Fig. 1 active region 1-2 ); and a dicing line ( Fig. 1 dicing line 1-4 ) provided to surround the edge termination region ( Fig. 1: 1-3 ), wherein a step surface provided on the first principal surface side between the edge termination region ( Fig. 1: 1-3 ) and the dicing line ( Fig. 1: 1-4 ) so as to be on the second principal surface side with respect to the junction ( Fig. 3: p-n junction with the drift region 100 ) of different conductivity types is provided.
Pfaffenlehner does not appear to disclose the step surface is covered with a first protective film having a low light transmittance.
However, Yamazaki teaches the step surface is covered with a first protective film ( Fig. 1C protective film 23 ) having a low light transmittance ( Col. 55 lines 52 – 58 From FIG. 64, it is found that the samples formed at deposition temperatures of 80° C. and 100° C. can keep low light transmittance. Furthermore, the sample formed at a deposition temperature of 100° C. is likely to obtain low light transmittance stably. This is because the aluminum oxide film that functions as a protection film prevents moisture from entering ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Yamazaki with Sato and Pfaffenlehner to implement an edge termination region provided to surround the active region; and a dicing line provided to surround the edge termination region, wherein a step surface provided on the first principal surface side between the edge termination region and the dicing line so as to be on the second principal surface side with respect to the junction of different conductivity types is provided, and wherein the step surface is covered with a first protective film having a low light transmittance because the edge termination region ensures high-voltage performance and field control, the dicing line enables die separation, the step surface is a structural feature for field and mechanical control, and the low-light transmittance protective film safeguards the surface and prevents light-induced leakage. These features improve device reliability, efficiency, and manufacturability.
Claim 2: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Yamazaki appear to disclose the active region is a MOS-type semiconductor device with an insulated gate, the first conductivity-type region is a drift region, and the second conductivity-type region is a base region.
However, Pfaffenlehner teaches the active region is a MOS-type semiconductor device with an insulated gate ( Fig. 11 insulated gate electrode 141 ), the first conductivity-type region is a drift region ( Fig. 11: drift region 100 ), and the second conductivity-type region is a base region ( Fig. 11: first doped semiconductor region 101 ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Pfaffenlehner with Sato and Yamazaki to implement the active region is a MOS-type semiconductor device with an insulated gate, the first conductivity-type region is a drift region, and the second conductivity-type region is a base region because this structure is common in MOSFETs and similar insulated-gate devices to ensure high efficiency and low power consumption in modern electronics.
Claim 3: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Pfaffenlehner appear to disclose the first protective film is provided on the first principal surface side of the edge termination region, in addition to the step surface.
However, Yamazaki teaches the first protective film ( Fig. 1C #23) is provided on the first principal surface side of the edge termination region, in addition to the step surface ( as shown in Fig. 1C ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Yamazaki with Sato and Pfaffenlehner to implement the first protective film is provided on the first principal surface side of the edge termination region, in addition to the step surface because this is a design choice to maximize electrical performance, reliability, and process control.
Claim 4: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 2 ( as discussed above).
Neither Sato nor Pfaffenlehner appear to disclose the first protective film is provided on the first principal surface side of the edge termination region, in addition to the step surface.
However, Yamazaki teaches the first protective film ( Fig. 1C #23) is provided on the first principal surface side of the edge termination region, in addition to the step surface ( as shown in Fig. 1C ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Yamazaki with Sato and Pfaffenlehner to implement the first protective film is provided on the first principal surface side of the edge termination region, in addition to the step surface because the first protective film preserves electrical integrity, prevents contamination, manages interface quality, and protects against mechanical damage.
Claims 5-6 , and 15-16 are rejected under U.S.C. 103 as being unpatentable over Sato et al.; US 2022/0044980 A1; 12/2018 in view of Pfaffenlehner et al.; US 2020/0357883 A1; 05/2020 and Yamazaki et al.; US 11,372,276 B2; 12/2020 as it relates to claim 1 above and further in view of Yamamoto et al.; US 2017/0004991 A1; 01/2015
Claim 5: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film has a light transmittance of 5% or less in a visible light wavelength region.
However, Yamamoto teaches the first protective film has a light transmittance of 5% or less in a visible light wavelength region ( [0035] From a viewpoint of the grinding mark concealing properties, the light transmittance of the protective film-forming film at a wavelength of 550 nm is preferably 15% or less and particularly preferably 10% or less. When the light transmittance of the protective film-forming film at a wavelength of 550 nm is 10% or less, even when the protective film-forming film is thin and the thickness is 15 μm or less, particularly when grinding marks becomes more spottable, grinding marks may be more reliably concealed. From the viewpoint of concealing grinding marks, the lower limit of the light transmittance at a wavelength of 550 nm is not particularly limited. When the light transmittance at a wavelength of 550 nm is excessively lowered, in some cases, it may become difficult to obtain a light transmittance at a wavelength of 1064 nm of 55% or greater. Therefore, in general, the lower limit of the light transmittance at a wavelength of 550 nm is about 0.1%, and preferably about 0.5% ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Yamamoto with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film has a light transmittance of 5% or less in a visible light wavelength region because this property is essential when the film’s role is to block light, protect sensitive layers, or act as a light-shielded barrier.
Claim 6: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 2 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film has a light transmittance of 5% or less in a visible light wavelength region.
However, Yamamoto teaches the first protective film has a light transmittance of 5% or less in a visible light wavelength region ( [0035] From a viewpoint of the grinding mark concealing properties, the light transmittance of the protective film-forming film at a wavelength of 550 nm is preferably 15% or less and particularly preferably 10% or less. When the light transmittance of the protective film-forming film at a wavelength of 550 nm is 10% or less, even when the protective film-forming film is thin and the thickness is 15 μm or less, particularly when grinding marks becomes more spottable, grinding marks may be more reliably concealed. From the viewpoint of concealing grinding marks, the lower limit of the light transmittance at a wavelength of 550 nm is not particularly limited. When the light transmittance at a wavelength of 550 nm is excessively lowered, in some cases, it may become difficult to obtain a light transmittance at a wavelength of 1064 nm of 55% or greater. Therefore, in general, the lower limit of the light transmittance at a wavelength of 550 nm is about 0.1%, and preferably about 0.5% ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Yamamoto with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film has a light transmittance of 5% or less in a visible light wavelength region because this property is essential when the film’s role is to block light, protect sensitive layers, or act as a light-shielded barrier.
Claim 15: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film has a film thickness of 10 μm or greater.
However, Yamamoto teaches the first protective film has a film thickness of 10 μm or greater ( [0017] In the invention (inventions 1 to 5), the protective film-forming film may have a thickness of 3 to 15 μm (invention 6) ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Yamamoto with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film has a film thickness of 10 μm or greater because this approach ensures durability, compatibility with early-stage mechanical and chemical processes, and prevents damage to the wafer surface.
Claim 16: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 2 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film has a film thickness of 10 μm or greater.
However, Yamamoto teaches the first protective film has a film thickness of 10 μm or greater ( [0017] In the invention (inventions 1 to 5), the protective film-forming film may have a thickness of 3 to 15 μm (invention 6) ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Yamamoto with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film has a film thickness of 10 μm or greater because this approach ensures durability, compatibility with early-stage mechanical and chemical processes, and prevents damage to the wafer surface.
Claims 7-10 are rejected under U.S.C. 103 as being unpatentable over Sato et al.; US 2022/0044980 A1; 12/2018 in view of Pfaffenlehner et al.; US 2020/0357883 A1; 05/2020 and Yamazaki et al.; US 11,372,276 B2; 12/2020 as it relates to claim 1 above and further in view of Kimura et al.; US 2017/0140972 A1; 11/2016
Claim 7: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film has a transmittance of 5% or less of visible light with a shorter wavelength than blue.
However, Kimura teaches the first protective film has a transmittance of 5% or less of visible light with a shorter wavelength than blue ( [0053] While there is no particular limitation with respect to the optical transmittance for a visible light beam (wavelength=380 nm to 750 nm) (visible light transmittance ) of semiconductor backside protective film 3, it is for example preferred that this be within a range such that it is not greater than 20% (0% to 20%), more preferred that this be not greater than 10% (0% to 10%), and especially preferred that this be not greater than 5% (0% to 5%); blue light is from 500 – 450 nm so the range above is shorter than the lowest wavelength of blue light ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Kimura with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film has a transmittance of 5% or less of visible light with a shorter wavelength than blue because the protective film’s low transmittance for shorter wavelengths is due to the wide bandgap and absorption edge.
Claim 8: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 2 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film has a transmittance of 5% or less of visible light with a shorter wavelength than blue.
However, Kimura teaches the first protective film has a transmittance of 5% or less of visible light with a shorter wavelength than blue ( [0053] While there is no particular limitation with respect to the optical transmittance for a visible light beam (wavelength=380 nm to 750 nm) (visible light transmittance ) of semiconductor backside protective film 3, it is for example preferred that this be within a range such that it is not greater than 20% (0% to 20%), more preferred that this be not greater than 10% (0% to 10%), and especially preferred that this be not greater than 5% (0% to 5%) ; blue light is from 500 – 450 nm so the range above is shorter than the lowest wavelength of blue light ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Kimura with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film has a transmittance of 5% or less of visible light with a shorter wavelength than blue because the protective film’s low transmittance for shorter wavelengths is due to the wide bandgap and absorption edge.
Claim 9: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film has a transmittance of 5% or less of ultraviolet light.
However, Kimura teaches the first protective film has a transmittance of 5% or less of visible light with a shorter wavelength than blue ( [0053] While there is no particular limitation with respect to the optical transmittance for a visible light beam (wavelength=380 nm to 750 nm) (visible light transmittance ) of semiconductor backside protective film 3, it is for example preferred that this be within a range such that it is not greater than 20% (0% to 20%), more preferred that this be not greater than 10% (0% to 10%), and especially preferred that this be not greater than 5% (0% to 5%) ; ultraviolet light is in the range of 100-400 nm which is covered by the 380 nm lower range ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Kimura with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film has a transmittance of 5% or less of ultraviolet light because this allows the protective film to absorb and block harmful UV radiation before it reaches the underlying semiconductor layers, preventing degradation, contamination, and unwanted photochemical effects.
Claim 10: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 2 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film has a transmittance of 5% or less of ultraviolet light.
However, Kimura teaches the first protective film has a transmittance of 5% or less of visible light with a shorter wavelength than blue ( [0053] While there is no particular limitation with respect to the optical transmittance for a visible light beam (wavelength=380 nm to 750 nm) (visible light transmittance ) of semiconductor backside protective film 3, it is for example preferred that this be within a range such that it is not greater than 20% (0% to 20%), more preferred that this be not greater than 10% (0% to 10%), and especially preferred that this be not greater than 5% (0% to 5%) ; ultraviolet light is in the range of 100-400 nm which is covered by the 380 nm lower range ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Kimura with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film has a transmittance of 5% or less of ultraviolet light because this allows the protective film to absorb and block harmful UV radiation before it reaches the underlying semiconductor layers, preventing degradation, contamination, and unwanted photochemical effects.
Claims 11-14 are rejected under U.S.C. 103 as being unpatentable over Sato et al.; US 2022/0044980 A1; 12/2018 in view of Pfaffenlehner et al.; US 2020/0357883 A1; 05/2020 and Yamazaki et al.; US 11,372,276 B2; 12/2020 as it relates to claim 1 above and further in view of Tozawa; US 2025/0228031 A1; 04/2023
Claim 11: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film is an organic film made of polyimide.
However, Tozawa teaches the first protective film is an organic film made of polyimide ( [0020] Furthermore, in the first aspect, the surface protective film may include an inorganic film including silicon dioxide (SiO.sub.2) and silicon nitride (Si.sub.3N.sub.4), an organic film such as a polyimide-based resin, or a laminated structure of these films ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Tozawa with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film is an organic film made of polyimide because this material combines thermal stability, electrical insulation, mechanical strength, flexibility, and process compatibility in a single organic polymer.
Claim 12: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 2 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film is an organic film made of polyimide.
However, Tozawa teaches the first protective film is an organic film made of polyimide ( [0020] Furthermore, in the first aspect, the surface protective film may include an inorganic film including silicon dioxide (SiO.sub.2) and silicon nitride (Si.sub.3N.sub.4), an organic film such as a polyimide-based resin, or a laminated structure of these films ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Tozawa with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film is an organic film made of polyimide because this material combines thermal stability, electrical insulation, mechanical strength, flexibility, and process compatibility in a single organic polymer.
Claim 13: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film is an inorganic film made of non-doped polysilicon or amorphous silicon.
However, Tozawa teaches the first protective film is an inorganic film made of non-doped polysilicon or amorphous silicon ( [0020] Furthermore, in the first aspect, the surface protective film may include an inorganic film including silicon dioxide (SiO.sub.2) and silicon nitride (Si.sub.3N.sub.4), an organic film such as a polyimide-based resin, or a laminated structure of these films; where silicon dioxide and silicon nitride are amorphous dielectric films ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Tozawa with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film is an inorganic film made of non-doped polysilicon or amorphous silicon because this material is thermally and chemically compatible with silicon processing.
Claim 14: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 2 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the first protective film is an inorganic film made of non-doped polysilicon or amorphous silicon.
However, Tozawa teaches the first protective film is an inorganic film made of non-doped polysilicon or amorphous silicon ( [0020] Furthermore, in the first aspect, the surface protective film may include an inorganic film including silicon dioxide (SiO.sub.2) and silicon nitride (Si.sub.3N.sub.4), an organic film such as a polyimide-based resin, or a laminated structure of these films; where silicon dioxide and silicon nitride are amorphous dielectric films ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Tozawa with Sato, Pfaffenlehner, and Yamazaki to implement the first protective film is an inorganic film made of non-doped polysilicon or amorphous silicon because this material is thermally and chemically compatible with silicon processing.
Claims 17- 18 and 20-21 are rejected under U.S.C. 103 as being unpatentable over Sato et al.; US 2022/0044980 A1; 12/2018 in view of Pfaffenlehner et al.; US 2020/0357883 A1; 05/2020 and Yamazaki et al.; US 11,372,276 B2; 12/2020 as it relates to claim 1 above and further in view of Kurosawa; US 2017/0142838 A1; 10/2016
Claim 17: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 1 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose a second protective film is further provided between the semiconductor substrate and the first protective film on the step surface.
However, Kurosawa teaches a second protective film ( Fig. 6 second protective film 102 ) is further provided between the semiconductor substrate ( Fig. 6 substrate 100 ) and the first protective film ( Fig. 6 first protective film 106 ) on the step surface ( as shown in Fig. 6 outside edge of 106 ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Kurosawa with Sato, Pfaffenlehner, and Yamazaki to implement a second protective film is further provided between the semiconductor substrate and the first protective film on the step surface because the additional layer enhances durability, cleanliness, and process compatibility in areas that are mechanically and chemically more vulnerable.
Claim 18: Sato, Pfaffenlehner and Yamazaki disclose the semiconductor device according to claim 2 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose a second protective film is further provided between the semiconductor substrate and the first protective film on the step surface.
However, Kurosawa teaches a second protective film ( Fig. 6 second protective film 102 ) is further provided between the semiconductor substrate ( Fig. 6 substrate 100 ) and the first protective film ( Fig. 6 first protective film 106 ) on the step surface ( as shown in Fig. 6 outside edge of 106 ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Kurosawa with Sato, Pfaffenlehner, and Yamazaki to implement a second protective film is further provided between the semiconductor substrate and the first protective film on the step surface because the additional layer enhances durability, cleanliness, and process compatibility in areas that are mechanically and chemically more vulnerable.
Claim 20: Sato, Pfaffenlehner, Yamazaki, and Kurosawa disclose the semiconductor device according to claim 17 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the second protective film is an organic film formed of polyimide or the like.
However, Kurosawa teaches the second protective film is an organic film formed of polyimide or the like ( [0077] The second protective film 102 may be formed on the removal layer 101. The material for the second protective film 102 may be either inorganic or organic, but may be required to have heat resistance for the following capacitor forming process, to be robust enough not to be damaged in the removing operation, and to ensure the reliability of the completed capacitor. Applicable inorganic materials may include SiO.sub.2, SiN, Al.sub.2O.sub.3, and ZrO.sub.2, and applicable organic materials may include polyimide resins and benzocyclobutene (BCB) resins ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Kurosawa with Sato, Pfaffenlehner, and Yamazaki to implement the second protective film is an organic film formed of polyimide or the like because this material combines thermal stability, electrical insulation, mechanical strength, flexibility, and process compatibility in a single organic polymer.
Claim 21: Sato, Pfaffenlehner, Yamazaki, and Kurosawa disclose the semiconductor device according to claim 17 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki appear to disclose the second protective film is an inorganic film made of non-doped polysilicon or amorphous silicon
However, Kurosawa teaches the second protective film is an inorganic film made of non-doped polysilicon or amorphous silicon ( [0077] The second protective film 102 may be formed on the removal layer 101. The material for the second protective film 102 may be either inorganic or organic, but may be required to have heat resistance for the following capacitor forming process, to be robust enough not to be damaged in the removing operation, and to ensure the reliability of the completed capacitor. Applicable inorganic materials may include SiO.sub.2, SiN, Al.sub.2O.sub.3, and ZrO.sub.2, and applicable organic materials may include polyimide resins and benzocyclobutene (BCB) resins ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Kurosawa with Sato, Pfaffenlehner, and Yamazaki to implement the second protective film is an inorganic film made of non-doped polysilicon or amorphous silicon because this material is thermally and chemically compatible with silicon processing.
Claim 19 is rejected under U.S.C. 103 as being unpatentable over Sato et al.; US 2022/0044980 A1; 12/2018 in view of Pfaffenlehner et al.; US 2020/0357883 A1; 05/2020, Yamazaki et al.; US 11,372,276 B2; 12/2020, and Kurosawa; US 2017/0142838 A1; 10/2016 as it relates to claim 17 above and further in view of Fujimura et al.; US 2023/0330990 A1; 04/2023
Claim 19: Sato, Pfaffenlehner, Yamazaki, and Kurosawa disclose the semiconductor device according to claim 17 ( as discussed above).
Neither Sato nor Paffenlehner nor Yamazaki nor Kurosawa appear to disclose the second protective film has a film thickness of 10 μm or greater.
However, Fujimura teaches the second protective film has a film thickness of 10 μm or greater ( [0049] The thickness of the second protective film 18 is equal to or greater than 200 nm in consideration of the surface properties of the underlying layer and pin holes, and is preferably equal to or greater than 500 nm ).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to utilize the teachings of Fujimura with Sato, Pfaffenlehner, Yamazaki, and Kurosawa to implement the second protective film has a film thickness of 10 μm or greater because this is used to ensure robust mechanical protection, complete removal of the layer, uniform coverage, and contamination control.
Conclusion
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/K.N.F./Examiner, Art Unit 2817
/ALI NARAGHI/Primary Examiner, Art Unit 2817
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