Prosecution Insights
Last updated: October 23, 2026
Application No. 18/593,502

SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §102§103
Filed
Mar 01, 2024
Priority
Mar 16, 2023 — JP 2023-041497
Examiner
BAIG, ANEESA RIAZ
Art Unit
4100
Tech Center
4100
Assignee
KIOXIA Corporation
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
8m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
45 granted / 49 resolved
+31.8% vs TC avg
Moderate +10% lift
Without
With
+10.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
16 currently pending
Career history
69
Total Applications
across all art units

Statute-Specific Performance

§103
45.7%
+5.7% vs TC avg
§102
27.1%
-12.9% vs TC avg
§112
26.1%
-13.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 49 resolved cases

Office Action

§102 §103
Attorney’s Docket Number: TAI/3997US Filing Date: 03/01/2024 Claimed Priority Date: 03/16/2023 (JP 2023-041497) Applicants: Ishimatsu et al. Examiner: Aneesa Baig DETAILED ACTION This Office action responds to the election filed on 07/06/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s elections without traverse of Group I Invention, directed to a method, and of Species 1(reading on 1-7) in the reply filed on 07/06/2026, is acknowledged. Applicant indicated that claims 10-17,19,20 read on the elected Group I, Species 1. The examiner agrees. Accordingly, claims 1-9,18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention/Species. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 10 is rejected under 35 U.S.C. 102 (a)(1) as anticipated by Horibe et al (US 9793293 B1, Hereinafter Horibe). Regarding Claim 10, Horibe (e.g., Fig 11B, 11C, 6B, 8A, 9A, 9B Col 8, 11) shows all aspects of the instant invention, including, a method for manufacturing a semiconductor device, the method comprising: forming a stacked film in which a plurality of first layers containing silicon and a plurality of second layers containing silicon nitride are alternately stacked in a first direction (Pg 53, col 8, second layer sacrificial layer 42 is Silicon nitride and first layer insulating body 40 is silicon oxide); forming an opening that penetrates the stacked film and that extends in the first direction (9H, opening is formed to make CL and MH); and forming a silicon oxide layer between a set of adjacent ones of the plurality of second layers by oxidizing a first layer that is between the set of adjacent ones of the plurality of second layers (Fig 11B and 11C “second region 75b is a region where the silicon oxide of the insulating body 40, the third insulator 54, etc., is further oxidized” Further 75b is between prior SiN layers 42 ). Note, the claim includes a transitional phrase “containing” which is inclusive or open-ended and does not exclude additional, unrecited elements or method steps. See MPEP 2111.03. Hence, under BRI, the insulating body 40 made of Silicon and oxygen anticipates the first layer containing silicon as per claim 10 and the guidance from the MPEP. Claim 10 is rejected under 35 U.S.C. 102 (a)(1) as anticipated by Kim et al (US 20190198520 A1, Hereinafter Kim). Regarding Claim 10, Kim (e.g., Fig 12, 13 [0045]-[0055]) shows all aspects of the instant invention, including, a method for manufacturing a semiconductor device, the method comprising forming a stacked film in which a plurality of first layers containing silicon (Layer 32, made of polycrystalline silicon) and a plurality of second layers containing silicon nitride (Layer 40, SiN) are alternately stacked in a first direction (layer 40 and 32 are stacked alternatively); forming an opening that penetrates the stacked film and that extends in the first direction (opening 24); and forming a silicon oxide layer (silicon dioxide 52) between a set of adjacent ones of the plurality of second layers by oxidizing a first layer that is between the set of adjacent ones of the plurality of second layers (52 is formed between layer 40 SiN [0046]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Kim in view of Han et al (US 20200295041 A1, Hereinafter Han). Regarding claim 16, While Kim shows a silicon layer with a silicon dioxide layer formed, it is silent about the thickness in the Z direction. With respect to these dimensions, Han ( Fig 2, [0004] [0025]), on the other hand and in a related field of 3D NAND stack teaches that thickness is a variable of importance that would affect the breakdown voltage of leakage current, even at reduced thicknesses of the semiconductor structure. Han also teaches that the insulating layers may be between 20 or 30 nm or less, satisfying the limitation of having a first layer greater than 10nm or more. Accordingly, the specific thickness of 10nm or more, absent any criticality, is only considered to be the “optimum” proportion of the dimensions of the insulation structure and metal bump disclosed by Kim in view of Han that a person having ordinary skill in the art would have been able to determine using routine experimentation based, among other things, on the desired bump protection parasitic capacitance, manufacturing costs, etc. (see Boesch, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e., results which are different in kind and not in degree from the results of the prior art, will be obtained as long as an insulation structure and a metal bump are used, as already suggested by Han. Since the applicant has not established the criticality (see next paragraph below) of the claimed proportion, it would have been obvious to one of ordinary skill in the art to use these values in the structure of Han. Note: To establish unexpected results over a claimed range, applicants should compare a sufficient number of tests both inside and outside the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960). The disclosure in [0075] is not sufficient per MPEP 716.02 to establish criticality of this thickness range. CRITICALITY The specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen dimensions or upon another variable recited in a claim, the applicant must show that the chosen dimensions are critical. In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Allowable Subject Matter Claims 11-14,15,17,19,20 are objected to as being dependent upon a rejected base claim but would be allowable if rewritten in independent form including all the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANEESA RIAZ BAIG whose telephone number is (571)272-0249. The examiner can normally be reached Monday-Friday 8am-5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached on 571-272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANEESA RIAZ BAIG/ Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
Read full office action

Prosecution Timeline

Mar 01, 2024
Application Filed
Sep 29, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
99%
With Interview (+10.3%)
3y 4m (~8m remaining)
Median Time to Grant
Low
PTA Risk
Based on 49 resolved cases by this examiner. Grant probability derived from career allowance rate.

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