Attorney’s Docket Number: SKYWRKS.1489A1
Filing Date: 03/01/2024
Claimed Foreign Priority Date: 03/02/2023 (PRO 63/449,512 , PRO63/449,504)
Applicant(s): Yeruva et al
Examiner: Aneesa Baig
DETAILED ACTION
This Office action responds to the election filed on 07/08/2026
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s elections Species 1 (reading on Figs. 4A) in the reply filed on 07/08/2026, is acknowledged.. Additionally, because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Applicant indicated Claims 1-9, 11-20 encompass the elected the Species. Examiner disagrees, as claim 3 is directed to figures 4B-4D with the masking arrangement only partially surrounding the opening regions.
Accordingly, claims 3, 10 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected Species. And pending in this application are claims 1-2, 3-9,11-20.
Specification
The disclosure is objected to because of the following informalities:
In [0073], “substrate panel 2” should be corrected to substrate panel 20.
Drawings
Figure 1-3 should be designated by a legend such as --Prior Art-- because only that which is old is illustrated. See MPEP § 608.02(g). Corrected drawings in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. The replacement sheet(s) should be labeled “Replacement Sheet” in the page header (as per 37 CFR 1.84(c)) so as not to obstruct any portion of the drawing figures. If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 19 is objected to because of the following:
Claim should be corrected to: “electronic assembly for use in an electronic device, -- Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention.
Claim 1 recites “a solder masking arrangement extend over.. ” at L. 10, then later recites “a masking arrangement” at L. 11. It is unclear if both recitations of the aforementioned are directed to the same or different features, thus rendering the claim indefinite. For the purpose of examination, the claim and all other references to this feature will be construed as reciting – a solder masking arrangement.--, as best understood by the examiner in view of the original disclosure, until further clarifications are provided by the applicant.
Claims 2-18 depend from claim 1, thus inherit the deficiencies identified supra.
Regarding Claims 3,4,9-14,19,20. All recitations of “the masking arrangement” are construed as reciting – a solder masking arrangement.--, as best understood by the examiner in view of the original disclosure, until further clarifications are provided by the applicant.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1,4,9,11-20 are rejected under 35 U.S.C. 102 (a)(1) as anticipated by Zheng et al (US 20150108204 A1, Hereinafter Zheng).
Regarding Claim 1, Zheng (e.g., Figure 1A-3B, 6A[0024]-[0044][0035]) shows all aspects of the instant invention, including, An electronic package (IC package) comprising:
a substrate panel (102);
an electronic module (101, which may be a PCB or IC chip , See abstract and [0035]) mounted to a surface of the substrate panel and including a group of electrically conductive nodes (113);
a plurality of electrically conductive contact pads arranged on the surface of the substrate panel (copper pad 115), a predetermined one of the plurality of electrically conductive contact pads is associated with the group of electrically conductive nodes (See Fig 2A,6A), the group of electrically conductive nodes coupled to a corresponding group of spatially distinct fusion areas (Fig 2A/2B shows distinct fusion areas) of the predetermined electrically conductive contact pad by corresponding intermediate solder portions (solder bump 130); and
a solder masking arrangement extending over a part of the surface of the substrate panel, the masking arrangement arranged over the predetermined electrically conductive contact pad (solder resist 125 is placed over a pad 115, Figs 1A/1B) and configured to at least partially define the group of spatially distinct fusion areas (solder resist openings (SRO) [0124]).
Regarding Claim 2, Zheng shows the group of spatially distinct fusion areas is formed of two spatially distinct fusion areas (Any two fusion areas in Fig 2A may form a group).
Regarding Claim 4, Zheng shows the solder mask surrounds the spatially distinct fusion areas.
Regarding Claim 9, Zheng shows a single solder masking arrangement (125).
Regarding Claim 11, See rejection from Claim 1, as it would be considered repeated here.
Regarding Claim 12, Zheng shows a periphery of at least one of the openings is closed to define a perimeter (Fig 2B shows closed perimeter circular openings within solder resist 125 in which the solder is positioned.
Regarding Claim 13, Zheng shows the masking arrangement defines a substantially planar outward facing surface opposing the electronic module (Fig 2A 2B, 125 is planar.)
Regarding Claim 14, Zheng shows the masking arrangement has uniform thickness (Fig 2A)
Regarding Claim 15, Zheng shows the group of electrically conductive nodes of the electronic module (113) includes a group of electrically conductive members extending away from a surface of the electronic module towards the predetermined electrically conductive contact pad, the electrically conductive members formed of an electrically conductive, non-solder material (Fig 2A, metallization bump 113 may be made of copper [0025]).
Regarding Claim 16, See rejection from Claim 15, as it would be considered repeated here.
Regarding Claim 17, Zheng shows the electrically conductive members are cylindrical pillars ([0025])
Regarding Claim 18, Zheng shows the electronic module forms part of a semiconductor die (101 which may be a 3D IC, PCB or IC chip , See abstract and [0035]).
Regarding Claim 19, Zheng (Fig 6B, IC Chip stack 602) shows an electronic assembly for use in an electronic device, the electronic assembly comprising: a circuit board (PCB 110 [0038]) configured to receive one or more electronic packages and an electronic package as in Claim 1.
Regarding Claim 20, Zheng shows a wireless device (Fig 8A-8C, functional block diagram of a system employing a packaged IC with mixed-dimensioned SRO, including a wireless (RF) module for use in wireless data transmission [0044]-[0046] ) comprising an electronic assembly including a circuit board (Fig 6B, 110) configured to receive one or more electronic packages (See Claim 1), the electronic assembly further including an electronic package mounted to the circuit board (Fig 6B).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5-6 are rejected under 35 U.S.C. 103 as being unpatentable over Zheng in view of Burnette et al (US 20020070451 A1, Hereinafter Burnette).
Regarding claim 5, Zheng shows an electronic package with pads arranged on a surface with masking over the pads. However, Zheng is silent about having some conductive pads without a mask arranged on the pad, and the pad is mask free.
Burnette, (See e.g., Fig 3, Abstract,[0001]-[0021]), on the other hand and in a related field, teaches having a combination of some pads that are solder mask defined (SMD, 66) and some other pads that are not solder mask defined (SMD 68). Burnette also teaches using a combination of mask defined and mask free bonding pads provides the advantages of good thermal cycling reliability and good bending reliability over devices that have only one kind of bonding pads masking arrangement.
Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to the varied masking arrangement in the package of Zheng, as taught by Burnette, to provide an electronic package with improved bending reliability as well as improved reliability when exposed to temperature cycling.
Regarding Claim 6, Zheng in view of Burnette teaches the pads that are mask free are coupled to corresponding nodes of an electronic module, the corresponding electrically conductive node being distinct from the group of previous electrically conductive nodes (Figure 3, Pads 56 are mask defined while 58 are not mask defined, all are indented to be electrically connected through solder balls to an electronic module [0018]).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Zheng in view of Burnette further in view of Asai et al (US 6326239, Hereinafter Asai).
Regarding Claim 7, While Zheng in view of Burnette disclose a package with pads using a combination of mask defined and mask free bonding pads, both do not show pads that are mask free and free of electrical coupling to a electronic module.
Asai (Fig 9, col 9), on the other hand and in a related field of solder bonding, teaches having a pad (dummy land 7) which is not connected to an electronic module. Asai teaches that having an additional dummy pad may be used as an alignment mark to indicate the position of the other pads.
Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have to a dummy land in the device of Zheng in view of Burnette, as taught by Asai, to allow for better alignment and reliability during mounting of two substrates.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Zheng in view of Lu et al (US 11728278 B2, Hereinafter Lu).
Regarding Claim 8, Zheng shows an electronic package with pads arranged on a surface with masking over the pads, and a module placed on the substrate connected through solder balls. However, Zheng is silent about having a mold or encapsulation around solder balls to fill a gap between the electronic module and the surface of a substrate.
Lu (Fig 1G, Cols 8 and 9), on the other hand and in a related field of solder bonding, teaches having an underfill within the gaps of two substrates. Underfill or molds are very common in semiconductor packages to provides insulation, and structural support.
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to underfill in the package of Zheng, because underfill is known in the art to be placed in gaps of solder connections, and implementing a known underfill arrangement for its conventional purpose would have been a common-sense choice by the skilled artisan. KSR Int’l Co. v. Teleflex Inc., 550 U.S, 82 USPQ2d 1385 (2007).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANEESA RIAZ BAIG whose telephone number is (571)272-0249. The examiner can normally be reached Monday-Friday 8am-5pm EST.
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/ANEESA RIAZ BAIG/
Examiner, Art Unit 2814
/WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
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