Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-13 have been examined.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 12 and 13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Neumann (US 2021/0334298).
Per Claim 1:
Neumann teaches:
- initiating generation of a first intermediate representation for a first part of an application; stopping generation of the first intermediate representation, wherein the stopping the generation of the first intermediate representation is based on: a number of operation nodes of the first intermediate representation reaching an interval value while generating the first intermediate representation; or a generation of an operation node corresponding to a predefined operation type; and compiling the generated first intermediate representation ([0075] Generally, translating the database query into an intermediate representation involves several steps, which include: parsing the query to form an operator tree, logically optimizing the operator tree, and compiling the operator tree to form the intermediate representation. The intermediate representation is generally not machine executable code. [0076] The computer system 200 (or the execution selector 244 of the computer system 200) then computes (710) an estimated query execution time according to an estimated number of rows that will be accessed to retrieve a result set corresponding to the database query, and computes (712) an estimated compilation time to compile the intermediate representation into machine executable code according to the size of the intermediate representation. In some implementations, computing the estimated compilation time is based (714) on the number of instructions in the intermediate representation. In some implementations, computing the estimated compilation time is based (716) on the types of instructions in the intermediate representation. In some implementations, computing the estimated compilation time is based (718) on the number of functions in the intermediate representation. In some implementations, computing the estimated compilation time is based (720) on the number of execution blocks in the intermediate representation. Each execution block comprises a maximal contiguous sequence of instructions without a jump instruction. [0077] In accordance with a determination that the estimated query execution time and the estimated compilation time satisfy an interpretation criterion, the computer system 200 invokes (722) a byte code interpreter 228 to retrieve the result set from the database by interpreting the intermediate representation. In accordance with a determination (724) that the estimated query execution time and the estimated compilation time satisfy a compilation criterion, the computer system compiles (726) the intermediate representation to form executable machine code, and executes (728) the executable machine code to retrieve the result set from the database. In accordance with a determination (730) that the estimated query execution time and the estimated compilation time satisfy an optimized compilation criterion, the computer system 200 performs (732) one or more optimization passes on the intermediate representation to form an optimized intermediate representation, compiles (734) the optimized intermediate representation to form optimized executable machine code, and executes (736) the optimized executable machine code to retrieve the result set from the database. Regardless of the execution option selected, the result set is returned (738) to the client.).
Per Claim 2:
Neumann teaches:
- further comprising: initiating generation of a second intermediate representation for a second part of the application, wherein the first part and the second part are different from each other; stopping, based on a number of operation nodes of the second intermediate representation reaching the interval value while generating the second intermediate representation, generation of the second intermediate representation; and compiling the generated second intermediate representation (par. 0038-0041).
Per Claim 12:
Neumann teaches:
- A non-transitory computer-readable medium storing instructions that, when executed by one or more processors, cause performance of the method according to claim 1 (e.g. see pg. 10, claim 17).
Per Claim 13:
This is a system version of the claimed method discussed above (claim 1, respectively), wherein all claim limitations also have been addressed and/or covered in cited areas as set forth above. Thus, accordingly, this claim is also anticipated by Neumann.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Neumann (US 2021/0334298) in view of Rister (US 2023/0315406).
Per Claim 4:
The rejection of claim 1 is incorporated, and further, Neumann does not explicitly teach sending the compiled first intermediate representation to a second processor, receiving an execution result for at least a part of the compiled first intermediate representation from the second processor; and initiating generation of a second intermediate representation for a second part of the application, wherein the first part and the second part are different from each other.
However, Rister teaches sending the compiled first intermediate representation to a second processor, receiving an execution result for at least a part of the compiled first intermediate representation from the second processor; and initiating generation of a second intermediate representation for a second part of the application, wherein the first part and the second part are different from each other (e.g. see pg. 26, claim 11).
It would have been obvious to one having ordinary skill in the computer art before the effective filing date of the claimed invention to modify the method disclosed by Neumann to include sending the compiled first intermediate representation to a second processor, receiving an execution result for at least a part of the compiled first intermediate representation from the second processor; and initiating generation of a second intermediate representation for a second part of the application, wherein the first part and the second part are different from each other using the teaching of Rister. The modification would be obvious because one of ordinary skill in the art would be motivated to optimize allocation of hardware resources for reconfigurable processors (Rister, par. 0017-0018).
Allowable Subject Matter
Claims 3 and 5-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Wang (US 2024/0028886) teaches a method for optimizing intermediate representation based on criterion.
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/QAMRUN NAHAR/Primary Examiner, Art Unit 2199