DETAILED ACTION
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
2. This Non-Final office action is in response to application 18/598,095, application filed on 03/07/2024. Claims 1-20 are currently pending in this application.
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
4. Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Van Eijk et al. (US PG Pub No. 2007/0245280).
5. With respect to independent claims 1 and 11, Van Eijk teaches:
A method/system of shaping flexible blocks on a chip canvas in an integrated circuit (IC) design (shape and place soft macros, Fig 1A, at 140; see different representations for the shape of soft macros, para 13-17; see changing the shape of the soft macro, para 45-50; see bounding box for soft macro, para 10-12; digital layout/canvas of a chip design, para 3, 36), comprising:
receiving an input describing geometric features of a plurality of flexible blocks to be shaped on the chip canvas (see input of netlist and portions of circuit including macros and standard cells, para 36; shapes, geometries, and glue logic, para 36; determining space needed/available for configuration and current placement of soft macros, determining and modifying shapes of soft macros, para 35-37; physical design flow assigns locations of various circuit components into chip area/canvas, para 35);
generating a set of flexible blocks based on the input, and computing a plurality of obtained block areas of the set of flexible blocks (see shaper function that creates/generates macros for initial shape and placement, while some macros are not legalized yet, para 10-15);
determining whether the set of flexible blocks are legal based on determining whether a plurality of area differences between the plurality of obtained block areas and a plurality of required areas for the set of flexible blocks meet a requirement (see difference in area of actual/current placement of soft macro and rough placement, difference between current and required area to determine any necessary penalty, para 12; requirement satisfied based on whether soft macro utilizes 70% of area assigned to soft macro, para 42; determination to assign larger area for particular soft macros if allowed area is not enough or fails, difference between allowed area and area needed for placement, para 40-44, 70-73); and
when the set of flexible blocks are not all legal, updating the set of flexible blocks until the set of flexible blocks are all legal (see overlapping blocks results placement that has not been legalized, para 38, 70; assigning a larger area for some macros in order to satisfy legalization requirement, para 70).
6. With respect to claims 2 and 12, Van Eijk teaches:
wherein in determining whether the set of flexible blocks are legal, when determining that the plurality of area differences are smaller than an area violation upper bound but larger than an area violation lower bound, determining that the set of flexible blocks are all legal (see bounds requirement that macro is required to utilize at least 70%/80% of its assigned area but not more than 100 percent of its area, para 42-43; see determining penalty for ratio of area of bounding box to area of macro being outside threshold values, para 12, 58; see area utilization requirements between bounding box of available area for macro and actual area of macro, para 78-80).
7. With respect to claims 3 and 13, Van Eijk teaches:
wherein the step of updating the set of flexible blocks includes:
updating an iteration index (see iteration level, number of iterations to complete legalized placement, para 48; see maximum number of iterations is performed, para 71);
when the area difference of the flexible block is larger than the area violation upper bound, setting an indicator, updating or resetting a step size, and updating a scaling factor to update the flexible block (see assigning larger area for macros that are too large for bounding box, updating cost value and legalization test, para 71, 76, 80; see macro area utilization is larger than target area utilization, para 52; updates design, requirements, aspect ratios/scaling-factors for area, para 40-47); and
when the area difference of the flexible block is smaller than the area violation lower bound, setting the indicator, updating or resetting the step size, and updating the scaling factor to update the flexible block (minimum requirement to use at least 70% of area utilization, placer algorithm updates design, requirements, aspect ratios/scaling-factors for area, para 40-47).
8. With respect to claims 4 and 14, Van Eijk teaches:
wherein the flexible block that fulfills the following criteria:
non-overlapping (see overlapping blocks results placement that has not been legalized, para 38, 70; assigning a larger area for some macros in order to satisfy legalization requirement, para 70);
(ii) meeting required block area (see assigning larger area for macros that are too large for bounding box, updating cost value and legalization test, para 71, 76, 80; see macro area utilization is larger than target area utilization, para 52; updates design, requirements, aspect ratios/scaling-factors for area, para 40-47);
(iii) adhering to a specified aspect ratio (see adhering to aspect ratio, and aspect ratio penalty, para 12);
(iv) forming a connected block region (see connecting macros, para 5, 69); and
(v) exhibiting a rectangle-like shape without zig-zag edges is referred as legal (see shape 405 of Fig 4B, showing zig-zag edge pattern for legalization, see non-simple shapes for legalization requirements, para 80-85).
9. With respect to claims 5 and 15, Van Eijk teaches:
wherein the step of generating the set of the flexible blocks includes:
constraining a first center coordinate of a bounding box based on a width of the bounding box and a canvas width of the chip canvas (center of gravity or satisfying threshold amount, para 61); and
constraining a second center coordinate of the bounding box based on a height of the bounding box and a canvas height of the chip canvas (see bounding box and macro, center of gravity determinations to determine displacement, para 54-61),
wherein the bounding box is constrained to be located within the chip canvas (bounding box within chip area, 51-61).
10. With respect to claims 6 and 16, Van Eijk teaches:
wherein the step of generating the set of the flexible blocks includes:
specifying overlapping constraints of a plurality of bounding boxes by constraining differences between a plurality of first center coordinates of the bounding boxes based on widths of the bounding boxes and first overlapping quantities and constraining differences between a plurality of second center coordinates of the bounding boxes based on heights of the bounding boxes and second overlapping quantities (see bounding box and macro, center of gravity determinations to determine displacement, para 54-61; see overlapping blocks results placement that has not been legalized, para 38, 70; assigning a larger area for some macros in order to satisfy legalization requirement, para 70; see minimum/maximum soft macro height, para 55-59).
11. With respect to claims 7 and 17, Van Eijk teaches:
wherein the step of generating the set of the flexible blocks includes: constraining an aspect ratio and an area of a bounding box by constraining the aspect ratio of the bounding box within a predetermined range (see adhering to aspect ratio, and aspect ratio penalty, aspect thresholds, para 12).
12. With respect to claims 8 and 18, Van Eijk teaches:
wherein the step of generating the set of the flexible blocks includes: constraining a height and a width of a bounding box to be larger than 0 (see height and width of bounding box, size, area and perimeter ratio requirements, para 51-61).
13. With respect to claims 9 and 19, Van Eijk teaches:
wherein the step of generating the set of the flexible blocks includes: constraining half-perimeter wire length (HPWL) of a plurality of bounding boxes (see wire length restrictions, wiring optimization and bounding box restrictions with wiring and alignment constraints, para 51-64).
14. With respect to claims 10 and 20, Van Eijk teaches:
wherein the geometric features of the plurality of flexible blocks include a given bounding box placement, a block number of the flexible blocks or a blockage number of a plurality of blockages, a canvas width and a canvas height of the chip canvas, required aspect ratios and required areas of the flexible blocks (see assigning larger area for macros that are too large for bounding box, updating cost value and legalization test, para 71, 76, 80; see macro area utilization is larger than target area utilization, para 52; updates design, requirements, aspect ratios/scaling-factors for area, para 40-47).
Conclusion
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/SUCHIN PARIHAR/
Primary Examiner, Art Unit 2851
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