Prosecution Insights
Last updated: October 02, 2026

Examiner: PARIHAR, SUCHIN

Tech Center 2800 • Art Units: 2825 2851 2872

This examiner grants 88% of resolved cases

Analysis

Suchin Parihar is a highly experienced examiner in Tech Center 2800 and Art Unit 2825, with 1177 resolved cases. His allowance rate of 87.8% indicates a very high probability of success for patent applicants. This 87.8% rate suggests that nearly nine out of ten applications result in a grant. The 1177 resolved cases provide a robust statistical foundation for understanding the prosecution landscape in this art unit.

The median days to allowance for his cases is 856. This 856-day metric provides a benchmark for the time required to reach a successful resolution. For practitioners, the 856 days to allowance is an important piece of information for managing client expectations and project timelines. This 856-day figure reflects the typical pace of prosecution within Tech Center 2800 for this examiner.

The interview lift of 8.9% highlights the value of direct communication with the examiner. This 8.9% lift suggests that applications are more likely to be allowed if an interview is conducted. When combined with the 87.8% base allowance rate, the 8.9% lift underscores the effectiveness of oral advocacy. Practitioners should consider the 8.9% lift as a useful tool for managing the 1177 resolved cases in Art Unit 2825.

Written from this page's own data; every figure is computed from USPTO records and verified before publication.

Performance Statistics

87.8%
Allow Rate
+19.8% vs TC avg
1,184
Total Applications
+8.9%
Interview Lift
857
Avg Prosecution Days
Based on 1177 resolved cases, 2023–2026

Rejection Statute Breakdown

17.4%
§101 Eligibility
56.2%
§102 Novelty
15.5%
§103 Obviousness
7.9%
§112 Clarity

Currently Pending Office Actions

App #TitleStatusAssignee
18407673 METHOD FOR GENERATING OPTICAL PROXIMITY CORRECTION MODEL AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME Non-Final OA Samsung Electronics Co., Ltd.
17991806 METHOD AND SYSTEM FOR SELECTING ONE OR MORE CHARACTERISTICS FOR A NETLIST Non-Final OA HUAWEI TECHNOLOGIES CO., LTD.
17743954 DESIGNS TO ENABLE INLINE CIRCUIT EDIT Non-Final OA Intel Corporation
18598095 METHOD AND SYSTEM FOR LEARNING-BASED SHAPING FLEXIBLE BLOCKS ON A CHIP CANVAS IN INTEGRATED CIRCUIT (IC) DESIGN Non-Final OA MEDIATEK Inc.
18374063 CIRCUIT DESIGN AND MANUFACTURING HOTSPOT ROOT CAUSE EXTRACTION Non-Final OA Siemens Industry Software Inc.
18447580 MULTI-SILICIDE STRUCTURE FOR A SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING THE SAME Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18300513 METAL ISOLATION TESTING IN THE CONTEXT OF MEMORY CELLS Non-Final OA Taiwan Semiconductor Manufacturing Company, Ltd.
18244787 GENERATION AND UTILIZATION OF VIRTUAL FEATURES FOR PROCESS MODELING Non-Final OA Applied Materials, Inc.
18499026 SAMPLE SYNTHESIS USING AN AI DIGITAL TWIN Non-Final OA Advanced Micro Devices, Inc.
18590646 POWER PERFORMANCE AREA OPTIMIZATION IN DESIGN TECHNOLOGY CO-OPTIMIZATION FLOWS Non-Final OA Synopsys, Inc.
18127228 BICYCLE DRIVE SYSTEM, BICYCLE DRIVE UNIT, AND BICYCLE BATTERY UNIT Non-Final OA Shimano Inc.
18465433 TECHNIQUES FOR MITIGATING RADIATION-INDUCED ERRORS IN QUANTUM PROCESSORS Non-Final OA Yale University
18681613 METHOD OF EVALUATING SELECTED SET OF PATTERNS Non-Final OA ASML NETHERLANDS B.V.
18448376 MULTI-LEVEL MULTI-FUNCTION INVERTER Non-Final OA GM Global Technology Operations LLC

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