DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 1-20 are objected to because of the following informalities:
Claim 1 recites “0.2 nanometers” (lines 6, 11, 15, 22, 26, and 33) which should be replaced with “0.2 nanometer”.
Claim 1 recites “1 nanometers” (lines 17 and 28) which should be replaced with “1 nanometer”.
Claim 2 recites “1 nanometers” (lines 5, 10, 21, and 32) which should be replaced with “1 nanometer”.
Claim 2 recites “0.3 nanometers” (lines 14, 18, 25, and 29) which should be replaced with “0.3 nanometer”.
Claim 3 recites “0.4 nanometers” (lines 14 and 25) which should be replaced with “0.4 nanometer”.
Claim 3 recites “0.5 nanometers” (lines 18 and 29) which should be replaced with “0.5 nanometer”.
Claim 4 recites “1 micrometers” (lines 2, 6, 11, and 22) which should be replaced with “1 micrometer”.
Claim 4 recites “0.5 nanometers” (lines 13 and 24) which should be replaced with “0.5 nanometer”.
Claim 6 recites “the sum of the atomic composition” which should be replaced with “a sum of an atomic composition”, to avoid antecedent basis issue.
Claim 9 (claims 10-12) recites “selected from” which should be replaced with “selected from the group consisting of” (for proper form of Markush grouping, MPEP 2173.05(h)).
Claim 20 recites “said top layer comprising one or more tuning layers said bottom layer comprising a boron nitride layer” which should be replaced with “said top layer comprising one or more tuning layers, said bottom layer comprising a boron nitride layer”, to improve claim language.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5-13 and 20-22 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites limitation “said one or more tuning layers” that lacks antecedent basis in the claims 1 and 5 because “one or more tuning layers” were not recited in the claims.
Claim 13 recites limitation “the last tuning layer” that lacks antecedent basis in the claims 1 and 13 because “last tuning layer” was not recited in the claims.
Claim 13 recites limitation “a device structure….comprising ohmic metal contacts, metal gate contacts, dielectric gate layers, dielectric passivation layers, metal field plates, metal insulator metal capacitors, metal insulator semiconductor capacitors, and/or metal interconnects” that requires a device structure selected from an open list of alternatives, and thus it is unclear what other alternatives are intended to be encompassed by the claim.
Note that Markush grouping is a closed group of alternatives, wherein the selection is made from a group "consisting of" (rather than "comprising" or "including") the alternative members. Thus, one of the proper forms of Markush grouping should recite “selected from the group consisting of” (see MPEP 2173.05(h)).
Claim 20 recites limitation “the bottom of said film” that lacks antecedent basis in the claim because “a bottom of said film” was not recited in the claim.
Claim 22 recites limitation “said functionalization comprises direct van der Waals bonding, covalent bonding, chemical treatment, surface roughening, plasma treatment, atomic layer deposition, chemical vapor deposition, physical vapor deposition, or thermal treatment” that requires the functionalization selected from an open list of alternatives, and thus it is unclear what other alternatives are intended to be encompassed by the claim.
Note that Markush grouping is a closed group of alternatives, wherein the selection is made from a group "consisting of" (rather than "comprising" or "including") the alternative members. Thus, one of the proper forms of Markush grouping should recite “selected from the group consisting of” (see MPEP 2173.05(h)).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-15 are rejected under 35 U.S.C. 103 as being unpatentable over KR 102220648 B1 to Lee et al. (hereinafter Lee) in view of Liu et al. (US 2015/0041825, hereinafter Liu).
With respect to claim 1, Lee discloses a heterostructure (e.g., 21/22, GaN/AlGaN HFET) (Lee, Fig. 1, pp. 1-5, see the annotated Fig. 1 below) comprising a diamond substrate (11) (Lee, Fig. 1, p. 4) a boron nitride layer (e.g., 14, h-BN) disposed on said diamond substrate (11).
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Further, Lee does not specifically disclose a.) a first tuning layer comprising from about 10 nanometers to about 100 micrometers of GaN, said first tuning layer being disposed on said boron nitride layer.
However, Lee teaches a high voltage transistor (e.g., GaN/AlGaN HFET) (Lee, Fig. 1, p. 4) comprising GaN active layer.
Further, Liu teaches forming a high breakdown voltage device (e.g., GaN/AlGaN HEMT, see the annotated Fig. 1 below) (Liu, Fig. 1, ¶0002, ¶0007-¶0021) comprising an active layer (e.g., channel layer 140) (Liu, Fig. 1, ¶0013) including p-doped GaN layer formed for improving current performance, and the barrier structure (160) (Liu, Fig. 1, ¶0008, ¶0012, ¶0017) under the active layer (140) and comprising p-doped GaN buffer layer (130) having a specific concentration of p-type dopant, to increase the breakdown voltage of the semiconductor device. The barrier structure (160) has a thickness of 500 nm to 2000 nm (2 mm).
The range of Liu (from 500 nm to 2 micrometers) (Liu, Fig. 1, ¶0012) is within the claimed range (from about 10 nanometers to about 100 micrometers). Note that a specific example in the prior art which is within a claimed range anticipates the range (M.P.E.P. §2131.03).
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It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Lee by forming the p-doped GaN buffer layer as a tuning layer under the GaN active layer of the heterostructure and having a specific thickness as taught by Liu, wherein the heterostructure including p-doped GaN tuning layer is formed on the h-BN layer of Lee to have the heterostructure comprising a.) a first tuning layer comprising from about 10 nanometers to about 100 micrometers of GaN, said first tuning layer being disposed on said boron nitride layer, in order to improve current performance and to increase the breakdown voltage of the semiconductor device (Liu, ¶0001, ¶0007, ¶0012-¶0013).
Regarding claims 2 and 3, Lee in view of Liu discloses the heterostructure of Claim 1. Further, Lee does not specifically disclose the heterostructure comprising: a.) a first tuning layer comprising from about 100 nanometers to about 10 micrometers of GaN, said first tuning layer being disposed on said boron nitride layer (as claimed in claim 2); a.) a first tuning layer comprising from about 500 nanometers to about 5 micrometers of GaN, said first tuning layer being disposed on said boron nitride layer (as claimed in claim 3).
However, Liu teaches forming p-doped GaN buffer layer (130) (Liu, Fig. 1A, ¶0012) having a specific concentration of p-type dopant and a thickness of 500 nm to 2000 nm (2 mm), to increase the breakdown voltage of the semiconductor device.
The range of Liu (from 500 nm to 2 micrometers) (Liu, Fig. 1A, ¶0012) is within the claimed ranges (from about 100 nanometers to about 10 micrometers, and from about 500 nanometers to about 5 micrometers). Note that a specific example in the prior art which is within a claimed range anticipates the range (M.P.E.P. §2131.03).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Lee/Liu by forming the p-doped GaN buffer layer as a tuning layer under the GaN active layer of the heterostructure and having a specific thickness as taught by Liu, wherein the heterostructure including p-doped GaN tuning layer is formed on the h-BN layer of Lee to have the heterostructure comprising a.) a first tuning layer comprising from about 100 nanometers to about 10 micrometers of GaN, said first tuning layer being disposed on said boron nitride layer (as claimed in claim 2); a.) a first tuning layer comprising from about 500 nanometers to about 5 micrometers of GaN, said first tuning layer being disposed on said boron nitride layer (as claimed in claim 3), in order t to increase the breakdown voltage of the semiconductor device (Liu, ¶0001, ¶0007, ¶0012-¶0013).
Regarding claim 4, Lee in view of Liu discloses the heterostructure of Claim 3. Further, Lee does not specifically disclose the heterostructure comprising: a.) a first tuning layer comprising from about 1 micrometer to about 2 micrometers of GaN, said first tuning layer being disposed on said boron nitride layer.
However, Liu teaches forming p-doped GaN buffer layer (130) (Liu, Fig. 1A, ¶0012) having a specific concentration of p-type dopant and a thickness of 500 nm to 2000 nm (2 mm), to increase the breakdown voltage of the semiconductor device.
The range of Liu (from 500 nm to 2 micrometers) (Liu, Fig. 1A, ¶0012) overlaps the claimed range (from about 1 micrometer to about 2 micrometers). In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists (M.P.E.P. §2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Lee/Liu by forming the p-doped GaN buffer layer as a tuning layer under the GaN active layer of the heterostructure and having a specific thickness as taught by Liu, wherein the heterostructure including p-doped GaN tuning layer is formed on the h-BN layer of Lee to have the heterostructure comprising a.) a first tuning layer comprising from about 1 micrometer to about 2 micrometers of GaN, said first tuning layer being disposed on said boron nitride layer, in order to increase the breakdown voltage of the semiconductor device (Liu, ¶0001, ¶0007, ¶0012-¶0013).
Regarding claim 5, Lee in view of Liu discloses the heterostructure of Claim 1. Further, Lee does not specifically disclose the heterostructure wherein at least one of said one or more tuning layers comprises a dopant.
However, Liu teaches forming p-doped GaN buffer layer (130) (Liu, Fig. 1A, ¶0012) having a specific concentration of p-type dopant greater than or equal to about 5E18 ions/cm3, to achieve a predetermined high resistivity, and to increase the breakdown voltage of the semiconductor device.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Lee/Liu by forming the p-doped GaN buffer layer as a tuning layer under the GaN active layer of the heterostructure and having a specific concentration of p-type dopant as taught by Liu to have the heterostructure wherein at least one of said one or more tuning layers comprises a dopant, in order to achieve a predetermined high resistivity, and to increase the breakdown voltage of the semiconductor device (Liu, ¶0001, ¶0007, ¶0012-¶0013).
Regarding claims 6-8, Lee in view of Liu discloses the heterostructure of Claim 5. Further, Lee does not specifically disclose the heterostructure wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-12 atomic % to about 10 atomic % dopant (as claimed in claim 6); wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 5 atomic % dopant (as claimed in claim 7); wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 2 atomic % dopant (as claimed in claim 8).
However, Liu teaches forming p-doped GaN buffer layer (130) (Liu, Fig. 1A, ¶0012) having a specific concentration of p-type dopant greater than or equal to about 5E18 ions/cm3, to achieve a predetermined high resistivity, and to increase the breakdown voltage of the power semiconductor device.
Thus, Liu recognizes that the doping concentration of the p-doped GaN buffer layer impacts resistivity of the p-doped GaN buffer layer and breakdown voltage of the power semiconductor device. Thus, the doping concentration of the p-doped GaN buffer layer is a result-effective variable.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to vary, through routine optimization, the doping concentration of the p-doped GaN buffer layer as Liu has identified the doping concentration as a result-effective variable. Further, a person of ordinary skill in the art would have had a reasonable expectation of success to arrive at a specific doping concentration in the p-doped GaN buffer layer, such that based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-12 atomic % to about 10 atomic % dopant (as claimed in claim 6); based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 5 atomic % dopant (as claimed in claim 7); based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 2 atomic % dopant (as claimed in claim 8), in order to achieve a predetermined high resistivity, and to increase the breakdown voltage of the power semiconductor device as taught by Liu (¶0012) (MPEP 2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Lee/Liu by optimizing a specific concentration of p-type dopant in the p-doped GaN layer as taught by Liu to have the heterostructure wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-12 atomic % to about 10 atomic % dopant (as claimed in claim 6); wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 5 atomic % dopant (as claimed in claim 7); wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 2 atomic % dopant (as claimed in claim 8), in order to achieve a predetermined high resistivity, and to increase the breakdown voltage of the semiconductor device (Liu, ¶0001, ¶0007, ¶0012-¶0013).
Regarding claims 9-12, Lee in view of Liu discloses the heterostructure of Claim 5. Further, Lee does not specifically disclose the heterostructure wherein said dopant is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, gold, platinum, tellurium, sulfur, selenium, iron, tin, germanium, beryllium, zinc, chromium, carbon, magnesium, chlorine, fluorine, sodium, aluminum and mixtures thereof (as claimed in claim 9); wherein said dopant is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, tellurium, sulfur, selenium, iron, tin, germanium, zinc, chromium, carbon, magnesium, chlorine, fluorine, sodium, aluminum and mixtures thereof (as claimed in claim 10); wherein said dopant is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, tellurium, sulfur, selenium, iron, tin, germanium, zinc, chromium, carbon, magnesium, sodium, aluminum and mixtures thereof (as claimed in claim 11); wherein said dopant is selected from silicon, germanium, carbon, magnesium, iron, sulfur, tellurium, sulfur, selenium, and mixtures thereof (as claimed in claim 12).
However, Liu teaches forming p-doped GaN buffer layer (130) (Liu, Fig. 1A, ¶0012) having a specific concentration of p-type dopant greater than or equal to about 5E18 ions/cm3, wherein the p-type dopant includes, but not limited to C, Fe, Mg, and Zn, to achieve a predetermined high resistivity, and to increase the breakdown voltage of the power semiconductor device.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Lee/Liu by forming the p-doped GaN buffer layer as a tuning layer under the GaN active layer of the heterostructure and having a specific concentration of p-type dopant as taught by Liu to have the heterostructure wherein said dopant (e.g., zinc, carbon, magnesium, and iron) is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, gold, platinum, tellurium, sulfur, selenium, iron, tin, germanium, beryllium, zinc, chromium, carbon, magnesium, chlorine, fluorine, sodium, aluminum and mixtures thereof (as claimed in claim 9); wherein said dopant (e.g., zinc, carbon, magnesium, and iron) is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, tellurium, sulfur, selenium, iron, tin, germanium, zinc, chromium, carbon, magnesium, chlorine, fluorine, sodium, aluminum and mixtures thereof (as claimed in claim 10); wherein said dopant (e.g., zinc, carbon, magnesium, and iron) is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, tellurium, sulfur, selenium, iron, tin, germanium, zinc, chromium, carbon, magnesium, sodium, aluminum and mixtures thereof (as claimed in claim 11); wherein said dopant (e.g., carbon, magnesium, and iron) is selected from silicon, germanium, carbon, magnesium, iron, sulfur, tellurium, sulfur, selenium, and mixtures thereof (as claimed in claim 12), in order to achieve a predetermined high resistivity, and to increase the breakdown voltage of the power semiconductor device (Liu, ¶0001, ¶0007, ¶0012).
Regarding claim 13, Lee in view of Liu discloses the heterostructure of Claim 1. Further, Lee discloses the heterostructure comprising a device structure (e.g., HFET), but does not specifically disclose that a device structure is disposed on top of the last tuning layer comprising ohmic metal contacts, metal gate contacts, dielectric gate layers, dielectric passivation layers, metal field plates, metal insulator metal capacitors, metal insulator semiconductor capacitors, and/or metal interconnects.
However, Liu teaches forming a high breakdown voltage device (GaN/AlGaN HEMT) (Liu, Fig. 1A, ¶0002, ¶0007-¶0021) comprising an active layer (e.g., channel layer 140) (Liu, Fig. 1A, ¶0013) including p-doped GaN layer formed for improving current performance, and the barrier structure (160) (Liu, Fig. 1A, ¶0008, ¶0012, ¶0017) under the active layer (140) and comprising a plurality of layers (162/130/164) (Liu, Fig. 1A, ¶0017-¶0021) including p-doped GaN buffer layer (130), wherein a device structure (e.g., gate electrode 180 and source/drain electrodes 172/274) is disposed on top of the last tuning layer (e.g., 164) comprising ohmic metal contacts (e.g., the source/drain metal contacts 372/374 in ohmic contact with the active region 350) (Liu, Fig. 3F, ¶0032), metal gate contacts (e.g., 380) (Liu, Fig. 3F, ¶0034), dielectric passivation layers (352/376).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Lee/Liu by forming power transistor including the heterostructure as taught by Liu to have the heterostructure wherein a device structure (e.g., ohmic metal contacts, metal gate contact, and dielectric passivation layers) is disposed on top of the last tuning layer comprising ohmic metal contacts, metal gate contacts, dielectric gate layers, dielectric passivation layers, metal field plates, metal insulator metal capacitors, metal insulator semiconductor capacitors, and/or metal interconnects, in order to provide a power semiconductor device with increased breakdown voltage (Liu, ¶0001, ¶0007, ¶0012, ¶0017-¶0021).
Regarding claim 14, Lee in view of Liu discloses the heterostructure of Claim 1. Further, Lee discloses an electronic component (e.g., AlGaN/GaN HFET) (Lee, Fig. 1, p. 4) comprising a heterostructure according to Claim 1.
Regarding claim 15, Lee in view of Liu discloses the electronic component of Claim 14. Further, Lee discloses that said electronic component being a transistor (e.g., AlGaN/GaN HFET) (Lee, Fig. 1, p. 4).
Claims 1-15 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0043709 to Chu et al. (hereinafter Chu) in view of Liu et al. (US 2017/0221752, hereinafter Liu’752) and Ishiguro et al. (US 2014/0091314, hereinafter Ishiguro).
With respect to claim 1, Chu discloses a heterostructure (e.g., 40/42, GaN-on-diamond transistor, GaN/AlGaN HEMT, see the annotated Fig. 3D below) (Chu, Fig. 3D, ¶0046-¶0049, ¶0051) comprising a diamond substrate (44) (Chu, Fig. 3D, ¶0049), a boron nitride layer (e.g., adhesive bonding layer 46 including BN) (Chu, Fig. 3D, ¶0051) disposed on said diamond substrate (44).
Further, Chu does not specifically disclose b.) a first tuning layer comprising from about 0.2 nanometer to about 2 micrometers of AlN, said first tuning layer being disposed on said boron nitride layer, a second tuning layer comprising from about 10 nanometers to about 100 micrometers of GaN, said second tuning layer being disposed on said first tuning layer.
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However, Liu’752 teaches forming a power device (GaN/AlGaN HEMT, see the annotated Fig. 12 below) (Liu’752, Fig. 12, ¶0004-¶0005, ¶0066-¶0090, ¶0138) comprising a field stop layer (e.g., 104, interpreted as a second tuning layer) (Liu, Fig. 12, ¶0080-¶0081) including p-doped GaN layer formed on the superlattice structure GaN/AlN (102) including AlN layer (interpreted as a first tuning layer) under the channel layer (28), wherein the field stop layer (e.g., 104) has a thickness between 1 nm and 10 mm, to inhibit leakage current and to improve performance of the semiconductor device.
Further, Ishiguro teaches forming a superlattice structure (Ishiguro, Fig. 1, ¶0027-¶0028, ¶0030-¶0055) formed by alternately laminating AlN layer (31) having a thickness between 0. 5 nm and 10 nm and GaN layers (32) having a thickness between 10 nm and 40 nm, to reduce leakage current.
The range of Ishiguro of the AlN layer (from 0.5 nm to 10 nm) is within the claimed range of the first tuning layer (from 0. 2 nm to 2 mm), and the range of Liu’752 of the field stop layer (from 1 nm to 10 micrometers) (Liu’752, Fig. 12, ¶0081) overlaps the claimed range (from about 10 nanometers to about 100 micrometers). Note that a specific example in the prior art which is within a claimed range anticipates the range (M.P.E.P. §2131.03). In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists (M.P.E.P. §2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Chu by forming the AlN layer of the superlattice structure as a first tuning layer and the p-doped GaN field stop layer as a second tuning layer on the first tuning layer as taught by Liu’752, wherein the AlN layer of the superlattice structure has a specific thickness as taught by Ishiguro, and the heterostructure including the first and the second tuning layers is formed on the BN bonding layer of Chu to have the heterostructure comprising b.) a first tuning layer comprising from about 0.2 nanometer to about 2 micrometers of AlN, said first tuning layer being disposed on said boron nitride layer, a second tuning layer comprising from about 10 nanometers to about 100 micrometers of GaN, said second tuning layer being disposed on said first tuning layer, in order to inhibit leakage current and to improve performance of the semiconductor device (Liu’752, ¶0004-¶0005, ¶0080-¶0081, ¶0138; Ishiguro, ¶0027-¶0028, ¶0055).
Regarding claims 2-4, Chu in view of Liu’752 and Ishiguro discloses the heterostructure of Claim 1. Further, Chu does not specifically disclose the heterostructure comprising: b.) a first tuning layer comprising from about 1 nanometer to about 100 nanometers of AlN, said first tuning layer being disposed on said boron nitride layer, a second tuning layer comprising from about 100 nanometers to about 10 micrometers of GaN, said second tuning layer being disposed on said first tuning layer (as claimed in claim 2); b.) a first tuning layer comprising from about 2 nanometers to about 50 nanometers of AlN, said first tuning layer being disposed on said boron nitride layer, a second tuning layer comprising from about 500 nanometers to about 5 micrometers of GaN, said second tuning layer being disposed on said first tuning layer (as claimed in claim 3); b.) a first tuning layer comprising from about 5 nanometers to about 30 nanometers of AlN, said first tuning layer being disposed on said boron nitride layer, a second tuning layer comprising from about 1 micrometer to about 2 micrometers of GaN, said second tuning layer being disposed on said first tuning layer (as claimed in claim 4).
However, Liu’752 teaches forming p-doped GaN field stop layer (130) (Liu’752, Fig. 12, ¶0081) having a thickness of 1 nm and 10 mm, to inhibit leakage current and to improve performance of the semiconductor device. Further, Ishiguro teaches forming AlN layer (31) of the superlattice structure (Ishiguro, Fig. 1, ¶0027-¶0028, ¶0030-¶0055) having a thickness between 0. 5 nm and 10 nm, to reduce leakage current.
The range of Ishiguro of the AlN layer (from 0.5 nm to 10 nm) overlaps the claimed range of the first tuning layer (from 1 nm to 100 nm; from 2 nm to 50 nm; and from 5 nm to 30 nm), and the range of Liu’752 of the field stop layer (from 1 nm to 10 micrometers) (Liu’752, Fig. 12, ¶0081) overlaps the claimed range (from about 100 nanometers to about 10 micrometers; from 1 micrometer to about 2 micrometers). In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists (M.P.E.P. §2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Chu/Liu’752/Ishiguro by forming the AlN layer of the superlattice structure as a first tuning layer and the p-doped GaN field stop layer as a second tuning layer on the first tuning layer as taught by Liu’752, wherein the AlN layer of the superlattice structure has a specific thickness as taught by Ishiguro, and the heterostructure including the first and the second tuning layers is formed on the BN bonding layer of Chu to have the heterostructure comprising b.) a first tuning layer comprising from about 1 nanometers to about 100 nanometers of AlN, said first tuning layer being disposed on said boron nitride layer, a second tuning layer comprising from about 100 nanometers to about 10 micrometers of GaN, said second tuning layer being disposed on said first tuning layer (as claimed in claim 2); b.) a first tuning layer comprising from about 2 nanometers to about 50 nanometers of AlN, said first tuning layer being disposed on said boron nitride layer, a second tuning layer comprising from about 500 nanometers to about 5 micrometers of GaN, said second tuning layer being disposed on said first tuning layer (as claimed in claim 3); b.) a first tuning layer comprising from about 5 nanometers to about 30 nanometers of AlN, said first tuning layer being disposed on said boron nitride layer, a second tuning layer comprising from about 1 micrometers to about 2 micrometers of GaN, said second tuning layer being disposed on said first tuning layer (as claimed in claim 4), in order to inhibit leakage current and to improve performance of the semiconductor device (Liu’752, ¶0004-¶0005, ¶0080-¶0081, ¶0138; Ishiguro, ¶0027-¶0028, ¶0055).
Regarding claim 5, Chu in view of Liu’752 and Ishiguro discloses the heterostructure of Claim 1. Further, Chu does not specifically disclose the heterostructure wherein at least one of said one or more tuning layers comprises a dopant.
However, Ishiguro teaches forming superlattice structure (AlN/GaN) doped with p-type impurity (e.g., Fe, Mg, C) (Ishiguro, Fig. 1, ¶0048-¶0051) with a specific concentration of p-type dopant between 1E18 /cm3 and 1E20 /cm3, to increase the resistance of the superlattice structure, and to reduce leakage current.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Chu/Liu’752/Ishiguro by forming superlattice structure doped with p-type impurity as taught by Ishiguro to have the heterostructure wherein at least one of said one or more tuning layers comprises a dopant, in order to increase the resistance of the superlattice structure, and to reduce leakage current (Ishiguro, ¶0048-¶0051).
Regarding claims 6-8, Chu in view of Liu’752 and Ishiguro discloses the heterostructure of Claim 5. Further, Chu does not specifically disclose the heterostructure wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-12 atomic % to about 10 atomic % dopant (as claimed in claim 6); wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 5 atomic % dopant (as claimed in claim 7); wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 2 atomic % dopant (as claimed in claim 8).
However, Ishiguro teaches forming superlattice structure (AlN/GaN) doped with p-type impurity (e.g., Fe, Mg, C) (Ishiguro, Fig. 1, ¶0048-¶0051) with a specific concentration of p-type dopant between 1E18 /cm3 and 1E20 /cm3, to increase the resistance of the superlattice structure, and to reduce leakage current.
Thus, Ishiguro recognizes that the doping concentration of the p-doped AlN/GaN superlattice structure including the first tuning layer impacts resistance of the superlattice structure, and leakage current in the semiconductor device. Thus, the doping concentration of the p-doped AlN/GaN superlattice structure including the first tuning layer is a result-effective variable.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to vary, through routine optimization, the doping concentration of the p-doped AlN/GaN superlattice structure including the first tuning layer as Ishiguro has identified the doping concentration as a result-effective variable. Further, a person of ordinary skill in the art would have had a reasonable expectation of success to arrive at a specific doping concentration of the p-doped AlN/GaN superlattice structure including the first tuning layer, such that based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-12 atomic % to about 10 atomic % dopant (as claimed in claim 6); based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 5 atomic % dopant (as claimed in claim 7); based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 2 atomic % dopant (as claimed in claim 8), in order to increase the resistance of the superlattice structure, and to reduce leakage current as taught by Ishiguro (¶0048, ¶0055) (MPEP 2144.05).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Chu/Liu’752/Ishiguro by optimizing the doping concentration of the p-doped AlN/GaN superlattice structure including the first tuning layer as taught by Ishiguro to have the heterostructure wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-12 atomic % to about 10 atomic % dopant (as claimed in claim 6); wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 5 atomic % dopant (as claimed in claim 7); wherein each of said one or more tuning layers independently comprises, based on the sum of the atomic composition of said one or more tuning layers and said dopant, from about 1x 10-6 atomic % to about 2 atomic % dopant (as claimed in claim 8), in order to increase the resistance of the superlattice structure, and to reduce leakage current (Ishiguro, ¶0048, ¶0055).
Regarding claims 9-12, Chu in view of Liu’752 and Ishiguro discloses the heterostructure of Claim 5. Further, Chu does not specifically disclose the heterostructure wherein said dopant is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, gold, platinum, tellurium, sulfur, selenium, iron, tin, germanium, beryllium, zinc, chromium, carbon, magnesium, chlorine, fluorine, sodium, aluminum and mixtures thereof (as claimed in claim 9); wherein said dopant is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, tellurium, sulfur, selenium, iron, tin, germanium, zinc, chromium, carbon, magnesium, chlorine, fluorine, sodium, aluminum and mixtures thereof (as claimed in claim 10); wherein said dopant is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, tellurium, sulfur, selenium, iron, tin, germanium, zinc, chromium, carbon, magnesium, sodium, aluminum and mixtures thereof (as claimed in claim 11); wherein said dopant is selected from silicon, germanium, carbon, magnesium, iron, sulfur, tellurium, sulfur, selenium, and mixtures thereof (as claimed in claim 12).
However, Ishiguro teaches forming superlattice structure (AlN/GaN) doped with p-type impurity (e.g., Fe, Mg, C) (Ishiguro, Fig. 1, ¶0048-¶0051) with a specific concentration of p-type dopant between 1E18 /cm3 and 1E20 /cm3, to increase the resistance of the superlattice structure, and to reduce leakage current.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Chu/Liu’752/Ishiguro by forming the superlattice structure including a first tuning layer and field stop layer as a second tuning layer, wherein the superlattice structure has a specific concentration of p-type dopant as taught by Ishiguro and the field stop layer includes p-type dopant as taught by Liu’752 to have the heterostructure wherein said dopant (e.g., carbon (C), magnesium (Mg), and iron (Fe)) is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, gold, platinum, tellurium, sulfur, selenium, iron, tin, germanium, beryllium, zinc, chromium, carbon, magnesium, chlorine, fluorine, sodium, aluminum and mixtures thereof (as claimed in claim 9); wherein said dopant (e.g., carbon (C), magnesium (Mg), and iron (Fe)) is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, tellurium, sulfur, selenium, iron, tin, germanium, zinc, chromium, carbon, magnesium, chlorine, fluorine, sodium, aluminum and mixtures thereof (as claimed in claim 10); wherein said dopant (e.g., carbon (C), magnesium (Mg), and iron (Fe)) is selected from hydrogen, oxygen, boron, aluminum, gallium, indium, phosphorous, arsenic, antimony, bismuth, lithium, germanium, silicon, nitrogen, tellurium, sulfur, selenium, iron, tin, germanium, zinc, chromium, carbon, magnesium, sodium, aluminum and mixtures thereof (as claimed in claim 11); wherein said dopant (e.g., carbon (C), magnesium (Mg), and iron (Fe)) is selected from silicon, germanium, carbon, magnesium, iron, sulfur, tellurium, sulfur, selenium, and mixtures thereof (as claimed in claim 12), in order to increase the resistance of the superlattice structure, and to reduce leakage current (Ishiguro, ¶0048, ¶0055).
Regarding claim 13, Chu in view of Liu’752 and Ishiguro discloses the heterostructure of Claim 1. Further, Chu discloses the heterostructure comprising a device structure (e.g., HEMT device) (Chu, Fig. 3D, ¶0004, ¶0044), but does not specifically disclose that a device structure is disposed on top of the last tuning layer comprising ohmic metal contacts, metal gate contacts, dielectric gate layers, dielectric passivation layers, metal field plates, metal insulator metal capacitors, metal insulator semiconductor capacitors, and/or metal interconnects.
However, Liu’752 teaches forming a power device (GaN/AlGaN HEMT) (Liu’752, Fig. 12, ¶0004-¶0005, ¶0066-¶0090, ¶0138) comprising a field stop layer (e.g., 104, interpreted as a second tuning layer) (Liu, Fig. 12, ¶0080-¶0081) including p-doped GaN layer formed on the superlattice structure GaN/AlN (102) including AlN layer (interpreted as a first tuning layer) under the channel layer (28), wherein a device structure (e.g., gate electrode 50 and source/drain electrodes 52/54) is disposed on top of the last tuning layer (e.g., 104).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the heterostructure of Chu/Liu’752/Ishiguro by forming power transistor including the heterostructure as taught by Liu’752 to have the heterostructure wherein a device structure (e.g., metal gate contact) is disposed on top of the last tuning layer comprising ohmic metal contacts, metal gate contacts, dielectric gate layers, dielectric passivation layers, metal field plates, metal insulator metal capacitors, metal insulator semiconductor capacitors, and/or metal interconnects, in order to provide a power semiconductor device with reduced leakage current and improved performance (Liu’752, ¶0004-¶0005, ¶0080-¶0081, ¶0138; Ishiguro, ¶0027-¶0028, ¶0055).
Regarding claim 14, Chu in view of Liu’752 and Ishiguro discloses the heterostructure of Claim 1. Further, Chu discloses an electronic component (e.g., AlGaN/GaN HEMT) (Chu, Fig. 3D, ¶0004, ¶0044) comprising a heterostructure according to Claim 1.
Regarding claim 15, Chu in view of Liu’752 and Ishiguro discloses the electronic component of Claim 14. Further, Chu discloses that said electronic component being a transistor (e.g., AlGaN/GaN HEMT) (Chu, Fig. 3D, ¶0004, ¶0044).
Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over KR 102220648 B1 to Lee in view of Liu (US 2015/0041825) as applied to claim 14, and further in view of Kub et al. (US 2012/0141799, hereinafter Kub).
Regarding claims 16-17, Lee in view of Liu discloses the electronic component of Claim 14. Further, Lee does not specifically disclose an electronic device comprising an electronic component according to Claim 14 (as claimed in claim 16); said electronic device being a power amplifier, light emitting diode or integrated circuit (as claimed in claim 17).
However, Kub teaches forming an electronic structure (Kub, Fig. 1, ¶0003-¶0010, ¶0073) having semiconductor material film on graphene material layer, to provide an electronic device with reduced thermal resistance, and improved power dissipation within the structure, wherein said electronic device being a power amplifier, light emitting device or integrated circuit.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the process of Lee/Liu by forming an electronic structure having semiconductor material film on graphene material layer as taught by Kub to have an electronic device comprising an electronic component according to Claim 14 (as claimed in claim 16); said electronic device being a power amplifier, light emitting diode or integrated circuit (as claimed in claim 17), in order to provide an electronic device with reduced thermal resistance, and improved power dissipation within the structure (Kub, ¶0003-¶0010, ¶0073).
Claims 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over KR 102220648 B1 to Lee in view of Liu (US 2015/0041825) and Kub (US 2012/0141799) as applied to claim 16, and further in view of Kim (US 2019/0115459).
Regarding claims 18-19, Lee in view of Liu and Kub discloses the electronic device of Claim 16. Further, Lee does not specifically disclose a platform comprising the electronic device according to Claim 16 (as claimed in claim 18); said platform being a radar, transmitter, or communication system (as claimed in claim 19).
However, Kim teaches forming a platform comprising the electronic device including GaN HEMTs (Kim, Fig. 17, ¶0037-¶0053, ¶0088-¶0089) having high power capabilities for the RF power amplifier and transmitter, and InGaAs HEMTs for low-noise receiver by monolithically integrating HEMTs devices with dissimilar semiconductor materials on the same substrate by wafer bonding, to provide multi-functional integrated circuit.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the process of Lee/Liu/Kub by forming a platform by monolithically integrating HEMTs devices with dissimilar semiconductor materials on the same substrate as taught by Kim to have a platform comprising the electronic device according to Claim 16 (as claimed in claim 18); said platform being a radar, transmitter, or communication system (as claimed in claim 19), in order to provide multi-functional integrated circuit including robust monolithic structure (Kim, ¶0037-¶0050, ¶0088-¶0089).
Claims 20-22 are rejected under 35 U.S.C. 103 as being unpatentable over KR 102220648 B1 to Lee in view of Kub (US 2012/0141799).
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With respect to claim 20, Lee discloses a process of making a heterostructure comprising a film (22/21/14, see the annotated Fig. 3 below) (Lee, Figs. 1, 3, 5, pp. 1-5), comprising a top layer (22/21) and a bottom layer (14, h-BN), said bottom layer (14) comprising a boron nitride layer (e.g., h-BN) (Lee, Figs. 1, 3, 5, pp. 4-5), and a diamond substrate (11) having a top and a bottom, said process comprising disposing the bottom (14) of said film (22/21/14) on to said top of said diamond substrate (11).
Further, Lee does not specifically disclose said top layer comprising one or more tuning layers.
However, Kub teaches a process of making a heterostructure (e.g., GaN heterostructure for HEMT device, see the annotated Fig. 1 below) (Kub, Fig. 1, ¶0077-¶0080, ¶0134-¶0137, ¶0174-¶0176) comprising disposing the bottom (e.g., transition layer 102 including boron nitride (BN), to improve growth/deposition of the semiconductor material film 101 and to improve coupling with underlying substrate 105) (Kub, Fig. 1, ¶0083-¶0085, ¶0174-¶0176) of said film (101/102) on to said top of said diamond substrate (105), wherein top layer (101) comprising one or more tuning layers (e.g., semiconductor material film 101 has varying dopant concentrations within each of the semiconductor material layers, to achieve low contact
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resistance) (Kub, Fig. 1, ¶0133).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the process of Lee by forming semiconductor material film including semiconductor material layers having varying dopant concentrations as one or more tuning layers as taught by Kub to have the process comprising said top layer comprising one or more tuning layers, in order to achieve low contact resistance, and provide a power semiconductor device with reduced thermal resistance and reduced power dissipation within the structure (Kub, ¶0012, ¶0073, ¶0077, ¶0133, ¶0137, ¶0139, ¶0174-¶0176).
Regarding claim 21, Lee in view of Kub discloses the process of Claim 20. Further, Lee discloses the process wherein said bottom of said film and/or top of said diamond substrate are functionalized (e.g., forming graphene layer 13 on a top of the diamond wafer 11, to facilitate growth/deposition of the hexagonal GaN layers 22/21 and h-BN 14) (Lee, Fig. 3, pp. 5-6) prior to disposing the bottom of said film (22/21/14) on to said top of said diamond substrate (11).
Regarding claim 22, Lee in view of Kub discloses the process of Claim 21. Further, Lee does not specifically disclose that said functionalization comprises direct van der Waals bonding, covalent bonding, chemical treatment, surface roughening, plasma treatment, atomic layer deposition, chemical vapor deposition, physical vapor deposition, or thermal treatment.
However, Kub teaches optimizing (Kub, Figs. 1, 6, ¶0114) a top most material layer (of the graphene layer 103) for wafer bonding bond strength, van der Waals bonding, covalent bonding.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the process of Lee/Kub by optimizing a top most material layer bonding interaction as taught by Kub to have the process wherein said functionalization comprises direct van der Waals bonding, covalent bonding, chemical treatment, surface roughening, plasma treatment, atomic layer deposition, chemical vapor deposition, physical vapor deposition, or thermal treatment, in order to improve bonding strength, and provide a power semiconductor device with reduced thermal resistance and reduced power dissipation within the structure (Kub, ¶0012, ¶0073, ¶0077, ¶0114, ¶0174-¶0176).
Conclusion
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/NATALIA A GONDARENKO/Primary Examiner, Art Unit 2891
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