Prosecution Insights
Last updated: October 25, 2026
Application No. 18/598,163

LEADFRAME COMPRISING A LEAD WITH AN ELEVATION FOR INCREASING MECHANICAL ROBUSTNESS AND A SEMICONDUCTOR PACKAGE

Non-Final OA §102§103§112
Filed
Mar 07, 2024
Priority
Apr 17, 2023 — DE 10 2023 109 583.8
Examiner
REIDA, MOLLY KAY
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies AG
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
367 granted / 445 resolved
+14.5% vs TC avg
Minimal +3% lift
Without
With
+3.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
16 currently pending
Career history
476
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
50.2%
+10.2% vs TC avg
§102
30.0%
-10.0% vs TC avg
§112
17.6%
-22.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 445 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of Species A1 (claism 1-7 and 10-23) in the reply filed on 07/27/2026 is acknowledged. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 03/07/2024 has been considered by the examiner. Claim Objections Claim 23 is objected to because of the following informalities: Claim 23 appears to have a typographical error. It appears “forth” should be “fourth”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 5, 7, 12, and 13-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Re claim 5, Claim 5 recites the limitation "the second lead". There is insufficient antecedent basis for this limitation in the claim. Claim 5 will be examined as being dependent upon claim 2 where “a second lead” is introduced. Re claim 7, it is unclear what is meant by the term “down-set”. While para. 0067, 0072, 0077 use the term “down-set”, there is no explanation as to what the term actually means; therefore, it is unclear what limitations are intended to be encompassed by the term “down-set”. Re claim 12, Claim 12 recites the limitation "the second lead". There is insufficient antecedent basis for this limitation in the claim. Claim 12 will be examined as being dependent upon claim 2 where “a second lead” is introduced. Re claim 13, Claim 13 recites “…wherein the first lead of a leadframe connects to any…”. I appears that “a leadframe” was intended to be “the leadframe” and the application will be examined as such. Re claim 14, Claim 14 recites the limitation "the connection portion". There is insufficient antecedent basis for this limitation in the claim. Claim 14 recites the limitation "the dambar portion of the first lead". There is insufficient antecedent basis for this limitation in the claim. Re claim 15, a broad range or limitation together with a narrow range or limitation that falls within the broad range or limitation (in the same claim) may be considered indefinite if the resulting claim does not clearly set forth the metes and bounds of the patent protection desired. See MPEP § 2173.05(c). In the present instance, claim 15 recites the broad recitation “10% or more”, and the claim also recites “more than 20%, or more than 30%” which is the narrower statement of the range/limitation. The claim(s) are considered indefinite because there is a question or doubt as to whether the feature introduced by such narrower language is (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claims. Regarding independent claim 16, Claim 16 recites the limitation "the semiconductor die". There is insufficient antecedent basis for this limitation in the claim. Claim 16 will be examined as “…the semiconductor die pad”. Re claim 19, Claim 19 recites the limitation "the second lead". There is insufficient antecedent basis for this limitation in the claim. Claim 19 will be examined as being dependent upon claim 17 where “a second lead” is introduced. Re claim 22, Claim 22 recites the limitation "the semiconductor die". There is insufficient antecedent basis for this limitation in the claim. Claim 22 will be interpreted as introducing “a semiconductor die”. Appropriate corrections are required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 6, 11, 12, 15-18, 20, and 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ichikawa et al. (US Pat. 5,905,301). Regarding independent claim 1, Ichikawa teaches a leadframe (22) (Figs. 5(a), 5(b); Col. 8 lines 22+), comprising: a die pad (portion of leadframe (22) the die (14) is on); a first lead (first lead considered to be the lead going in the North/South direction of Fig. 5(a)) comprising an inner portion and an external portion, wherein the first lead comprises at least one elevation portion (32b) extending over a predetermined length in a longitudinal or lateral direction of the first lead, wherein the external portion is configured to be used for external electrical connection (Figs. 5(a), 5(b)). Re claim 2, Ichikawa teaches a second lead (the second lead being either lead going in the East/West direction of Fig. 5(a)) having an inner portion and an external portion, wherein the external portion is configured to be used for external electrical connection (Fig. 5(a)). Re claim 3, Ichikawa teaches wherein the elevation is produced by a deformation of the first lead, in particular by a coining exerted in a direction perpendicular to the longitudinal direction of the first lead (Fig. 6; Col. 8 lines 31-36). Re claim 4, Ichikawa teaches wherein the elevation portion is arranged on the inner portion, wherein the inner portion is to be embedded into an encapsulant (Col. 8 lines 50-51 – where “resin” is considered to read on “encapsulant”). Re claim 6, Ichikawa teaches wherein the first lead is physically connected to the die pad (Fig. 5(a)). Re claim 11, Ichikawa teaches wherein the elevation comprises a V shape in a lateral cross section (Figs. 5(b), 6; Col. 8 lines 31-36). Re claim 12, Ichikawa teaches wherein the second lead further comprises a second elevation portion alike to the elevation portion of the first lead (Figs. 5(a), 5(b)). Re claim 15, Ichikawa teaches wherein the elevation portion of the first lead comprises a height in a range of more than 10%, or more than 20%, or more than 30% of the thickness of the first lead (from Col. 6 line 16-17 teaching a thickness of the leadframe to be 0.12mm, and Col. 8 lines 43-44 teaching the height of the elevation portion to be 0.1 mm). Regarding independent claim 16, Ichikawa teaches a semiconductor package (Figs. 5(a), 5(b); Col. 8 lines 22+), comprising a leadframe (22) comprising a die pad (portion of leadframe (22) the die (14) is on), a first lead (first lead considered to be the lead going in the North/South direction of Fig. 5(a)) comprising an inner portion and an external portion, wherein the first lead comprises at least one elevation portion (32b) extending over a predetermined length in a longitudinal or lateral direction of the first lead, the external portion is configured to be used for external electrical connection; and an encapsulant (Col. 8 lines 50-51 – where “resin” is considered to read on “encapsulant”) disposed on the leadframe and the semiconductor die pad (Figs. 5(a), 5(b)). Re claim 17, Ichikawa teaches the leadframe comprising a second lead (the second lead being either lead going in the East/West direction of Fig. 5(a)) having an inner portion and an external portion, wherein the external portion is configured to be used for external electrical connection (Fig. 5(a)). Re claim 18, Ichikawa teaches wherein the elevation portion is located inside of the encapsulant. Re claim 20, Ichikawa is considered to meet the limitations of “wherein the first lead is to be used as a drain lead, the second lead is to be used as a source lead, wherein the leadframe further comprises a third lead to be used as a gate lead” because the first lead and the second lead are capable of being used as a drain lead and source lead; respectively. Furthermore, Ichikawa teaches a third lead (the third lead being the other lead going in the East/West direction of Fig. 5(a)) capable of being used as a gate lead. Claim 20 amounts to intended use and a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Re claim 21, Ichikawa is considered to meet the limitations of “wherein the first lead is to be used as any one of a gate lead, a source sense lead, a source lead, and an I/O signal lead” because the first lead is capable of being used as any one of a gate lead, a source sense lead, a source lead, and an I/O signal lead. Claim 21 amounts to intended use and a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5, 10, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Ichikawa et al. (US Pat. 5,905,301) in view of Yano et al (JPH0215661A (on IDS)). Re claims 5 and 19, Ichikawa teaches wherein the external portions of the first and the second leads respectively comprise a dambar portion (the dambar portion considered to be the portion of the outer lead closest to the encapsulation portion). Ichikawa is silent with respect to wherein the elevation of the first lead is arranged on the dambar portion of the first lead. Yano teaches a semiconductor device wherein an elevation portion is formed in the dambar portion of an external lead for the purpose of preventing lead distortion (abstract). It would have been obvious to one of ordinary skill in the art at the time of filing to include an elevated portion within the dambar portion of Ichikawa as taught by Yano such that the elevation portion of the first lead is arranged on the dambar portion of the first lead as claimed for the purpose of providing the same advantage of preventing lead distortion. Re claim 10, Ichikawa teaches wherein the elevation is provided the inner portion. Ichikawa is silent with respect to wherein the elevation portion is provided on the dambar portion (the dambar portion considered to be the portion of the outer lead closest to the encapsulation portion). Yano teaches a semiconductor device wherein an elevation portion is formed in the dambar portion of an external lead for the purpose of preventing lead distortion (abstract). It would have been obvious to one of ordinary skill in the art at the time of filing to include an elevated portion within the dambar portion of Ichikawa as taught by Yano for the purpose of preventing lead distortion such that the elevation portion was provided on both the inner portion and the dambar portion as claimed. Claim(s) 13, 14, 22, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Ichikawa et al. (US Pat. 5,905,301) in view of Otremba et al. (US Pub. 2018/0061745). Re claims 13 and 14, Ichikawa teaches wherein the leadframe is a member of a leadframe panel, wherein the leadframe panel comprises an array of m*n leadframes, wherein m and n are integral numbers (Figs. 2(A)-2(e); Col. 6 lines 21-47 – teaching at least a 1x1 lead frame panel). Ichikawa is silent with respect to wherein the first lead of a leadframe connects to any lead or die pad of an adjacent leadframe via a connection bar perpendicular to the longitudinal direction of the first lead of the leadframe, wherein the connection bar connects the first lead at any one of the following position: the connection portion, the dambar portion of the first lead, or a supporting bar connecting with the end of the external portion of the first lead (refer to 112 Rej. regarding interpretation of this claim). Otremba teaches wherein a leadframe (411) is a member of a leadframe panel (Fig. 4B), wherein the leadframe panel comprises an array of m*n leadframes, wherein m and n are integral numbers, wherein the first lead of a leadframe connects to a lead of an adjacent leadframe via a connection bar perpendicular to the longitudinal direction of the first lead of the leadframe, wherein the connection bar connect the first lead at the following position: a dambar portion of the first lead (Fig. 4B) (para. 0072). It would have been obvious to one of ordinary skill in the art at the time of filing use connection bars between adjacent leadframes of Ichikawa as taught by Otremba to arrive at the claimed invention for the purpose of providing a larger leadframe panel thereby increasing output. Re claims 22 and 23, Ichikawa teaches a semiconductor die (14) comprising a first main face and a second main face opposite to the first main face, and a first contact pad disposed on the first main face and connected to the die pad, a second contact pad disposed on the second main face, and a third contact pad disposed on the second main face, and a fourth contact pad disposed on the second main face (Figs. 5(a), 6(b)). Ichikawa is silent with respect to the semiconductor die is a vertical semiconductor transistor die; however, such dies are known in the art as evidenced by Otremba. Otremba teaches (Fig. 9; para. 0089+) a semiconductor die (920.1) which is a vertical semiconductor transistor die (0092, refer also to para. 0031) comprising a first main face and a second main face opposite to the first main face, and a first contact pad disposed on the first main face and connected to a die pad (910.1), a second contact pad disposed on the second main face, and a third contact pad disposed on the second main face, and a fourth contact pad disposed on the second main face (para. 0031, Fig. 9). It would have been obvious to one of ordinary skill in the art at the time of filing that the die of Otremba could be used within the package of Ichikawa to arrive at the claimed invention for the purpose of; for example, forming a power semiconductor device. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOLLY KAY REIDA whose telephone number is (571)272-4237. The examiner can normally be reached M-F 8:30-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408)918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOLLY K REIDA/Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Mar 07, 2024
Application Filed
Oct 05, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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DISPLAY DEVICE AND MANUFACTURING METHOD OF THE SAME
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4y 1m to grant Granted Jul 14, 2026
Patent 12672279
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SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME
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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
86%
With Interview (+3.2%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 445 resolved cases by this examiner. Grant probability derived from career allowance rate.

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