DETAILED ACTION
This application, 18/416151, attorney docket AD9667-US, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This application is assigned to Kioxia Corporation., and claims foreign priority to 2023-044186, filed 03/20/2023. Applicants’ election without traverse of Group 1, claims 1-13 in the reply filed on 8/14/2026 is acknowledged. Claims 14-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Claims 1-13 are pending and are considered below. Note that examiner will use numbers in parentheses to indicate numbered elements in prior art figures, and brackets to point to paragraph numbers where quoted material or specific teachings can be found.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-13 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1 and 9 recite, “opposed to a part of the oxide semiconductor layer” It is not clear how a layer can be opposed to another layer, unless it is on opposite sides with an intermediate object such as the substrate. Opposed can mean opposite charge, opposite color, etc. As written, it is indefinite.
Dependent claims include the defect of the parent.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 and claim 8 are rejected under 35 U.S.C. 103 as being unpatentable over Ishimaru et al. (U.S. 2021/0305431) in view of Benwadih et al. (U.S. 2017/02013728).
As for claim 1,
Ishimaru teaches in figures 18, 59 and 62, a semiconductor device comprising:
a substrate (250);
an oxide semiconductor layer (18) spaced from the substrate in a first direction intersecting with a surface of the substrate [0092];
a first wiring (20) opposed to a part of the oxide semiconductor layer;
a gate insulating film (22) disposed between the oxide semiconductor layer and the first wiring;
a second wiring (16) electrically connected to one end in the first direction of the oxide semiconductor layer;
and a first insulating layer (28) disposed on a surface on one side and a surface on the other side in a second direction intersecting with the first direction of the second wiring, the second wiring contains a first metallic element (In, Ga, Zn, Mn, Al… [0112])
but Ishimaru does not teach that the first insulating layer contains the first metallic element and oxygen (O).
However, Benwadih teaches using an oxide of an electrode’s metal including ZnO [0038, 0053].
It would have been obvious to one skilled in the art at the effective filing date of this application to substitute the matching oxide insulator of Benwadih to the device of Ishimaru because using the same metal in the insulator and oxide reduced defects at the interface with the semiconductor oxide [0038]. One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 2,
Ishimaru in view of Benwadih makes obvious the semiconductor device according to claim 1, and the combination Ishimaru teaches
a metal oxide layer (second level channel at Wly) farther from the substrate than the oxide semiconductor layer, wherein the metal oxide layer contains at least one metallic element selected from the group consisting of aluminum (Al), hafnium (Hf), zirconium (Zr), lanthanum (La), yttrium (Y), titanium (Ti), nickel (Ni), zinc (Zn), indium (In), tin (Sn), gallium (Ga), and tungsten (W), and contains oxygen (O). (Channel material can be an oxide of In, Ga, etc. [0092]).
As for claim 3.
Ishimaru in view of Benwadih makes obvious the semiconductor device according to claim 2, and Ishimaru teaches the metal oxide layer is farther from the substrate than the second wiring. (Shown in figure 59)
As for claim 4,
Ishimaru in view of Benwadih makes obvious the semiconductor device according to claim 2, and in the combination, Ishimaru teaches that the metal oxide layer is disposed on the one side and the other side in the second direction of the second wiring. (figure 59).
As for claim 5,
Ishimaru in view of Benwadih makes obvious the semiconductor device according to claim 1, and in the combination, Ishimaru teaches
a third wiring (PL above WLy) farther from the substrate than the second wiring,
wherein a surface on the one side and a surface on the other side in the second direction of the third wiring is in contact with an insulating layer containing silicon (Si) and oxygen (O). (260 is silicon oxide [0183], ILD is commonly a silicon oxide where there is no semiconductor oxide to protect).
As for claim 6,
Ishimaru in view of Benwadih makes obvious the semiconductor device according to claim 1, further comprising:
a third wiring (BL above WLy) farther from the substrate than the second wiring; and
a second insulating layer (28) disposed on a surface on the one side and a surface on the other side of the third wiring in the second direction
Ishimaru does not teach that the first insulating layer contains the first metallic element and oxygen (O).
However Benwadih teaches using an oxide of an electrode’s metal including ZnO [0038, 0053].
It would have been obvious to one skilled in the art at the effective filing date of this application to substitute the matching oxide insulator of Benwadih to the device of Ishimaru because using the same metal in the insulator and oxide reduced defects at the interface with the semiconductor oxide [0038]. One skilled in the art would have combined these elements with a reasonable expectation of success.
As for claim 8,
Ishimaru in view of Benwadih makes obvious the semiconductor device according to claim 1, and in the combination, Ishimaru teaches a capacitor layer (MC1) between the substrate and the oxide semiconductor layer, wherein the capacitor layer includes a capacitor structure electrically connected to the oxide semiconductor layer. (shown in fig 62).
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Ishimaru in view of Benwadih and in further view of Sawabe et al. (U.S. 2019/0296155).
As for claim 7,
Ishimaru in view of Benwadih makes obvious the semiconductor device according to claim 1, and in the combination, Ishimaru teaches a first conductive layer (16) connected to one end portion in the first direction of the oxide semiconductor layer but does not teach that the first conductive layer contains indium (In), tin (Sn), and oxygen (O).
However, Sawabe teaches a first conductive layer that contains indium (In), tin (Sn), and oxygen (O). [0030].
It would have been obvious to one skilled in the art at the effective filing date of this application to use ITO as a s/d because it improves stability and acts as a barrier. One skilled in the art would have combined these elements with a reasonable expectation of success.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 9, 10 and 13 are rejected under 35 U.S.C. 102a1 as being anticipated by Ishimaru.
As for claim 9,
Ishimaru teaches in figures 18, 59 and 62, a semiconductor device comprising:
a substrate (250);
an oxide semiconductor layer (18) spaced from the substrate in a first direction intersecting with a surface of the substrate [0092];
a first wiring (20) opposed to a part of the oxide semiconductor layer;
a gate insulating film (22) disposed between the oxide semiconductor layer and the first wiring;
a second wiring (12) electrically connected to one end in the first direction of the oxide semiconductor layer;
and a metal oxide layer (second level channel at Wly) farther from the substrate than the oxide semiconductor layer,
wherein the metal oxide layer (contains at least one metallic element selected from the group consisting of aluminum (Al), hafnium (Hf), zirconium (Zr), lanthanum (La), yttrium (Y), titanium (Ti), nickel (Ni), zinc (Zn), indium (In), tin (Sn), gallium (Ga), and tungsten (W), and contains oxygen (O). (Channel material can be an oxide of In, Ga, etc. [0092]).
As for claim 10,
Ishimaru teaches the semiconductor device according to claim 9, and Ishimaru teaches that the metal oxide layer is farther from the substrate than the second wiring.
As for claim 13,
Ishimaru teaches the semiconductor device according to claim 99 andteaches a capacitor layer (MC) between the substrate and the oxide semiconductor layer, wherein the capacitor layer includes a capacitor structure electrically connected to the oxide semiconductor layer.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Ishimaru in view of Benwadih.
As for claim 11,
Ishimaru teaches the semiconductor device according to claim 9 but does not teach that the metal oxide layer is disposed of on one side and the other side in a second direction intersecting with the first direction of the second wiring.
However, Benwadih teaches using an oxide of an electrode’s metal including ZnO [0038, 0053] instead of the oxide (28) of Ishimaru.
It would have been obvious to one skilled in the art at the effective filing date of this application to substitute the matching oxide insulator of Benwadih to the device of Ishimaru because using the same metal in the insulator and semiconductor oxide reduced defects at the interface with the semiconductor oxide [0038]. One skilled in the art would have combined these elements with a reasonable expectation of success.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Ishimaru in view of Sawabe.
As for claim 12,
Ishimaru teaches the semiconductor device according to claim 9 and teaches a first conductive layer (16) connected to one end portion in the first direction of the oxide semiconductor layer, btu does not teach that the first conductive layer contains indium (In), tin (Sn), and oxygen (O).
However, Sawabe teaches a first conductive layer that contains indium (In), tin (Sn), and oxygen (O). [0030].
It would have been obvious to one skilled in the art at the effective filing date of this application to use ITO as a s/d because it improves stability and acts as a barrier. One skilled in the art would have combined these elements with a reasonable expectation of success.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN A BODNAR whose telephone number is (571)272-4660. The examiner can normally be reached M-Th and every other Friday 7:30-5:30 Central time.
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/JOHN A BODNAR/ Primary Examiner, Art Unit 2893
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