DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 10-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected invention, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on May 26, 2026.
Applicant's election with traverse of Group 1, claims 1-9, in the reply filed on May 26, 2026 is acknowledged. The traversal is on the ground(s) that applicant disagrees with the Examiner’s characterization that CN 112670341 discloses or teaches the shared technical feature as claimed. This is not found persuasive because the Office Action mailed April 20, 2026 shows how Groups 1 and 2 lack unity of invention.
The requirement is still deemed proper and is therefore made FINAL.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on July 30, 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
The information disclosure statement (IDS) submitted on January 21, 2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 3, and 4 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zeng et al (CN 112670341).
In re claim 1, Zeng et al discloses a field effect transistor, comprising: a channel layer (i.e. 30), located on a substrate (i.e. substrate as discussed in at least paragraph 0023); a control gate (i.e. 50), located on the channel layer, wherein the control gate has a top surface and a side wall connected to the top surface, and the side wall has a step surface parallel to the top surface (i.e. see at least Figures 4 and 5; paragraph 0025 disclosing 50 having a stepped structure); a metal gate (i.e. 60), located on the top surface of the control gate, wherein an orthographic projection of the metal gate on the substrate falls within a region in which an orthographic projection of the top surface on the substrate is located; a passivation layer (i.e. 70), located on the metal gate and covering the control gate and the metal gate; and a source (i.e. 41) and a drain (i.e. 42), located on the channel layer, wherein the source and the drain are respectively located on two sides of the control gate (i.e. see at least Figure 5).
In re claims 3 and 4, Zeng et al discloses wherein a ratio of a height of the step surface to a thickness of the control gate ranges from 0 to 1 (i.e. see at least Figures 4 and 5).
Allowable Subject Matter
Claims 2 and 5-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 8 and 9 are allowed.
The following is an examiner’s statement of reasons for allowance: The closest prior art of Zeng et al (CN 112670341) either singularly or in combination fails to anticipate or render obvious an electronic circuit, comprising: a circuit board; and a field effect transistor that is disposed on the circuit board, wherein, the field effect transistor, comprising: a channel layer, located on a substrate; a control gate, located on the channel layer, wherein the control gate has a top surface and a side wall connected to the top surface, and the side wall has a step surface parallel to the top surface; a metal gate, located on the top surface of the control gate, wherein an orthographic projection of the metal gate on the substrate falls within a region in which an orthographic projection of the top surface on the substrate is located; a passivation layer, located on the metal gate and covering the control gate and the metal gate; and a source and a drain, located on the channel layer, wherein the source and the drain are respectively located on two sides of the control gate as recited in claim 8.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTHONY HO whose telephone number is (571)270-1432. The examiner can normally be reached 9AM - 5PM, Monday-Friday.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANTHONY HO/Primary Examiner, Art Unit 2817
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