Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Status of the Claims
Applicant’s election, without traverse, of Group I-A, claims 1-14 in the reply filed on May 19th, 2026 is acknowledged. Non-elected invention, claims 15-22 have been withdrawn from consideration. Claims 1-22 are pending.
Action on merits of Group I-A, claims 1-14 as follows.
Priority
Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statements (IDSs) submitted on March, 08th, 2024; September 13th, 2024 and December 20th, 2024 have been considered by the examiner.
Drawings
The drawings filed on 03/08/2024 are acceptable.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1-3, 5, 11-13 and 14 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Chung (US 2021/0098634, hereinafter as Chun ‘634).
Regarding Claim 1, Chun ‘634 teaches a semiconductor device, comprising:
a substrate (Fig. 1, (202); [0014]) that includes an active pattern (202’; [0044]);
a channel pattern on the active pattern, wherein the channel pattern includes a plurality of semiconductor patterns (210B; [0044]) that are vertically stacked and spaced apart from each other;
a source/drain pattern (240A/B; [0044]) connected to the plurality of semiconductor patterns;
an inner gate electrode (266; [0044]) between a first semiconductor pattern and a second semiconductor pattern (210B), wherein the first semiconductor pattern and the second semiconductor pattern (210B) are two neighboring semiconductor patterns of the plurality of semiconductor patterns;
an inner gate dielectric layer (262; [0044]); and
an inner high-k dielectric layer (264; [0039]) between the inner gate electrode and the inner gate dielectric layer, wherein the inner gate dielectric layer (262) includes: an upper dielectric layer between the inner gate electrode (266) and the second semiconductor pattern (210B);
a lower dielectric layer between the inner gate electrode (266) and the first semiconductor pattern (210B); and
an inner spacer (230; [0044]) between the inner gate electrode (266) and the source/drain pattern (240A/B) (see Fig. 17C), wherein a first thickness of the inner spacer (230) is greater than a second thickness of the upper dielectric layer or of the lower dielectric layer (262) (see Fig. 17C), and wherein the first thickness is greater than a third thickness of the inner high-k dielectric layer (264).
Regarding Claim 2, Chun ‘634 teaches the first thickness (15 nm; [0029]) is greater than a sum of the second thickness and the third thickness ((262)~3 and (264) ~5 nm; [see para. [0038]-[0039]).
Regarding Claim 3, Chun ‘634 teaches the first thickness is in a range of 2 nm-15 nm (or 20.0 Å to 150.0 Å; (see para. [0039]) which overlaps the claim range of 10.0 Å to 25.0 Å.
Regarding Claim 5, Chun ‘634 teaches the third thickness (9 nm; [0039]) is greater than the second thickness (0.5 nm; [0038]).
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Fig. 18 (Chun ‘634)
Regarding Claim 11, Chun ‘634 teaches the inner spacer (230; [0029]) includes a silicon oxide layer or a silicon oxynitride layer.
Regarding Claim 12, Chun ‘634 teaches a width in a first direction of the channel pattern (210B) is greater than a width in the first direction of the inner gate dielectric layer (262) (see Fig. 17C).
Regarding Claim 13, Chun ‘634 teaches an outer gate electrode on an uppermost semiconductor pattern of the plurality of semiconductor patterns (210B); and an outer gate dielectric layer adjacent to the outer gate electrode, wherein the outer gate dielectric layer has a uniform thickness (see Fig. 17C).
Regarding Claim 14, Chun ‘634 teaches an outer high-k dielectric layer (264) between the outer gate electrode (266) and the outer gate dielectric layer (262) (see Fig. 18).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4, 6 are rejected under 35 U.S.C. 103 as being unpatentable over as Chun ‘634 as applied to claim 1 above.
Regarding Claim 4, Chun ‘634 teaches the second thickness is in a range of 0.0 nm -0.5 nm (or 0.0 Å to 5.0 Å (see para. [0038]) which overlaps the claim range of 5.0 Å, and the third thickness is in a range of 1 nm – 9.0 nm (10.0 Å to 90.0 Å (see para. [0039]) which overlaps the claim range of 10.0 Å.
Thus, Chun ‘634 is shown to teach all the features of the claim with the exception of explicitly the limitations: “the second thickness is in a range of 5.0 Å to 10.0 Å, and the third thickness is in a range of 5.0 Å to 10.0 Å”.
However, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have the second thickness is in a range of 5.0 Å to 10.0 Å, and the third thickness is in a range of 5.0 Å to 10.0 Å, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. The claim would have been obvious in the absence of a showing that the claimed range(s) achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996) (claimed ranges of a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art) and In re Aller, 105 USPQ 233 (CCPA 1955) (selection of optimum ranges within prior art general conditions is obvious). In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976). That range can be disclosed in multiple prior art references instead of in a single prior art reference. Iron Grip Barbell Co., Inc. v. USA Sports, Inc., 392 F.3d 1317, 1322, 73 USPQ2d 1225, 1228 (Fed. Cir. 2004). Therefore, one of ordinary skill in the art, before the effective filing date of the claimed invention, would recognize to adjust or optimize the second/third thickness is in a range of 5.0 Å to 10.0 Å as a result effective variable that depends on the design of the device.
Regarding Claim 6, Chun ‘634 is shown to teach all the features of the claim with the exception of explicitly the limitations: “the second thickness and the third thickness are equal”.
However, it has been held to be within the general skill of a worker in the art to select the second thickness and the third thickness are equal on the basis of it suitability for the intended use as a matter of obvious design choice. In re Leshin, 125 USPQ 416. A person of ordinary skills in the art is motivated to select the second thickness and the third thickness are equal when this improves the performance of the semiconductor device.
Claims 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over as Chun ‘634 as applied to claim 1 above, and further in view of Kim (US 2023/0231026, hereinafter as Kim ‘026).
Regarding Claim 7, Chun ‘634 is shown to teach all the features of the claim with the exception of explicitly the limitations: “a sidewall of the source/drain pattern includes a concave part and a convex part, wherein the concave part and the convex part are disposed alternately with each other, and wherein the sidewall has a wavy profile”.
Kim ‘026 teaches a sidewall of the source/drain pattern (Fig. 6A, (SD1); [0054]) includes a concave part and a convex part, wherein the concave part and the convex part are disposed alternately with each other, and wherein the sidewall has a wavy profile.
Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify Chun ‘634 by having a sidewall of the source/drain pattern includes a concave part and a convex part, wherein the concave part and the convex part are disposed alternately with each other, and wherein the sidewall has a wavy profile for the purpose of improving the electrical characteristics of the semiconductor device (see para. [0004]) as suggested by Kim ‘026.
Regarding Claim 8, Kim ‘026 teaches the convex part is a portion wherein a sidewall of the inner spacer is in contact with the sidewall of the source/drain pattern (SD1) (see Fig. 6A).
Regarding Claim 9, Kim ‘026 teaches the concave part is a portion where a sidewall of each semiconductor pattern of the plurality of semiconductor patterns (SP1/2; [0109]) is in contact with the sidewall of the source/drain pattern (SD1) (see Fig. 6A).
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Regarding Claim 10, Kim ‘026 teaches a curvature of the convex part is a same as or less than a curvature of the concave part (see Fig. 6A).
Examiner’s Note
Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182.
Examiner has cited particular paragraph numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI.
In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The following patents are cited to further show the state of the art with respect to semiconductor devices:
Frougier et al. (US 2020/0357911 A1)
Bowonder et al. (US 2020/0105759 A1)
Kang et al. (US 2020/0083219 A1)
Yang et al. (US 2020/0051981 A1)
Lee et al. (US 2019/0341450 A1)
For applicant’s benefit portions of the cited reference(s) have been cited to aid in the review of the rejection(s). While every attempt has been made to be thorough and consistent within the rejection it is noted that the PRIOR ART MUST BE CONSIDERED IN ITS ENTIRETY, INCLUDING DISCLOSURES THAT TEACH AWAY FROM THE CLAIMS. See MPEP 2141.02 VI.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DZUNG T TRAN whose telephone number is (571) 270-3911. The examiner can normally be reached on M-F 8 AM-5PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on (571) 272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DZUNG TRAN/
Primary Examiner, Art Unit 2893
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