DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1 – 4, 7, 9 – 16, 19 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Kashiwakura (US 2015/0359084 A1) in view of Popovic (US 2016/0205770 A1).
Regarding Claim 1, Kashiwakura (US 2015/0359084 A1) discloses an apparatus (Fig 1-3) comprising: a layer (see Fig 2A) of a printed circuit board (1); a first pair of signal vias (101) formed through the layer, wherein the first pair of signal vias is configured to transmit respective signals ([0057-0058]), the first pair of signal vias comprises a first signal via (101a) and a second signal via (101b) offset from one another along a first axis (imaginary vertical line extending in the up-down direction in Fig 2) and aligned with one another along a second axis (imaginary vertical line extending in the left-right direction in Fig 2), perpendicular to the first axis; and a second pair of signal vias (101 in another row in Fig 2A) formed through the layer, wherein the second pair of signal vias is configured to transmit respective signals ([0057-0058]), the second pair of signal vias (101) comprises a third signal via (101 on left side of pair equivalent to 101a) and a fourth signal via (101 on left side of pair equivalent to 101b) offset from one another along the first axis and aligned with one another along the second axis, and the first pair of signal vias (101) and the second pair of signal vias (101) are offset from one another along the first axis and along the second axis.
Kashiwakura does not explicitly disclose the first pair of signal vias and the second pair of signal vias are offset from one another along the first axis and along the second axis such that a first distance between the third signal via and the first signal via is different from a second distance between the third signal via and the second signal via.
Popovic (US 2016/0205770 A1) teaches of an apparatus (Fig 4) comprising: a layer (as seen in Fig 4 would have some thickness); a first pair of signal vias (310a; 110an,110ap; [0020-0025]) formed through the layer, wherein the first pair of signal vias is configured to transmit respective signals ([0020-0029]), the first pair of signal vias (110an,110ap) comprises a first signal via (110an) and a second signal via (110ap) offset from one another along a first axis (imaginary vertical line extending in the up-down direction in Fig 4) and aligned with one another along a second axis (imaginary horizontal line extending in the left-right direction in Fig 4), perpendicular to the first axis; and a second pair of signal vias (310b; 110bn,110bp) formed through the layer, wherein the second pair of signal vias is configured to transmit respective signals ([0020-0029]), the second pair of signal vias comprises a third signal via (110bn) and a fourth signal via (110bp) offset from one another along the first axis (imaginary vertical line extending in the up-down direction in Fig 4) and aligned with one another along the second axis (imaginary horizontal line extending in the left-right direction in Fig 4), and the first pair of signal vias (110an,110ap) and the second pair of signal vias (110bn,110bp) are offset (at Offset420 and from 410a to 410b) from one another along the first axis and along the second axis such that a first distance (at Offset420; [0027-0037]) between the third signal via (110bn) and the first signal via (110an) is different from a second distance between the third signal via (110bn) and the second signal via (110ap).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the apparatus comprising vias as disclosed by Kashiwakura, wherein the first pair of signal vias comprises a first signal via and a second signal via offset from one another along a first axis and aligned with one another along a second axis, perpendicular to the first axis; and a second pair of signal vias formed through the layer, wherein the second pair of signal vias is configured to transmit respective signals, the second pair of signal vias comprises a third signal via and a fourth signal via offset from one another along the first axis and aligned with one another along the second axis, and the first pair of signal vias and the second pair of signal vias are offset from one another along the first axis and along the second axis such that a first distance between the third signal via and the first signal via is different from a second distance between the third signal via and the second signal via as taught by Popovic, in order to minimize crosstalk, reduce crosstalk, provide smaller impact to signal density and routability, and minimize magnetic flux (Popovic, [0001-0006,0025-0037]).
Regarding Claim 2, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus (Fig 4) of claim 1, wherein the first distance (at Offset420; [0027-0037]) between the third signal via (110bn) and the first signal via (110an) is greater than (see Fig 4) the second distance between the third signal via (110bn) and the second signal via (110ap).
Regarding Claim 3, Kashiwakura in view of Popovic teaches the limitations of the preceding claim.
Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus (Fig 4) of claim 1, wherein the first pair of signal vias (110) and the second pair of signal vias (110) are offset from one another along the first axis (imaginary vertical line extending in the up-down direction in Fig 4) and along the second axis (imaginary vertical line extending in the left-right direction in Fig 4) such that a first sum of a first amount of noise ([0002,0021]) coupling caused by the first signal via (110an) with respect to the third signal via plus (110bn) a second amount of noise coupling caused by the second signal via (110ap) with respect to the third signal via (110bn) is substantially equal to a second sum of a third amount of noise ([0002,0021]) coupling caused by the first signal via (110an) with respect to the fourth signal via (110bp) plus a fourth amount of noise ([0002,0021]) coupling caused by the second signal via (110ap) with respect to the fourth signal via (110bp) (structure shown would perform this function as the structure shown is analogous to the Applicant’s invention).
Please note that the claims are directed to apparatus which must be distinguished from the prior art in term of structure rather function [MPEP 2144]. Hence, the functional limitations “such that a first sum of a first amount of noise coupling caused by the first signal via with respect to the third signal via plus a second amount of noise coupling caused by the second signal via with respect to the third signal via is substantially equal to a second sum of a third amount of noise coupling caused by the first signal via with respect to the fourth signal via plus a fourth amount of noise coupling caused by the second signal via with respect to the fourth signal via” which are narrative in form have not been given any patentable weight. In order to be given patentable weight, a functional recitation must be supported by recitation in the claim of sufficient structure to warrant the presence of the functional language. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997)
Regarding Claim 4, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Kashiwakura further discloses the apparatus (Fig 1-3) of claim 1, wherein the first pair of signal vias (101) and the second pair of signal vias (101) are configured to mount to pins ([0057]) of an integrated circuit (0057).
Regarding Claim 7, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus of claim 1, wherein an offset distance between the first signal via and the third signal via along the first axis is between 0.66 millimeters and 0.75 millimeters (Fig. 5; [0037] “appreciable drop in FEXT over a small range between 0.5 and 1.0 millimeters”).
Regarding Claim 9, Kashiwakura discloses an apparatus (Fig 1-3) comprising: a layer (see Fig 2A) of a printed circuit board (1); and a plurality of signal vias (101) formed through the layer and configured to transmit respective signals ([0057-0058]), wherein the plurality of signal vias (101) comprises: a first signal via (101a); a second signal via (101b) immediately adjacent to the first signal via along a first axis (imaginary vertical line extending in the up-down direction in Fig 2); a third signal via (101 in another row in Fig 2A having a 101 on left side of pair equivalent to 101a) immediately adjacent to the first signal via along a second axis (imaginary vertical line extending in the left-right direction in Fig 2), perpendicular to the first axis; and a fourth signal via (101 in another row in Fig 2A having a 101 on left side of pair equivalent to 101b) immediately adjacent to the third signal via along the first axis, wherein the first signal via (101a), the second signal via (101b), the third signal via (second row equivalent 101a), and the fourth signal via (second row equivalent 101b) are arranged in a parallelogram configuration.
Kashiwakura does not explicitly disclose a first distance between the first signal via and the third signal via is different from a second distance between the second signal via and the third signal via.
Popovic (US 2016/0205770 A1) teaches of an apparatus (Fig 4) comprising: a layer (as seen in Fig 4 would have some thickness); and a plurality of signal vias (310; 110; [0020-0025]) formed through the layer and configured to transmit respective signals ([0020-0029]), wherein the plurality of signal vias comprises: a first signal via (110an); a second signal via (110ap) immediately adjacent to the first signal via along a first axis (imaginary vertical line extending in the up-down direction in Fig 4); a third signal via (110bn) immediately adjacent to the first signal via along a second axis (imaginary vertical line extending in the left-right direction in Fig 4), perpendicular to the first axis; and a fourth signal via (110bp) immediately adjacent to the third signal via along the first axis, wherein the first signal via (110an), the second signal via (110ap), the third signal via (110bn), and the fourth signal via (110bp) are arranged in a parallelogram configuration, and a first distance (at Offset420; [0027-0037]) between the first signal via (110an) and the third signal via (110bn) is different from a second distance (see Fig 4) between the second signal via (110ap) and the third signal via (110bn).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the apparatus comprising vias as disclosed by Kashiwakura, wherein a first distance between the first signal via and the third signal via is different from a second distance between the second signal via and the third signal via as taught by Popovic, in order to minimize crosstalk, reduce crosstalk, provide smaller impact to signal density and routability, and minimize magnetic flux (Popovic, [0001-0006,0025-0037]).
Regarding Claim 10, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus (Fig 4) of claim 9, wherein the first distance (at Offset420; [0027-0037]) between the first signal via (110an) and the third signal via (110bn) is greater than the second distance (see Fig 4; distance between 110bn and 110ap in left-right direction) between the second signal via (110ap) and the third signal via (110bn).
Regarding Claim 11, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus (Fig 4) of claim 9, wherein the second distance (see Fig 4; distance between 110bn and 110ap in left-right direction) between the second signal via (110ap) and the third signal via (110bn) is less than a third distance (Pitch (d) 415) between the first signal via (110an) and the second signal via (110ap).
Regarding Claim 12, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus (Fig 4) of claim 11, wherein the third distance (Pitch (d) 415) between the first signal via and the second signal via is substantially equal to a fourth distance (not labeled; see Fig 4; equivalent to Pitch (d) 415) between the third signal via (110bn) and the fourth signal via (110bp).
Regarding Claim 13, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus (Fig 4) of claim 11, wherein the third distance (Pitch (d) 415) between the first signal via (110an) and the second signal via (110ap) is substantially equal to a fourth distance (not labeled; see Fig 4; [0025-0037]) between the first signal via (110an) and the third signal via (110bn) along the second axis.
Regarding Claim 14, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus (Fig 4) of claim 9, wherein the third signal via (110bn) is positioned more adjacent to the second signal via (110ap) than to the first signal via (110an) along the first axis.
Regarding Claim 15, Kashiwakura discloses an apparatus (Fig 1-3) comprising: a layer (see Fig 2A) of a printed circuit board (1); and a plurality of signal vias (101) formed through the layer and configured to transmit respective signals ([0057-0058]), wherein the plurality of signal vias comprises: a first signal via (101a); a second signal via (101b) offset from the first signal via along a first axis (imaginary vertical line extending in the up-down direction in Fig 2) and aligned with the first signal via along a second axis (imaginary vertical line extending in the left-right direction in Fig 2), perpendicular to the first axis; a third signal via (101 in another row in Fig 2A having a 101 on left side of pair equivalent to 101a) offset from the first signal via (101a) and the second signal via (101b) along the first axis and along the second axis; and a fourth signal via (101 in another row in Fig 2A having a 101 on left side of pair equivalent to 101b) offset from the third signal via along the first axis and aligned with the third signal via (101 in another row in Fig 2A having a 101 on left side of pair equivalent to 101a) along the second axis (imaginary vertical line extending in the left-right direction in Fig 2).
Kashiwakura does not explicitly disclose wherein a first distance between the first signal via and the third signal via, a second distance between the first signal via and the second signal via, and a third distance between the second signal via and the third signal via are different from one another, and the second distance between the first signal via and the second signal via is substantially equal to a fourth distance between the third signal via and the fourth signal via.
Popovic teaches of an apparatus (Fig 4) comprising: a layer (as seen in Fig 4 would have some thickness); and a plurality of signal vias (310; 110; [0020-0025]) formed through the layer and configured to transmit respective signals ([0020-0029]), wherein the plurality of signal vias comprises: a first signal via (110an); a second signal via (110ap) offset from the first signal via along a first axis (imaginary vertical line extending in the up-down direction in Fig 4) and aligned with the first signal via (110an) along a second axis (imaginary vertical line extending in the left-right direction in Fig 4), perpendicular to the first axis; a third signal via (110bn) offset from the first signal via (110an) and the second signal via (110ap) along the first axis and along the second axis; and a fourth signal via (110bp) offset from the third signal via along the first axis and aligned with the third signal via (110bn) along the second axis (imaginary vertical line extending in the left-right direction in Fig 4), wherein a first distance (Offset420) between the first signal via (110an) and the third signal via (110bn), a second distance (Pitch(d)415) between the first signal via (110an) and the second signal via (110ap), and a third distance (left-right distance between 110ap and 110bn) between the second signal via (110ap) and the third signal via (110bn) are different from one another, and the second distance (Pitch(d)415) between the first signal via and the second signal via is substantially equal to a fourth distance (Pitch(d)415; [0027-0037]) between the third signal via and the fourth signal via.
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the apparatus comprising vias as disclosed by Kashiwakura, wherein a first distance between the first signal via and the third signal via, a second distance between the first signal via and the second signal via, and a third distance between the second signal via and the third signal via are different from one another, and the second distance between the first signal via and the second signal via is substantially equal to a fourth distance between the third signal via and the fourth signal via as taught by Popovic, in order to minimize crosstalk, reduce crosstalk, provide smaller impact to signal density and routability, and minimize magnetic flux (Popovic, [0001-0006,0025-0037]).
Regarding Claim 16, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Popovic further teaches the apparatus (Fig 4) of claim 15, wherein each of the first distance (Offset420) and the second distance (Pitch(d)415) is greater than the third distance (left-right distance between 110ap and 110bn).
Regarding Claim 19, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Kashiwakura further discloses the apparatus (Fig 1-3) of claim 15, further comprising: a fifth signal via (101a in third row in Fig 2A) offset from the first signal via (101a) and the third signal via (101a in an adjacent second row) along the second axis (imaginary vertical line extending in the left-right direction in Fig 2A) and aligned with the first signal via (101a) along the first axis (imaginary line in up-down direction of Fig 2A); and a sixth signal via (101) offset from the second signal via and the fourth signal via along the second axis and aligned (see Fig 2A) with the second signal via along the first axis.
Regarding Claim 20, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Kashiwakura further discloses the apparatus (Fig 1-3) of claim 15, wherein the first signal via and the second signal via are a first differential pair ([0044-0045]), and the third signal via and the fourth signal via are a second differential pair ([0044-0045]).
Claim(s) 5, 6, 8, 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Kashiwakura (US 2015/0359084 A1) in view of Popovic (US 2016/0205770 A1) as applied to claims 1 and 15 above and further in view of Morlion (US 2006/0232301 A1).
Regarding Claim 5, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Kashiwakura further discloses the apparatus (Fig 1-3) of claim 1, further comprising: a plurality of pads (interface or surface of 101; note that no official definition of pad is provided; the Office will assume pads is defined as any terminal or point of electrical connection) formed on the layer of the printed circuit board and configured to mount to pins ([0057]) of an integrated circuit ([0057]); and a plurality of traces (103; [0042-0044]).
Kashiwakura does not disclose a plurality of traces that connects the first signal via, the second signal via, the third signal via, and the fourth signal via to a respective one of the plurality of pads.
Morlion (US 2006/0232301 A1) teaches of an apparatus (5,1) comprising a plurality of pads (P) formed on a layer of a printed circuit board (Abstract) and configured to mount to pins ([0008]) of an integrated circuit ([0057]); and a plurality of traces (VT) that connects a first signal via (V on left side of Fig 5A in upper row), a second signal via (V on right side of Fig 5A in upper row), a third signal via (V on left side of Fig 5A in lower row), and the fourth signal via (V on right side of Fig 5A in lower row) to a respective one of the plurality of pads (P).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the apparatus comprising vias as taught by Kashiwakura in view of Popovic, comprising a plurality of traces that connects the first signal via, the second signal via, the third signal via, and the fourth signal via to a respective one of the plurality of pads as taught by Morlion, in order to electrically connect vias and pads, increase routing density, balance impedance, and potentially minimize the number of board layers (Morlion, Abstract, [0004,0007-0022]).
Regarding Claim 6, Kashiwakura in view of Popovic and Morlion teaches the limitations of the preceding claim and Morlion further teaches the apparatus (Fig 5, 1) of claim 5, wherein the plurality of traces (plurality of VT as seen in Fig 5A) comprises: a first set of traces (white VT connecting white pair of V in Fig 5A in upper row) that connects the first signal via (V) and the second signal via (V) to respective first pads of the plurality of pads (P,P), wherein each trace (white VT connecting white pair of V in Fig 5A in upper row) of the first set of traces extends in a first direction (upward direction in Fig 5A) along a first axis (imaginary vertical line extending in the up-down direction in Fig 5); and a second set of traces (VT between P and V in lower row in Fig 5A) that connects the third signal via (V) and the fourth signal via (V) to respective second pads of the plurality of pads (P,P), wherein each trace (VT) of the second set of traces extends in a second direction (downward direction in Fig 5A), opposite the first direction, along the first axis.
Regarding Claim 8, Kashiwakura in view of Popovic and Morlion teaches the limitations of the preceding claim and Kashiwakura further discloses the apparatus (Fig 1-3) of claim 1, further comprising a first ground via (100a; [0042-0045]) and a second ground via offset from the first pair of signal vias (101a,101b) along the first axis (imaginary vertical line extending in the up-down direction in Fig 2) and aligned with the first pair of signal vias (101) along the second axis.
Kashiwakura does not explicitly disclose wherein a third distance between the first signal via and the first ground via, a fourth distance between the first signal via and the second signal via, and a fifth distance between the second signal via and the second ground via are substantially equal to one another.
Morlion teaches of an apparatus (Fig 2), further comprising a first ground via (G1) and a second ground via (G2) offset from a first pair of signal vias (S1,S2) along a first axis (imaginary line in Fig 2A in up-down direction) and aligned with the first pair of signal vias along a second axis (imaginary line in left-right direction), wherein a third distance (A1) between the first signal via (S1) and the first ground via (G1), a fourth distance (A) between the first signal via and the second signal via, and a fifth distance (A2) between the second signal via (S2) and the second ground via (G2) are substantially equal to one another (see Fig 2A; [0054]).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the apparatus comprising vias as taught by Kashiwakura in view of Popovic, wherein a third distance between the first signal via and the first ground via, a fourth distance between the first signal via and the second signal via, and a fifth distance between the second signal via and the second ground via are substantially equal to one another as taught by Morlion, in order to achieve a desired routing density, optimize signal transmission performance, provide better impedance matching and provide cross-talk reduction (Morlion, [0054]).
Regarding Claim 17, Kashiwakura in view of Popovic teaches the limitations of the preceding claim and Kashiwakura further discloses the apparatus (Fig 1-3) of claim 15, further comprising: a plurality of pads (interface or surface of 101; note that no official definition of pad is provided; the Office will assume pads is defined as any terminal or point of electrical connection) formed on the layer of the printed circuit board and configured to mount to pins ([0057]) of an integrated circuit ([0057]); a first trace (103 connected to 101a) that connects the first signal via (101a) to a first pad of the plurality of pads; and a second trace (103 connected to 101a in second row in Fig 2A) that connects the third signal via (101) to a second pad of the plurality of pads.
Kashiwakura does not disclose wherein the first trace forms a first angle with the second axis, and the second trace forms a second angle, different from the first angle, with the second axis.
Morlion (US 2006/0232301 A1) teaches of an apparatus (7,1) comprising a plurality of pads (P) formed on a layer of a printed circuit board (Abstract) and configured to mount to pins ([0008]) of an integrated circuit ([0057]); and a plurality of traces (VT) that connects a first signal via (V on left side of Fig 7A in upper row), a second signal via (V on right side of Fig 7A in upper row), a third signal via (V on left side of Fig 7A in lower row), and the fourth signal via (V on right side of Fig 7A in lower row) to a respective one of the plurality of pads (P), a first trace (VT) that connects the first signal via (V) to a first pad (P) wherein the first trace (VT) forms a first angle with a second axis (an imaginary line going left-right in Fig 7A), and a second trace (VT) forms a second angle, different from the first angle, with the second axis.
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to modify the apparatus comprising vias as taught by Kashiwakura in view of Popovic, wherein the first trace forms a first angle with the second axis, and the second trace forms a second angle, different from the first angle, with the second axis as taught by Morlion, in order to electrically connect vias and pads, increase routing density, balance impedance, and potentially minimize the number of board layers (Morlion, Abstract, [0004,0007-0022]).
Regarding Claim 18, Kashiwakura in view of Popovic and Morlion teaches the limitations of the preceding claim and Morlion further teaches the apparatus (Fig 7,1) of claim 17, wherein the second angle (this angle can be measured as greater than 90 degrees; note that no datum of reference is defined in the claim language) is less than the first angle (this angle can be measured as less than 90 degrees).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Jessep (US 2003/0047348 A1) teaches of an apparatus (Fig 6) comprising: a layer of a printed circuit board; a first pair of signal vias (520,520) formed through the layer, wherein the first pair of signal vias is configured to transmit respective signals ([0052]), the first pair of signal vias comprises a first signal via and a second signal via offset from one another along a first axis and aligned with one another along a second axis, perpendicular to the first axis; and a second pair of signal vias (520,520) formed through the layer, wherein the second pair of signal vias is configured to transmit respective signals ([0052]), the second pair of signal vias comprises a third signal via (520) and a fourth signal via (520) offset from one another along the first axis and aligned with one another along the second axis; this reference could be used in a 103 Rejection.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROSHN K VARGHESE whose telephone number is (571)270-7975. The examiner can normally be reached M-Th: 900 am-300 pm.
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/ROSHN K VARGHESE/Primary Examiner, Art Unit 2896