Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restrictions
1. Applicant’s election without traverse of claims 1-15 in the reply filed on 06/08/26 is acknowledged.
Claim Objections
2. Claims 2-15 are objected to because of the following informalities:
a. Per claims 2-8, change “A printed circuit board” to –The printed circuit board.
b. Per claim 9-15, change “An assembly” to –The assembly--.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
3. In the event that the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-5 & 7-8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by St. Lawrence et al. US2007/0148467.
Per claim 1 St. Lawrence et al. teaches a printed circuit board (100, see fig.1; [0007]-[0008], [0013]-[0014], [0065], [0078]) comprising: a circuit layer (110; [0082], “conductive layer”) comprising an electrical conductor for conducting electricity through the printed circuit board (Abstract & [0076], “conductive layer is electrically conducting…”); and a support layer (120) for supporting the circuit layer (110, see fig.1; [0082]); wherein the support layer (see fig.1) comprises: a fibre-reinforced epoxy layer having a thermally conductive and electrically insulating filler powder embedded therein (Abstract, [0051] & [0082]); wherein the support layer has a thermal conductivity of at least 1 W/m.K ([0066]).
Per claim 2 St. Lawrence et al. teaches a printed circuit board as claimed in claim 1, wherein the filler powder comprises a ceramic powder, optionally boron nitride or aluminium nitride ([0051], [0053]-[0054], [0066]).
Per claim 3 St. Lawrence et al. teaches a printed circuit board as claimed in claim 1, wherein the circuit layer (110) comprises copper ([0076]).
Per claim 4 St. Lawrence et al. teaches a printed circuit board as claimed in claim 1, wherein the printed circuit board (100) is a multi-layer printed circuit board comprising a plurality of circuit layers and a plurality of support layers arranged in an alternating arrangement ([0082]).
Per claim 5 St. Lawrence et al. teaches a printed circuit board as claimed in claim 1, wherein the support layer (120) comprises a glass reinforced epoxy laminate sheet ([0004], [0082]).
Per claim 7 St. Lawrence et al. teaches a printed circuit board as claimed in claim 1, wherein a volumetric ratio of filler powder in the fibre-reinforced epoxy layer is in the range of 5% to 50% ([0089]).
Per claim 8 St. Lawrence et al. teaches a printed circuit board as claimed in claim 1, wherein the thermal conductivity of the support layer is at least 5 W/m.K ([0067]).
Claim Rejections - 35 USC § 103
4. In the event that the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over St. Lawrence et al. US2007/0148467 in view of Umapathi et al. US2018/0318826.
Per claim 6 St. Lawrence et al. teaches the printed circuit board as claimed in claim 5,
St. Lawrence et al. does not explicitly teach wherein the glass reinforced epoxy laminate sheet is FR4 as defined in the NEMA LI 1-1998 standard.
Umapathi et al. however discloses wherein the glass reinforced epoxy laminate sheet is FR4 as defined in the NEMA LI 1-1998 standard ([0089]).
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have a glass reinforced epoxy laminate sheet is FR4 as defined in the NEMA LI 1-1998 standard as taught by Umapathi et al. in the printed circuit board of St. Lawrence et al., because it creates a durable and stable base that can support complect electronic circuits due to its mechanical durability, electrical insulation and heat resistance.
Claim(s) 9-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over St. Lawrence et al. US2007/0148467 in view of Staehr EP2166230
Per claim 9 St. Lawrence et al. teaches an assembly comprising: a printed circuit board as claimed in claim 1; and an electrical component ([0078]) arranged on a first side of the printed circuit board and electrically connected to the circuit layer ([0078]),
St. Lawrence et al. does not explicitly teach wherein in use the electrical component has an average thermal loss in the range of 5 W to 50 W.
Staehr however discloses wherein in use the electrical component has an average thermal loss in the range greater than 1W/mk (Abstract).
St. Lawrence et al. in view of Staehr discloses substantially all the limitations of the claims except a thermal loss in the range of 5W to 50W
It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to have an electrical component with an average thermal loss in the range of 5 W to 50W such as a thermal loss greater than 1 Watt per meter Kevin as taught by Staehr, because it ensures that the electronic component is effectively cooled to prevent overheating, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art (In re Aller, 105 USPQ 233).
Per claim 10 St. Lawrence et al. in view of Staehr teaches an assembly as claimed in claim 9, wherein a second side of the printed circuit board, which is opposite to the first side, comprises cooling fins (130) configured to exchange heat with ambient air ([0079], [0082]-[0083], “heat sink”).
Per claim 11 St. Lawrence et al. in view of Staehr teaches an assembly as claimed in claim 9, wherein at least 50% of the heat generated by the electrical component is dissipated through the printed circuit board ([0078]-[0079]).
Per claim 12 St. Lawrence et al. in view of Staehr teaches an assembly as claimed in claim 9, wherein the assembly does not include an electrically-powered cooling component directly connected to the electrical component to actively increase heat dissipation from the electrical component ([0082]-[0083], “heat sinks are not electrically-powered cooling components”).
Per claim 13 St. Lawrence et al. in view of Staehr teaches an assembly as claimed in claim 9, wherein the assembly does not include a fan or a cold plate having a pump for pumping cooling fluid therethrough ([0082]-[0083], “heat sinks are not electrically-powered cooling components”).
Per claim 14 St. Lawrence et al. in view of Staehr teaches an assembly as claimed in claim 9, wherein the assembly does include a metallic heat sink abutting the electrical component ([0082]-[0083], “heat sinks”).
Per claim 15 St. Lawrence et al. in view of Staehr teaches an assembly as claimed in claim 9, wherein the component is an electronic component ([0078]), optionally an electronic controller.
Email Communication
5. Applicant is encouraged to authorize the Examiner to communicate via email by filing form PTO/SB/439 either via USPS, Central Fax, or EFS-Web. See MPEP 502.01, 502, 502.05.
Conclusion
6. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hirotsuru et al. US9516741 discloses a boron nitride/resin composite circuit board, comprising: a plate-shaped resin-impregnated boron nitride sintered body having a plate thickness of 0.2 to 1.5 mm, the plate-shaped resin-impregnated boron nitride sintered body comprising 30 to 85 volume % of a boron nitride sintered body having boron nitride particles bonded three-dimensionally.
Hori et al. US6225701 discloses A semiconductor device comprising:
a heat-sink; a lead-frame; a laminated insulating film interposed between the heat-sink and the lead-frame, the laminated insulating film including a first layer positioned on the side of the heat-sink and made of an insulating matrix containing a heat dissipating filler.
Applicants are directed to consider additional pertinent prior are included on the Notice of References Cited (PTOL 892) attached herewith. The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Applicant, in preparing the response, should consider fully the entire reference as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL A MATEY whose telephone number is (571)270-5648. The examiner can normally be reached Monday-Friday 8-5 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JAYPRAKASH GANDHI can be reached at 5712723740. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/MICHAEL A MATEY/Primary Examiner, Art Unit 2841
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