Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim 16 and 20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by You et al. (US 2023/0366754 A1 – hereafter “You”).
As per claim 16, You teaches the following:
A semiconductor device, comprising: a substrate that includes active devices (see para [0018]; [0021]);
a resistor situated over the substrate and including at least two metal layers (see para [0020]);
a measurement circuit in the substrate and electrically connected to the resistor, the measurement circuit configured to measure resistance of the resistor at a first temperature (see para [0017] - [0018]; [0025]);
and a control circuit electrically connected to the measurement circuit and configured to determine a calibrated temperature coefficient of the resistor based on the measured resistance of the resistor at the first temperature and a resistor temperature coefficient function (RTCF) (see para [0019]; [0023]; [0031]).
Regarding claim 20, You teaches the device of claim 16, wherein the measurement circuit is configured to measure the resistance of the resistor at a second temperature and the control circuit is configured to determine the second temperature based on the resistance of the resistor at the second temperature and the calibrated temperature coefficient. (see para [0017], [0025] – [0026]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 – 2, 8, 10 – 11, 14 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over You in view of Schemm (US 2023/0349774 A1).
As per claim 1, You teaches the following:
A method of calibrating a temperature coefficient of a thermal sensor, the method comprising:
determining a resistance temperature coefficient function (RTCF) based on resistance measurements of resistors on a semiconductor die at a first temperature and temperature coefficients of a semiconductor die (see para [0017] - [0019]);
measuring, by a measurement circuit, a resistance of a resistor on a semiconductor die at the first temperature (see para [0017] - [0018], measurement circuit 15);
and determining, by a control circuit, a calibrated temperature coefficient of the semiconductor die based on the measured resistance of the resistor on the semiconductor die at the first temperature and the RTCF (see para [0017] - [0018]).
However, You does not explicitly teach determining a RTCF based on resistance measurements of resistors on a plurality of semiconductor die.
Schemm teaches a multi-chip module including a first integrated circuit die and a second integrated circuit die, each having resistors thereon (see para [0016], first integrated circuit die 108, second integrated circuit die 110).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm to apply the resistance temperature coefficient function determination to resistors located on a plurality of semiconductor die within a multi-chip module in order to enable calibration across multiple integrated circuit die and improve temperature measurement accuracy in multi-die systems.
Regarding claim 2, the claim recites “The method of claim 1, wherein determining the RTCF includes determining a linear approximation function of the resistance measurements at the first temperature and the temperature coefficients for the plurality of semiconductor die.”
You teaches determining a mathematical relationship between resistance and temperature that may be represented as coefficients of a linear function (see para [0019]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm to apply the linear approximation function to resistance measurements obtained from a plurality of semiconductor die in order to enable calibration and temperature coefficient determination across multiple dies within a multi-chip module.
Regarding claim 8, the claim recites “The method of claim 1, wherein measuring the resistance of the resistor on the semiconductor die includes providing a current from a current source through the resistor and measuring the resistance of the resistor on the semiconductor die in a single resistance measurement.”
You teaches the method of claim 1, but does not explicitly discloses providing the current from a current source in the claimed manner for performing the resistance measurement.
Schemm, however, teaches a current source configured to provide current for measuring a voltage drop across a temperature coefficient resistor (see para [0031] – [0032]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm to include a current source configured to provide current through the resistor during the resistance measurement in order to obtain a stable and controlled resistance measurement based on voltage drop across the resistor.
As per claim 10, You teaches the following:
A method of measuring a temperature of a semiconductor die, comprising: determining a resistance temperature coefficient function (RTCF) based on resistance measurements of resistors on a semiconductor die at a first temperature and temperature coefficients of the semiconductor die (see para [0017] - [0019];
providing one or more resistors on the semiconductor die (see para [0017], [0030]);
measuring, by a measurement circuit, a resistance of the one or more resistors on the semiconductor die at the first temperature (see para [0025] - [0026]);
determining, by a control circuit, a calibrated temperature coefficient of the semiconductor die from the measured resistance of the one or more resistors on the semiconductor die at the first temperature and the RTCF (see para [0017] - [0018], [0023], [0026]);
measuring, by the measurement circuit, the resistance of the one or more resistors on the semiconductor die at a second temperature (see para [0025] - [0026]);
and determining, by the control circuit, the second temperature based on the resistance of the one or more resistors on the semiconductor die at the second temperature and the calibrated temperature coefficient of the semiconductor die (see para [0023], [0029]).
However, You does not explicitly teach determining a RTCF based on resistance measurements of resistors on a plurality of semiconductor die.
Schemm teaches a multi-chip module including a first integrated circuit die and a second integrated circuit die, each having resistors thereon (see para [0016], first integrated circuit die 108, second integrated circuit die 110).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm to apply the resistance temperature coefficient function determination to resistors located on a plurality of semiconductor die within a multi-chip module in order to enable calibration across multiple integrated circuit die and improve temperature measurement accuracy in multi-die systems.
Regarding claim 11, the claim recites “The method of claim 10, wherein determining the RTCF includes determining a linear approximation function of the resistance measurements at the first temperature and the temperature coefficients for the plurality of semiconductor die.”
You teaches determining a mathematical relationship between resistance and temperature that may be represented as coefficients of a linear function (see para [0019]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm to apply the linear approximation function to resistance measurements obtained from a plurality of semiconductor die in order to enable calibration and temperature coefficient determination across multiple dies within a multi-chip module.
Regarding claim 14, the claim recites “The method of claim 10, wherein measuring the resistance of the one or more resistors on the semiconductor die includes providing a current from a current source through the one or more resistors and measuring the resistance of the one or more resistors on the semiconductor die in a single resistance measurement.”
You teaches the method of claim 10, but does not explicitly discloses providing a current from a current source in the claimed manner for performing the resistance measurement.
Schemm, however, teaches a current source configured to provide current for measuring a voltage drop across a temperature coefficient resistor (see para [0031] – [0032]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm to include a current source configured to provide current through the resistor during the resistance measurement in order to obtain a stable and controlled resistance measurement based on voltage drop across the resistor.
Regarding claim 18, the claim recites “The device of claim 16, wherein the measurement circuit includes a current source configured to provide current to the resistor to measure the resistance of the resistor in a single resistance measurement.”
You teaches the device of claim 16, but does not explicitly disclose that the measurement circuit includes a current source configured to provide current to the resistor in the claimed manner for performing the resistance measurement.
Schemm, however, teaches a current source configured to provide current for measuring a voltage drop across a temperature coefficient resistor (see para [0031] – [0032]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm to include a current source configured to provide current through the resistor during the resistance measurement in order to obtain a stable and controlled resistance measurement based on voltage drop across the resistor.
Claims 6 – 7, 13 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over You in view of Schemm in further view of Cheng et al (US 2024/0312906 A1 – hereafter “Cheng”).
Regarding claim 6, the claim recites “The method of claim 1, wherein the resistor on the semiconductor die includes a back-end-of-line (BEOL) resistor.
You in view of Schemm teaches the method of claim 1, but fails to teach the resistor on the semiconductor die includes a back-end-of-line (BEOL) resistor.
However, Cheng teaches a semiconductor resistor structure included in the BEOL region of the semiconductor device (see para [0038]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm in further view of Cheng to implement the resistor on the semiconductor die as a BEOL resistor located in the BEOL region of the semiconductor in order to form the resistor in the back-end-of-line region consistent with conventional semiconductor fabrication practices and integration within interconnect layers.
Regarding claim 7, the claim recites “The method of claim 6, wherein the BEOL resistor includes at least two metal layers.”
You in view of Schemm teaches the method of claim 6 with a resistor being configured of two metal layers (see para [0020]), but fails to teach the resistor being a BEOL.
However, Cheng teaches that the semiconductor resistor structure may be included in the BEOL region (see para [0038]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm in further view of Cheng to form the two-metal layer resistor of You as a BEOL resistor structure in order to integrate the resistor within the BEOL region of the semiconductor device.
Regarding claim 13, the claim recites “The method of claim 10, wherein the one or more resistors on the semiconductor die includes one or more back-end-of-line (BEOL) resistors.”
You in view of Schemm teaches the method of claim 10, but fails to teach one or more resistors on the semiconductor die includes one or more back-end-of-line (BEOL) resistors.
However, Cheng teaches a semiconductor resistor structure included in the BEOL region of the semiconductor device (see para [0038]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm in further view of Cheng to implement the resistor as a BEOL resistor structure in order to form the resistor in the back-end-of-line region of the semiconductor device.
Regarding claim 17, the claim recites “The device of claim 16, wherein the resistor is a back-end-of-line (BEOL) resistor.”
You in view of Schemm teaches the device of claim 16, but fails to teach the resistor is a back-end-of-line (BEOL) resistor.
However, Cheng teaches Cheng teaches a semiconductor resistor structure included in the BEOL region of the semiconductor device (see para [0038]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm in further view of Cheng to form the resistor of the device as a BEOL resistor structure in order to integrate the resistor within the BEOL region of the semiconductor device.
Claims 9 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over You in view of Schemm in further view of Smerzi (US 2017/0356813 A1 – hereafter “Smerzi”).
Regarding claim 9, the claim recites “The method of claim 1, wherein measuring the resistance of the resistor on the semiconductor die includes measuring the resistance of the resistor in a Wheatstone bridge.”
You in view of Schemm teaches the method of claim 1, but does not teach measuring the resistance of the resistor on the semiconductor die includes measuring the resistance of the resistor in a Wheatstone bridge.
However, Smerzi teaches measuring resistance using a Wheatstone bridge configuration (see para [0064] – [0065]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm in further view of Smerzi to measure the resistance of the resistor on the semiconductor die using a Wheatstone bridge configuration in order to improve measurement accuracy and sensitivity in detecting small resistance variations.
Regarding claim 15, the claim recites “The method of claim 10, wherein measuring the resistance of the one or more resistors on the die includes measuring the resistance of the one or more resistors in a Wheatstone bridge.”
However, Smerzi teaches measuring resistance of resistive elements in a Wheatstone bridge configuration (see para [0064] – [0065]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Schemm in further view of Smerzi to measure the resistance of the resistor on the semiconductor die using a Wheatstone bridge configuration in order to improve precision and sensitivity when measuring small resistance changes.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over You in view of Smerzi in further view of Lin et al. (US 2019/0204163 A1 – hereafter “Lin”).
Regarding claim 19, the claim recites “The device of claim 16, wherein the resistor is part of a Wheatstone bridge and the measurement circuit includes at least one voltage to frequency converter configured to measure the resistance of the resistor in the Wheatstone bridge.”
You teaches the device of claim 16, but does not teach the resistor is part of a Wheatstone bridge and the measurement circuit includes at least one voltage to frequency converter configured to measure the resistance of the resistor in the Wheatstone bridge.
Smerzi teaches a resistor used in a Wheatstone bridge configuration (see para [0064] – [0065]).
However, Lin teaches a voltage-to-frequency convertor configured to convert a voltage corresponding to the resistance of a resistor into a frequency signal (see para [0016]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify You in view of Smerzi in further view of Lin to implement the resistor as part of a Wheatstone bridge and to include a voltage-to-frequency convertor configured to convert a bridge output voltage corresponding to resistance into a frequency signal in order to improve measurement accuracy and facilitate digital temperature determination.
Allowable Subject Matter
Claims 3 – 5 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/MANUEL SALVADOR CASTELLON JR/Examiner, Art Unit 2855
/JOHN E BREENE/Supervisory Patent Examiner, Art Unit 2855