DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions Acknowledged
Applicant’s election of Invention I directed to a method, and method Claims 1-19 in the response (filed on 07/08/26) to Restriction Requirements has been acknowledged.
Status of Claims
Applicant withdrew Claim 20 from further consideration as being drawn to a nonelected invention (being a device). However, the MPEP does not allow to rejoin non-elected device claims with elected method claims upon allowance of method claims, and it could be reasonable to cancel Claim 20 at any following stage of a prosecution.
Claims 1-19 are examined on merits herein.
Drawings
The drawings are objected to because a reference number 19 is shown in a right side of Fig. 14, while a reference number 39 is shown in a similar position in a left side of Fig. 14. However, there shall be no reference number 19 in Fig. 14, since 39 replaces 19, based on the specification of the application. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1-2, 4-5, 7, 10, 13, 16-17, and 19 are objected to because of the following informalities:
Line 1 of Claim 1 recites: “forming memory circuitry”. Examiner suggests changing the recitation to: “forming a memory circuitry”.
Line 8 of Claim 1 recites: “forming conductive material”. Examiner suggests changing the recitation to: “forming a conductive material”.
Lines 11-12 of Claim 1 recite: “alongside channel material”. Examiner suggests changing the recitation to: “alongside a channel material”.
Lines 13-14 of Claim 1 recite: “etching through the conductive material that extends laterally-between the immediately-laterally-adjacent sub-blocks to form select gates in the select-gate region in individual of the sub-blocks”. Since each sub-block comprises not only a portion of a select region 13, but also a portion of a stack 18 (that shares same word lines with other sub-blocks of a block), Examiner suggests (for a better clarity) changing the recitation of lines 13-14 to: “etching through a part of the conductive material disposed in the select-gate region and extends laterally-between the immediately-laterally-adjacent sub-blocks to form select gates in individual sub-blocks”.
Line 3 of Claim 2 recites: “forming void-space that has a top and a bottom of insulative material”. Since the above void space is formed between insulating materials 39 and 41 (per paragraph 0034 of the published application US 2024/0315027), both being created from silicon oxide (paragraphs 0023-0024), Examiner suggests changing the recitation either to “forming a void-space that has a top and a bottom of an insulative material” or: “forming a void-space that has a top and a bottom of insulative materials”.
Line 4 of Claim 2 recites: “filling the void-space with the conductive material”.
Line 1 of Claim 4 recites: “comprising conductive metal material”. Examiner suggests changing the recitation to: “comprising a conductive metal material”.
Line 1 of Claim 5 recites: “wherein gate insulator”. Examiner suggests changing the recitation to: “wherein a gate insulator”.
Line 4 of Claim 7 recites: “gate insulator”. Examiner suggests changing the recitation to: “a gate insulator”.
Line 5 of Claim 10 recites: “comprising sacrificial material”. Examiner suggests changing the recitation to: “comprising a sacrificial material”.
Line 9 of Claim 10 recites: “forming sacrifice material”. Examiner suggests changing the recitation to: “forming a sacrifice material”.
Line 14 of Claim 10 recites: “covering the sacrifice material with insulative material”. Examiner suggests changing the recitation to: “covering the sacrifice material with an insulative material”.
Lines 15-16 of Claim 10 recites: “with conductive material”. Examiner suggests changing the recitation to: “with a conductive material”.
In re Claim 10: Claims 10 recites in lines 18-19: “etching through the conductive material that extends laterally between the immediately-laterally-adjacent sub-blocks that results from the replacing to form select gates in the select-gate region”. For the same reason that is explained for lines 13-14 of Claim 1, Examiner suggests changing the limitation to: “etching through a part of the conductive material disposed in the select-gate region and extends laterally-between the immediately-laterally-adjacent sub-blocks that results from the replacing to form select gates in the select-gate region”.
Claim 13 recites: “the sacrificial material and the sacrifice material are of the same composition”. Examiner suggests changing the recitation to: “the sacrificial material and the sacrifice material are of a same composition”, in order to avoid a rejection for a lack of antecedent basis.
Claim 16 recites (line 1): “comprising conducting metal material”. Examiner suggests changing the recitation to: “comprising a conducting metal material”.
Claims 17 and 19 recite: “gate insulator” – with no article. Examiner suggests changing the recitations to: “a gate insulator”.
Appropriate corrections are required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-19 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
In re Claim 1: Claim 1 recites (lines 3-8); “the stack comprising memory blocks comprising channel material strings extending through the first tiers and the second tiers upwardly into the select gate region, the select-gate region comprising sub-blocks”. The recitation is unclear, since blocks and sub-blocks are elements of a memory circuit (device) capable of functioning, while lines 3-8 are directed to a structure used for creating a memory, but not being capable to perform memory functions.
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited recitation was interpreted as: “the stack comprising regions for memory blocks comprising channel material strings extending through the first tiers and the second tiers upwardly into the select gate region, the select-gate region comprising regions for sub-blocks”.
In re Claim 1: Recitations of “sub-blocks” in lines from 9 to 19 of Claim 1 were interpreted in accordance with the interpretation of liens 3-8.
In re Claim 2: Claim 2 recites: “filling the void-space with the conductive material”. The recitation is unclear, since Claim 2 depends on Claim 1 that recites (lines 8-9) that the conductive material is formed not only in the void space (that is between insulators 39 and 41) but also extends downwardly.
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited limitation was interpreted as: “filling the void-space with a portion of the conductive material”.
In re Claim 5: Claim 5 recites: “gate insulator that is between the select gates and the channel material extends laterally to be directly under the select gates”. The recitation of a lateral extension is not quite clear, since the channel material extends only vertically.
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited recitation was interpreted as: “a gate insulator, a portion of which is between the select gates and the channel material, includes also another portion that extends laterally to be directly under the select gates”.
In re Claim 6: Claim 6 is rejected under 35 U.S.C. 112(b) due to dependency on Claim 5.
In re Claims 7 and 8-9: Claim 7 has a same issue as Claim 5, while Claims 8-9 depend on Claim 7. For this Office Action, a corresponding Claim 7 was interpreted in a manner similar to that of Claim 5.
In re Claims 3-4: Claims 3-4 are rejected under 35 U.S.C. 112(b) due to dependency on Claim 1.
In re Claim 10: Lines 3-8 of Claim 10 have a same issue as lines 3-8 of Claim 1, and for this Office Action, this recitation was interpreted in a manner similar to that of Claim 1, while other references to sub-blocks were interpreted based on interpretation of lines 3-8.
In re Claim 10: Claim 10 recites (lines 22-23): “the select gates comprising the conductive material in the conductive-material tier and the conductive material extending downwardly”. The recitation is unclear, since lines 15-16 of the claim recites that “a conductive material” is used not only in the select-gate region, but also in the stack, so – not the entirety of the conductive material is used in the select-gate region.
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited limitation was interpreted as: “the select gates comprising a portion of the conductive material in the conductive-material tier and a portion of the conductive material extending downwardly”.
In re Claims 11 and 13: Claims 11 and 13 recite: “the same composition”. There is a lack of antecedent basis for using article “the” in the recitations, and for this Office Action, the recitation was interpreted as: “a same composition”.
In re Claim 12: Claim 12 recites: “at the same time”. There is a lack of antecedent basis for using article “the” in the recitation, and for this Office Action, the recitation was interpreted as: “at a same time”.
In re Claim 14: Claim 14 recites (lines 4-6): “forming a layer of the sacrifice material directly above and alongside the channel material and that extends laterally-between the immediately-laterally-adjacent sub-blocks”. The recitation is unclear, since leads to a question – what does extend laterally – the channel or the sacrifice material?
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited limitation of Claim 14 was interpreted as: “forming a layer of the sacrifice material directly above and alongside the channel material and also extending laterally-between the immediately-laterally-adjacent sub-blocks”, which allows associating the sacrifice material as having two directions of extensions.
In re Claim 14: Claim 14 recites: “sub-block”, and this recitation is interpreted in accordance with the corresponding interpretation of Claim 10.
In re Claim 15: Claim 15 recites: “the conductive material and the select gate extend upwardly from the conductive-material tier to above”. The recitation is unclear, since Claim 15 depends on Claim 10, and Claim 10 teaches that the conductive material is placed in two regions – of the stack and of the select gate, while Claim 15 does not clarifies which conductive material it refers to.
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited limitation is interpreted as: “the conductive material of the select-gate region and the select gate extend upwardly from the conductive-material tier to above”.
In re Claim 16: Claim 16 recites (lines 1-2): “comprising conducting metal material in the select-gate region that is directly against the channel material”. The recitation is unclear since leads to the question – what is directly against the channel material – the select-gate region or the conducting metal material?
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited recitation was interpreted as: “comprising a conducting metal material in the select-gate region, the conducting metal material is directly against the channel material”.
In re Claim 17: Claim 17 recites: “gate insulator that is between the select gates and the channel material extends laterally to be directly under the select gates”. The recitation is unclear for a reason similar to the reason of Claim 14.
Appropriate correction is required to clarify the claim language.
For this Office Action, the cited limitation of Claim 17 was interpreted as: “a gate insulator that is between the select gates and the channel material also extends laterally to be directly under the select gates”.
In re Claim 19: Claim 19 has a same issue with “a gate insulator” as Claims 14 and 17, and the same issue with “conductive material”, as Claim 15 has, and for this Office Action, it was interpreted accordingly.
In re Claim 18: Claim 18 is rejected under 35 U.S.C. 112(b) due to dependency on Claim 10.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
As far as the claims are understood, Claims 1-3, 5-13, 15, 17 are rejected under 35 U.S.C. 103 as being unpatentable over Kato et al. (US 2016/0079185).
In re Claim 1, Kato teaches a method used in forming memory circuitry comprising strings of memory cells (Abstract), comprising:
forming (Fig. 12) a stack (disposed in place of MS of Figs. 2 and 8, paragraph 0036) and a select-gate region (disposed in place of S1 in Figs. 2 and 8, paragraph 0026) directly above the stack MS,
the stack comprising vertically-alternating different-composition first tiers 21 (made from silicon oxide, paragraph 0081) and second tiers 22’ (made from silicon nitride, paragraph 0081),
the stack comprising (Annotated Fig. 2 and Fig. 8 that show a created structure for which a process of Figs. 12-17 is applicable)
Annotated Fig. 2
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memory blocks (Blocks, as in Annotated Fig. 2, are separated by trenches Tb, paragraph 0051)
and comprising channel-material strings 23 (paragraph 0049) extending through the first tiers 21 and the second tiers 22’ upwardly into the select-gate region S1 (S1 is not shown in Fig. 12, but is shown in Figs. 2 and 8),
the select-gate region comprising sub-blocks – Sub-blocks (e.g., on this stage of manufacturing, sub-blocks are just regions from which Sub-blocks of Annotated Fig. 2 are created),
forming (Figs. 13-17) conductive material 22 of a conductive-material tier (one conductive tire is one horizontal opening in Fig. 15 in the select-gate region) in the select-gate region in and extending laterally-between immediately-laterally-adjacent of the sub-blocks (the sub-blocks are obviously created after depositing conductive material 22, since creation of sub-blocks is not described in Figs. 12-17, but sub-blocks are shown in Fig. 2),
the conductive material 22 extending downwardly from the conductive-material tier to below the conductive-material tier alongside channel material of the channel-material strings – comprising channel 102 (explicitly shown in Fig. 4A, paragraph 0052) that is in the select-gate region – as is shown in Annotated Fig. 11B (paragraphs 0075, 0078);
and etching (obviously, in order to create a structure S1 of Fig. 2) through the conductive material that extends laterally-between the immediately-laterally-adjacent sub-blocks to form select gates in the select-gate region in individual of the sub-blocks operatively alongside the channel material (as is clear from Fig. 2) that is in the select-gate region in the individual sub-blocks,
Annotated Fig. 11B
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the select gates comprising the conductive material in the conductive-material tier (one tire is identified as “Tier” in Annotated Fig. 11B) and the conductive material extending downwardly (Downwardly - as is shown in Annotated Fig. 11B) from the conductive-material tier to below the conductive-material tier alongside (obviously) the channel material.
In re Claim 2, Kato teaches the method of Claim 1 as cited above and wherein forming the conductive material comprises:
forming void-space that has a top and a bottom of insulative material 21 (as Fig. 15 shows, paragraph 0083);
and filling (Figs. 16-17, paragraphs 0083-0084) the void-space with the conductive material 22.
In re Claim 3, Kato teaches the method of Claim 1 wherein the conductive material 22 and the select gates extend upwardly – Upwardly (Annotated Fig. 11B) from the conductive-material tier to above the conductive-material tier.
In re Claim 5, Kato teaches the method of Claim 1 wherein gate insulator 105, 106 (e.g., an insulator stack of 105 and 106, paragraph 0070, that is a part of CF shown in Fig. 11B; see also details of disposition of layers 105 and 106 in Fig. 4), where the gate insulator 105, 106 is between the select gates formed from 22 (and or 22 and 107) and the channel material 102 (paragraphs 0037, 0052, as is clear from Fig. 11A), the gate insulator is also shown as extends laterally to be directly under the select gates 22 (in as a part of CF in Fig. 11B)
In re Claim 6, Kato teaches the method of Claim 5 wherein the gate insulator 105, 106 (as the part of CF, Annotated Fig. 11B) extends upwardly to be above a top of the conductive-material tier – Tier (as in Annotated Fig. 11B).
In re Claim 7, Kato teaches the method of Claim 1 wherein, (Annotated Fig. 11B) the conductive material 22 and the select gates extend upwardly from the conductive-material tier -Tier - to above the conductive-material tier – for connection to an above-located conductive-material tier; and gate insulator 105, 106 (as a part of CF) that is between the select gates 22 and the channel material extends laterally to be directly under the select gates.
In re Claim 8, Kato teaches the method of Claim 7 as cited above, wherein (Annotated Fig. 11B) the gate insulator 105, 106 – as a part of CF - extends upwardly to be above a top of the conductive-material tier – Tier (as in Annotated Fig. 11B).
In re Claim 9, Kato teaches the method of Claim 8 as cited above, wherein (Annotated Fig. 11B) the gate insulator 105, 106 (as a part of CF) extends upwardly to be above a top of the conductive material that is above the conductive-material tier – e.g., it extends above an upper tier in the select-gate region that is above Tier of Annotated Fig. 11B.
In re Claim 10, Kato teaches a method used in forming memory circuitry comprising strings of memory cells, comprising:
forming (Fig. 12) a stack (as a lower portion in Fig. 12 and corresponding to a region MS of Figs. 1-3 and 8, paragraph 0036) and a select-gate region (as an upper portion in Fig. 12 and corresponding to a region S1 and Figs. 1-3 and 8, paragraph 0036) directly above the stack, the stack comprising vertically-alternating different-composition first tiers 22’ and second tiers 21, the first tiers 22’ comprising sacrificial material (paragraph 0081),
the stack comprising memory blocks comprising channel-material strings 102 (the number is shown in Fig. 4A, where 102 being is a part of layer 23, paragraph 0053) extending through the first tiers 22’ and the second tiers 21 upwardly into the select-gate region,
the select-gate region comprising sub-blocks (as interpreted);
forming (Fig. 12) sacrifice material 22’ of a sacrifice-material tier (the tier corresponds to Tier in Annotated Fig. 11B, paragraph 0075) in the select-gate region in and extending laterally-between immediately-laterally-adjacent of the sub-blocks (e.g., as non-divided tier of Fig. 12), the sacrifice material extending downwardly – within HRH (as shown in Fig. 12, paragraph 0081) - from the sacrifice-material tier of Annotated Fig. 11B, wherein material 22’ is used instead of material 22 to below the sacrifice-material tier - alongside channel material of the channel-material strings that is in the select-gate region;
covering the sacrifice material 22’ with insulative material 105 and 106 of CF (CF is shown in Fig. 11 and 105, 106, and CF are shown in Fig. 4A, paragraph 0047);
replacing (Figs. 14-17) the sacrificial material 22’ of the stack and the sacrifice material 22’ of the select-gate region with conductive material 22 (paragraphs 0082 -0084) whereby the sacrifice-material tier (of the select-gate region) and the first tiers (of the stack) collectively become conductive-material tiers; and
cutting through the conductive material 22 that extends laterally-between the immediately-laterally-adjacent sub-blocks that results from the replacing to form select gates in the select-gate region in individual of the sub-blocks operatively alongside the channel material that is in the select-gate region in the individual sub-blocks – cutting is obviously made, in order to create sub-blocks shown in Annotated Fig. 2, and it would have been obvious to make this cutting through etching, since this method is already used by Kato (paragraphs 0072-0073)
the select gates comprising the conductive material 22 in the conductive-material tier -Tier (as in Annotated Fig. 11B) and the conductive material 22 extending downwardly – Downwardly, as in Annotated Fig. 11B, -from the conductive-material tier in the select-gate region to below the conductive-material tier alongside the channel material.
In re Claim 11, Kato teaches the method of Claim 10 wherein (Fig. 12) the sacrificial material 22’ (in the stack) and the sacrifice material 22’ (in the select-gate region) are of the same composition relative one another.
In re Claim 12, Kato teaches the method of Claim 10 as cited above, wherein (Fig. 15, paragraph 0083) the replacing comprises etching the sacrificial material 22’ and the sacrifice material 22’ at the same time.
In re Claim 13, Kato teaches the method of Claim 12 as cited above wherein (Fig. 12) the sacrificial material 22’ (of the stack) and the sacrifice material 22’ (of the select-gate region) are of the same composition relative one another.
In re Claim 15, Kato teaches the method of Claim 10 as cited above, wherein the conductive material 22 and the select gates extend upwardly – Upwardly, as in Annotated fig. 11B - from the conductive-material tier – Tier - to above the conductive-material tier.
In re Claim 17, Kato teaches the method of Claim 10 wherein gate insulator 105 and 106 of CF (insulators 105 and 106 are clearly shown in Fig. 4, paragraph 0047) that is between the select gates 22 and the channel material 102 (see also Figs. 2 and 8) extends laterally to be directly under the select gates – as in Fig. 11B.
In re Claim 18, Kato teaches the method of Claim 17 wherein the gate insulator 105 and 106 of CF (Fig. 11B and Annotated Fig. 11B) extends upwardly to be above a top of the conductive-material tier.
In re Claim 19, Kato teaches the method of Claim 10 as cited above and wherein (Annotated Fig. 11B) the conductive material 22 and the select gates extend upwardly -Upwardly - from the conductive-material tier to above the conductive-material tier - Tier; and gate insulator of CF that is between the select gates and the channel material
extends laterally to be directly under the select gates.
Allowable Subject Matter
Claims 4, 14, and 16 contain allowable subject matter.
Reason for identification of allowable Subject Matter
Re Claim 4: The prior arts of record, alone or in combination, fail(s) to anticipate or render obvious such limitation as: “conducting metal material in the select-gate region that is directly against the channel material below a top of the channel material”, in combination with other limitations of Claim 4 and in combination with limitations of Claims 1 and 3, on which Claim 4 depends.
Re Claim 14: The prior arts of record, alone or in combination, fail(s) to anticipate or render obvious such limitation as: “anisotropically-spacer-etching the layer to remove the sacrifice material”, in combination with other limitations of Claim 14 and with all limitations of Claim 10, on which Claim 14 depends.
Re Claim 16: The prior arts of record, alone or in combination, fail(s) to anticipate or render obvious such limitation as: “conducting metal material in the select-gate region that is directly against the channel material below a top of the channel material”, in combination with other limitations of Claim 16 and in combination with limitations of Claims 10 and 15, on which Claim 16 depends.
The prior arts of record include: Kato et al. (US 2016/0079185), Barclay et al. (US 2020/0328222), Liu et al. (US 2024/0130120), Yang et al. (US 2017/0062067), Lee et al. (US 2013/0089974), Liu et al. (US 2016/0204117), Lu et al. (US 2020/0265897), Chowdhury et al. (US 9,397,111), and Zhang et al. (US 2018/0358102).
Conclusion
Any inquiry concerning this communication should be directed to GALINA G YUSHINA whose telephone number is 571-270-7440. The Examiner can normally be reached between 8 AM - 7 PM Pacific Time (Flexible).
Examiner interviews are available. To schedule an interview, Applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s Supervisor, Lynne Gurley can be reached on 571-272-1670.
The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300; a fax phone number of Galina Yushina is 571-270-8440.
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/GALINA G YUSHINA/Primary Patent Examiner, Art Unit 2811, TC 2800,
United States Patent and Trademark Office
E-mail: galina.yushina@USPTO.gov
Phone: 571-270-7440
Date: 07/24/26
Prosecution Insights