Prosecution Insights
Last updated: April 19, 2026
Application No. 18/603,425

METHOD FOR ACQUIRING ANALOG SYPPLY VOLTAGE, AND DISPLAY APPARATUS

Non-Final OA §103
Filed
Mar 13, 2024
Examiner
SHEN, PEIJIE
Art Unit
2622
Tech Center
2600 — Communications
Assignee
Wuhan Tianma Microelectronics Co., Ltd.
OA Round
3 (Non-Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
2y 6m
To Grant
97%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
266 granted / 337 resolved
+16.9% vs TC avg
Strong +18% interview lift
Without
With
+18.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
16 currently pending
Career history
353
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
49.5%
+9.5% vs TC avg
§102
22.1%
-17.9% vs TC avg
§112
22.7%
-17.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 337 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed has been entered. Response to Arguments Applicant's arguments filed have been fully considered but they are not persuasive. Applicant has incorporated two additional features into independent claims of pending application: The minimum-grayscale test voltage (in which brightness reach target brightness) is set as first gamma voltage for all sub-pixels of display, and (from previous dependent claim 5) Obtaining register setting value corresponding to analog supply voltage according to the analog supply voltage and storing the register setting value into nonvolatile memory of display driver chip. Regarding first amended feature, applicant argues that: “It can be seen from Hei that the cited references describe dividing the sub-pixels of the display panel into groups according to their negative grayscale compensation values before determining the corresponding data voltage for each group of sub-pixels. Therefore, Hei does not adopt a single minimum-grayscale test voltage as the first main gamma voltage for all sub-pixels of the display panel, as presently claimed.” The concept of applying a single analog supply voltage to all pixels within a display device, however, is well known, as evident from teaching both from cited prior art, as well as applicant admitted prior art, as can be seen in: Hei, Col. 1, ln. 30 – 41, “the conventional technical approaches is to actually measure the voltages of a batch of display panels when displaying the preset brightness, and then obtain multiple voltage values, and select the maximum voltage value from the multiple voltage values. The maximum voltage value plus a voltage buffer value is to obtain the final zero grayscale display voltage, and the final zero grayscale display voltage is used for all the measured batch of display panels to perform the zero grayscale display, and the final zero grayscale display voltage is used for any sub-pixel of the display panel to perform the zero grayscale display.” Hei, Col. 3. Ln. 43-55: “the voltages corresponding to zero grayscale is actually measured a batch of display panels when performing the preset brightness (this preset brightness can be the required target brightness for the display panel to perform the zero grayscale display), and then multiple voltage values are obtained. The maximum voltage value is selected from the multiple voltage values, and the maximum voltage value is added with a voltage buffer value to obtain the final voltage corresponding to the zero grayscale. The measured batch of display panels all use the final voltage to perform the zero grayscale, and all sub-pixels in any display panel are driven by the final voltage when the zero grayscale display is performed.” See also paragraph 26 of applicant admitted prior art: “Conventionally, the analog supply voltage AVDD is set for a large number of display panels 2 before delivery. A small quantity of, such as 20, display panels 2 are selected from the large number of display panels 2 as samples. The first main gamma voltages VGMP of the sample display panels 2 are determined. A largest one of the first main gamma voltages VGMP of these sample display panels 2 is taken as the first main gamma voltage VGMP for all the display panels 2”. That is, it is well known that a determined analog supply voltage may be not only applied to all pixels of a single display panel, but also across multiple display panels. Herein, both the pending application as well as prior art Hei solves the problem of increased power consumption and reduced display quality due to black grayscale voltage being set too high. Both Hei as well as pending application strive to determine the minimum/optimal black grayscale voltage by comparing actual measured display luminance under test voltage with target dark stage brightness to determine a minimum gamma voltage that achieve the goal of both conserving power supply as well as meeting display requirement. That is, both teaches the concept of individually tailoring the voltage configuration to individual display panel in order to account for variance across different display panels. The prior art Hei took a further step of not only individually configure gamma voltage for the display panel, but also individually configure gamma voltage for individual pixels by further dividing pixels into different groups and further configure different gamma voltage for different groups. Such feature of Hei, however, is an additional step that further improve customization for individual pixels. Meanwhile, Hei specifically discloses that the same single dark stage gamma voltage may be adequate for all pixels of display: “In general, all sub-pixels in the display panel may use the third data voltage Va3 as the data voltage when the sub-pixels perform the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirements.” (Hei, col. 10, ln. 42-46). In other word, applicant’s argument regarding Hei further categorizes pixels into different groups and apply additional customized voltages for different groups does not take away from the fact a single gamma voltage may be applied to all pixel groups, and that the concept of applying a single gamma voltage to all pixels is obvious from prior art teaching, as evident both from applicant’s admitted art, as well as from the teaching of Hei. One of ordinary skill in the art may easily modify Hei to apply the voltage Va3 to all sub-pixels of display panel, the attain the benefit for simplified calibration step, while still achieving the goal of reducing power consumption and maintaining adequate display quality. For applicant’s additional reference, examiner further cite pertinent prior arts: Pyun et al., US 20210012705 A1 discloses configuring a gamma voltage for all pixels of display, paragraph 112: “when the display device 100 includes pixels PX1, PX2, and PX3 having different operating points, the display device 100 may calculate all the maximum voltage levels of the data signal for each of the pixels PX1, PX2, and PX3, or may calculate the maximum voltage level of a data signal for a specific pixel among pixels PX1, PX2, and PX3, and then may adjust the gamma power voltage AVDD based on a calculation result”. However, the cited art is not relied upon in current 103 rejection. Applicant’s second argument is that the amended claims store register setting value corresponding to analog supply voltage, “it can be seen that the object stored in the nonvolatile memory is the register setting value corresponding to the analog supply voltage, whereas Pyo stores two register setting values (VREG1 and VREG2) corresponding to two black grayscale voltages, as cited in the Office Action. Therefore, the storage object in the present application is different from that of Pyo”. It appears that applicant allege that the black grayscale voltage being stored by prior art Pyo does not constitute the claimed “analog supply voltage”. Examiner respectfully submit that examiner must construe claim terms in the broadest reasonable manner during prosecution as is reasonably allowed in an effort to establish a clear record of what applicant intends to claim. Under a broadest reasonable interpretation, words of the claim must be given their plain meaning, unless such meaning is inconsistent with the specification. The plain meaning of a term means the ordinary and customary meaning given to the term by those of ordinary skill in the art at the time of the invention (see MPEP 2111). Herein, examiner submit that under broadest reasonable interpretation of claim under plain meaning, “analog supply voltage” is any voltage supplied to display panel for display panel to perform display function, and the black grayscale voltages of Pyo is/are analog voltage that is being determined, stored, and supplied to display device in order for display device to carry out the function of adequately displaying image at proper brightness, and therefore constitute the claimed analog supply voltage. Furthermore, even if analog supply voltage is considered as different voltage as black grayscale voltage, the concept of storing different display setting in memory is well known and obvious from prior art, and one of ordinary skill in the art may modify prior art to additionally store specific setting in memory. For applicant’s additional reference, examiner further cite pertinent prior arts: Kawase et al., US 20120069670 A1 discloses storing “Information for setting the level of a voltage generated by the LCD power supply circuit 240 for generating a drive voltage necessary for the drivers 210 to 230” in nonvolatile memory circuit (paragraphs 49, 50, nonvolatile memory 250). However, the cited art is not relied upon in current 103 rejection. For these reasons, examiner respectfully submit that cited prior art Hei in view of Pyo discloses the claimed features of pending application, corresponding claim rejections have been respectfully maintained. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1, 2, 7, 11, 12, and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Hei et al., US 11626086 B1 (hereinafter “Hei”), in view of Pyo, US 20190340981 A1 (hereinafter “A1”). Regarding claims 1 and 2, Hei discloses a method for acquiring an analog supply voltage, the analog supply voltage being provided to a display driver chip, the display driver chip driving a display panel (col. 1, ln. 15-55, present disclosure related to method for adjusting brightness of a display panel, col. 4, ln. 17-55, present disclosure related to obtaining analog supply voltage AVDD provided to display driver chip DDIC of display panel), and the method comprising: providing, to the display driver chip, a minimum-grayscale test voltage (“the voltage corresponding to zero grayscale display”) to the display panel, and acquiring an actual brightness of the display panel at the minimum-grayscale test voltage (fig. 13, 14, col. 11 ln. 31-41, col. 12, ln. 24-35, “Applying a data voltage to the determined target sub-pixel to make it light up may include but not limited to collect the current display image of the display panel through a high-precision image capturing device, and determine the actual brightness of the target sub-pixel based on the displayed image, and based on the collected actual brightness, the voltage value of the data voltage applied to the target sub-pixel may be adjusted such that the data voltage when the actual brightness is less than or equal to the target brightness may be determined as the to-be-determined third data voltage Va3 in the embodiment of the present disclosure”); adjusting the minimum-grayscale test voltage according to the actual brightness of the display panel; (col. 5, ln. 6-16, “different data voltages may be used to drive different sub-pixels such that the sub-pixels may achieve the target brightness requirement when performing the zero grayscale display. The target brightness may be the brightness that the display panel may need to meet when performing the zero grayscale display, for example, the glowing issue may not occur when performing the zero grayscale display. The data voltages may include the first data voltage Va1, the second data voltage Va2 and the n-th data voltage Van, and Va1<Va2 . . . <Van.” fig. 13, 14, col. 11 ln. 31-41, col. 12, ln. 24-35, based on the collected actual brightness, the voltage value of the data voltage applied to the target sub-pixel may be adjusted such that the data voltage when the actual brightness is less than or equal to the target brightness may be determined as the to-be-determined third data voltage Va3 in the embodiment of the present disclosure), using the minimum-grayscale test voltage at which the actual brightness of the display panel reaches target dark state brightness as a first main gamma voltage of all sub-pixels of the display panel (col. 5, ln. 41- col. 6, ln. 14, fig. 5, “As shown in FIG. 5, the step S10 “adjusting the data voltages of at least two sub-pixels to be different when performing the zero grayscale display” may include: S101: determining a corresponding data voltage when a sub-pixel of the at least two sub-pixels performs the 0 gray-scale display. The data voltage may be configured to allow the brightness of the sub-pixel to meet dark state requirements when the sub-pixel performs the zero grayscale display.” “Because the data voltages of the sub-pixels may be different when performing the zero grayscale display, and there may be multiple sub-pixels in the display panel, the corresponding data voltage may need to be determined before each sub-pixel performs the zero grayscale display. For example, the first data voltage Va1 may be used for driving the zero grayscale display, or the second data voltage Va2 may be used for driving the zero grayscale display, or the n-th data voltage Van may be used for driving the zero grayscale display, and the brightness of the sub-pixel in the zero grayscale display may need to meet the dark state requirements when the determined data voltage is used for driving. For example, it may be necessary to ensure that the sub-pixel may not glow when the zero grayscale display is performed. In one embodiment, the brightness that meets the dark state requirements during the zero grayscale display may be less than or equal to 0.001 nit.”, steps in fig. 12-14, col. 10, ln. 30-41, col. 11, ln. 31-41, col 11, ln. 65 – col. 12, ln 41 “the third data voltage Va3 may be used as the data voltage when the sub-pixel performs the zero grayscale display. Under the action of the third data voltage Va3, the brightness of the sub-pixel when performing the zero grayscale display may meet the dark state requirements. In general, all sub-pixels in the display panel may use the third data voltage Va3 as the data voltage when the sub-pixels perform the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirements” … “It can be seen that the third data voltage Va3 may be the maximum data voltage when the display panel performs the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirement”, herein the voltage Va3 correspond to the first main gamma voltage that would ensure driving of minimum grayscale / zero grayscale display); and obtaining the analog supply voltage according to the first main gamma voltage (col. 12, ln. 42-64, “It can be seen that the third data voltage Va3 may be the maximum data voltage when the display panel performs the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirement. That is to say, based on the minimum negative grayscale compensation value in the sub-pixel of each display panel, the corresponding third data voltage Va3 may be different, and based on the DDIC rule, the AVDD voltage corresponding to each display panel may also be different. For example, the third data voltage corresponding to the first display panel may be 6.5V, and the third data voltage corresponding to the second display panel may be 6.8V, then the AVDD corresponding to the first display panel may be AVDD=6.5V+ΔV1, and the AVDD corresponding to the second display panel may be AVDD=6.8V+ΔV1. The specific value of ΔV1 may be determined based on the rules of DDIC, and may be a constant value”). To summarize, Hei discloses similar display device as in pending application, wherein a higher input display data voltage corresponds to lower pixel display brightness. Due to variation among display panels and among display pixels, different display pixel may require different data voltage in order achieve same display brightness. For zero grayscale display corresponding to lowest brightness in pixel display, the required display brightness need to be lower than a predetermined amount (0.001 nit as an example). To ensure low brightness threshold is satisfied when displaying zero grayscale, a sufficiently high enough input gamma voltage (claimed first main gamma voltage) is required. Previous arts samples multiple display panels and selected the highest required input gamma voltage among multiple panels as the main gamma voltage, and add another offset ΔV to the main gamma voltage to determine the analog supply voltage AVDD used for display driver chip of display panels. However, since not all panel/pixel requires such high AVDD to display zero grayscale, this practice result in higher power consumption for some display panel/pixel (Hei, col. 1 ln. 32 – col. 2, ln. 32, motivation for adjusting analog supply voltage). In order to solve the aforementioned problem, various embodiments of Hei disclose individually measuring actual brightness of display panels and/or display pixels, to individually determine the minimum required first gamma voltage to be used for each type of individual display panel/pixel in order to meet zero grayscale display requirement, and obtaining analog supply voltage to be supplied to display driver chip in order to drive display panel accordingly (see steps in various embodiments of fig. 3-fig. 15. In example embodiment in fig. 12-14, VA3 is determined wherein VA3 is the minimum gamma voltage that may be used to ensure all pixels meet zero grayscale display requirement under the determined input gamma voltage and resultant obtained analog supply voltage, col. 5, ln. 19-30 outlines the benefit of performing such operation: “For the data voltage with the lowest voltage value” (herein the lowest voltage value refers the to lowest required input gamma voltage to display zero grayscale), “the first data voltage Va1 may reduce by the voltage difference between the first data voltage Va1 and the data voltage corresponding to the 1 grayscale. Accordingly, the variation range of the data voltages corresponding to the fractional grayscales between the zero grayscale and the 1 grayscale may also be reduced, Thus, in the process of the brightness adjustment of the display panel, if the grayscale is compensated to be below the 1 grayscale, the data voltage change may be relatively small; and the color cast issue may not occur, thereby improving the display uniformity of the display panel”). In steps as outlined in fig. 5-7 of Hei reference, it is specifically disclosed that the voltage to drive display panel to allow subpixel to display 0 grayscale need to be ascertained via measurement of actual brightness of display panel, such that the dark state requirement for the 0 grayscale is allowing the actual brightness of the subpixel to be smaller or equal to 0.001 nit, and data voltage is determined via a measurement and adjustment process. See Hei, fig. 7, col. 7, ln. 47 – col. 8, ln. 35: “The target brightness of the display panel during the zero grayscale display may be firstly determined. The target brightness may indicate that the brightness during the zero grayscale display may meet the dark state requirement, for example, the target brightness may be less than or equal to 0.001 nit. Applying a data voltage to the sub-pixel in the central area of the display panel to make them be turned on may include but not limited to detect the actual brightness of the sub-pixel in the central area of the display panel through a test probe. The data voltage applied to the sub-pixel may be adjusted based on the collected actual brightness such that the actual brightness may be less than or equal to the data voltage under the target brightness; and the data voltage may be determined as the first data voltage Va1 in one embodiment of the present disclosure. It can be seen that the first data voltage Va1 may be smaller than the voltage corresponding to the zero grayscale in the prior art, and the first data voltage Va1 may be the minimum data voltage when the sub-pixel performs the zero grayscale display and the brightness may meet the dark state requirement. For example, the voltage difference between the first data voltage Va1 and the data voltage corresponding to the 1 grayscale may be reduced; and the variation range of the data voltage corresponding to the decimal grayscale between the zero grayscale and the 1 grayscale may also be decreased. Accordingly, in the process of adjusting the brightness of the display panel, if the grayscale is compensated to be below the 1 grayscale, the change of the data voltage may be relatively small, and the color cast problem may not occur, thereby improving the display uniformity of the display panel.” See also, Hei, fig. 13, 14, col. 11 ln. 31-41, col. 12, ln. 24-35, “Applying a data voltage to the determined target sub-pixel to make it light up may include but not limited to collect the current display image of the display panel through a high-precision image capturing device, and determine the actual brightness of the target sub-pixel based on the displayed image, and based on the collected actual brightness, the voltage value of the data voltage applied to the target sub-pixel may be adjusted such that the data voltage when the actual brightness is less than or equal to the target brightness may be determined as the to-be-determined third data voltage Va3 in the embodiment of the present disclosure”. Furthermore, in col. 10, ln. 38-65, it is described that voltage Va3 (in which Va3 is largest among Va1, Va2 and Va3, Va1< Va2 <Va3) meet dark state requirement for all sub-pixels, however, for pixels that does not require Va3, smaller gamma voltage such as Va1 and Va2 may be used based on actual brightness measurement (“In general, all sub-pixels in the display panel may use the third data voltage Va3 as the data voltage when the sub-pixels perform the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirements. However, in this application, all sub-pixels whose negative grayscale compensation value is less than −8 may use the third data voltage Va3 as the data voltage when the sub-pixel performs the zero grayscale display, and all sub-pixels whose negative gray-scale compensation value is greater than or equal to −8 and less than −6 may use the second data voltage Va2 as the data voltage when the sub-pixel performs the zero grayscale display, and all sub-pixels whose negative gray-scale compensation values are greater than or equal to −6 may use the first data voltage Va1 as the data voltage when the sub-pixel performs the zero grayscale display. Because the voltage value of the first data voltage Va1 may be smaller than the voltage value of the second data voltage Va2 and the voltage value of the third data voltage Va3 may be smaller than the voltage value of the third data voltage Va3, data voltages with different voltage values may be used to drive the sub-pixels with different the negative grayscale compensation value ranges to perform the zero grayscale display. On the premise that the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirements, the display power consumption of the display panel may also be saved to achieve the purpose of reducing the power consumption”). In other word, the smaller one of a plurality of minimum-grayscale value is selected for subpixels to be used as first main gamma voltage. Hence, Hei discloses the motivation and general concept of using the lower/smaller minimum-grayscale voltage among plurality of minimum-grayscale voltages as the first gamma voltage. Hei does not disclose the specific process on how to adjust the minimum-grayscale test voltage. Specifically, Hei does not disclose the stepwise adjustment method of increasing the test voltage if the actual brightness is too bright, or decease the test voltage if the actual brightness is to too low. Hei does not disclose (from claim 1:) using a smallest one of a plurality of minimum-grayscale test voltages at which the actual brightness of the display panel is less than or equal to the target dark state brightness as the first main gamma voltage, obtaining a register setting value corresponding to the analog supply voltage according to the analog supply voltage, and storing the register setting value into a nonvolatile memory of the display driver chip and (from claim 2:) wherein the step of adjusting the minimum-grayscale test voltage comprises: comparing the actual brightness of the display panel with the target dark state brightness; and when the actual brightness of the display panel is greater than the target dark state brightness, increasing the minimum-grayscale test voltage with a first preset step until the actual brightness of the display panel is less than or equal to the target dark state brightness; or when the actual brightness of the display panel is less than the target dark state brightness, decreasing the minimum-grayscale test voltage with a second preset step until the actual brightness of the display panel is greater than or equal to the target dark state brightness. In similar field of endeavor of display wherein a higher input voltage corresponds to lower display brightness, Pyo discloses the motivation of using a smallest one of a plurality of minimum-grayscale test voltages at which the actual brightness of the display panel is less than or equal to the target dark state brightness as the first main gamma voltage, (paragraphs 3 and 74 describe power consumption is increased when the minimum-grayscale voltage is configured to be large: “It is noted, however, that the individual display devices may have luminance variations with respect to the same driving voltage due to a property of a material, a characteristic change caused by an ambient environment, etc. To address this luminance variation issue, a large margin value was conventionally provided to set voltage values. As such, unnecessary power consumption of the individual display devices may be increased. In addition, an afterimage, color shift, and/or the like, may be viewed …”, paragraph 74, “In a conventional display device, a worst case may be computed, and one black gray scale voltage VREG for ensuring a stable operation of a pixel is applied in a lump (or total) with respect to all luminances under any driving condition. However, the swing range (e.g., a voltage difference between a black gray scale voltage and a white gray scale voltage) of a gray scale voltage for expressing all gray scales is widened, and power consumption is increased …”), Pyo further discloses a method of adjusting suppled black grayscale voltage to select smallest (i.e. optimum black grayscale voltage) one of a plurality of minimum-grayscale test voltages at which the actual brightness of the display panel is less than or equal to the target dark state brightness by determining a minimum-grayscale voltage (black gray scale voltage) required to achieve target dark state brightness via stepwise adjustment of test voltage and repeated measurements of actual display brightness (paragraphs 40-45, “The driving voltage setting device 1000 may set a black gray scale voltage (e.g., an optimum black gray scale voltage) corresponding to a driving characteristic of one or more display devices (e.g., display device DD) for each individual display luminance and provide the black gray scale voltage (e.g., the optimum black gray scale voltage) to the various display devices, such as the display device DD. For illustrative and descriptive convenience, the black gray scale voltage will, hereinafter, be referred to as an optimum black gray scale voltage, and reference will be made to the display device DD … The first voltage determiner 100 may determine a first black gray scale voltage corresponding to a first display luminance of the display device DD based on a variable preliminary black gray scale voltage under a first display luminance condition … The first voltage determiner 100 may provide the preliminary black gray scale voltage to the display device DD. The first voltage determiner 100 may reset the preliminary black gray scale voltage by comparing a preset threshold black luminance and a measured luminance received from the luminance measurer 300 under the first display luminance condition … The first voltage determiner 100 may search for an optimum black gray scale voltage by repeating the comparing of the threshold black luminance and the measured luminance and the resetting of the preliminary black gray scale voltage.”) wherein the step of adjusting the minimum-grayscale test voltage comprises: comparing the actual brightness of the display panel with the target dark state brightness (paragraph 104, “The comparator 120 may compare the measured luminance ML provided from the luminance measurer 300 with a threshold black luminance LTH, which may be preset or otherwise predetermined. The threshold black luminance LTH may become a reference for determining whether a corresponding display device can sufficiently output a black gray scale. For example, the threshold black luminance LTH may be set to about 0.005 nit”); and when the actual brightness of the display panel is greater than the target dark state brightness, increasing the minimum-grayscale test voltage with a first preset step until the actual brightness of the display panel is less than or equal to the target dark state brightness; or when the actual brightness of the display panel is less than the target dark state brightness, decreasing the minimum-grayscale test voltage with a second preset step until the actual brightness of the display panel is greater than or equal to the target dark state brightness (paragraphs 106, 107, “When the measured luminance ML is the threshold black luminance LTH or less, the voltage controller 140 may decrease the preliminary black gray scale voltage P_VREG. In some exemplary embodiments, the voltage controller 140 may set a new preliminary black gray scale voltage P_VREG by applying a predetermined decrease offset to the preliminary black gray scale voltage P_VREG. The new preliminary black gray scale voltage P_VREG may be again provided to the display device DD. A measured luminance ML caused by the new preliminary black gray scale voltage P_VREG may be again provided to the comparator 120. The comparator 120 and the voltage controller 140 may repeat the above-described operation. See also fig. 7, 9, paragraphs 99-109, 118-129, see annotated figure below, “the step of determining the first black gray scale voltage VREG1 may include a step (S220) of measuring a luminance of the display device DD based on the a preliminary black gray scale voltage P_VREG under a maximum luminance condition, a step (S240) of comparing the measured luminance ML with a preset threshold black luminance LTH, a step (S260) of decreasing a preliminary black gray scale voltage P_VREG corresponding to the measured luminance ML when the measured luminance ML is the threshold black luminance LTH or less, and a step (S280) of determining, as the first black gray scale voltage VREG1, a value obtained by applying a first margin MV1 to the preliminary black gray scale voltage P_VREG corresponding to the measured luminance ML. … When the measured luminance ML is the threshold black luminance LTH or less, the preliminary black gray scale voltage P_VREG may be decreased (S260). That is, this is a process of determining whether a normal black luminance can be output even at a voltage lower than a previously set preliminary black gray scale voltage P_VREG. In some exemplary embodiments, a new preliminary black gray scale voltage P_VREG may be determined by subtracting a preset subtraction value DV1 from the preliminary black gray scale voltage P_VREG. In an example, the subtraction value DV1 may be about 0.1 V. The measured luminance ML and the threshold black luminance LTH may be compared by decreasing the preliminary black gray scale voltage P_VREG by 0.1 V.”) PNG media_image1.png 688 929 media_image1.png Greyscale In addition, Pyo discloses: obtaining a register setting value corresponding to the analog supply voltage according to the analog supply voltage; and storing the register setting value into a nonvolatile memory of the display driver chip (see Pyo, fig. 8, 10, 12, paragraphs 71, 102, 113, 148, 156, 165 obtaining register setting value VREG1 and VREG2 corresponding to optimum supply voltage / gamma data voltage and storing the register setting into display driver chip, “the controller 50 may include a memory for storing a first black gray scale voltage corresponding to the maximum display luminance and a second black gray scale voltage corresponding to the minimum display luminance”, “The display device DD may store the data, using the memory, etc., and display an image by changing a black gray scale voltage VREG depending on a display luminance DL”, “The memory 52 may store a first black gray scale voltage VREG1 applied to a maximum display luminance and a second black gray scale voltage VREG2 applied to a minimum display luminance. For example, the first and second black gray scale voltages VREG1 and VREG2 may be generated by the driving voltage setting device 1000 of FIG. 1 to be recorded in the memory 52. The memory 52 may receive information on a target display luminance TDL with which the display panel 10 is to emit light. The memory 52 may read the first black gray scale voltage VREG1 and the second black gray scale voltage VREG2, based on the target display luminance TDL. The first black gray scale voltage VREG1 may be provided to the first calculator 54, and the second black gray scale voltage VREG2 may be provided to the second calculator 56.”, paragraph 54, the memory may be a nonvolatile memory). Both Hei and Pyo disclose adjusting suppled voltage to display driver in order to achieve target dark state brightness. Pyo additionally motivation to use the smallest minimum-grayscale voltage possible while meeting display requirement, and discloses method to stepwise adjust suppled minimum-grayscale voltage through repeated measurement and predetermined adjust procedure in order to obtain such smallest minimum-grayscale voltage. It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of adjusting supplied voltage to achieve target display condition, as disclosed by Pyo, into the device of Hei, to formulate a predetermined procedure of methodically adjusting supply voltage by increasing or decreasing supplied voltage until required display condition is met and storing determined suppled voltage as optimum dark stage voltage, such that the first main gamma voltage, as well as the corresponding analog supply voltage are methodically determined and stored, to constitute (from claim 1:) :) using a smallest one of a plurality of minimum-grayscale test voltages at which the actual brightness of the display panel is less than or equal to the target dark state brightness as the first main gamma voltage, obtaining a register setting value corresponding to the analog supply voltage according to the analog supply voltage, and storing the register setting value into a nonvolatile memory of the display driver chip; and (from claim 2:) wherein the step of adjusting the minimum-grayscale test voltage comprises: comparing the actual brightness of the display panel with the target dark state brightness; and when the actual brightness of the display panel is greater than the target dark state brightness, increasing the minimum-grayscale test voltage with a first preset step until the actual brightness of the display panel is less than or equal to the target dark state brightness; or when the actual brightness of the display panel is less than the target dark state brightness, decreasing the minimum-grayscale test voltage with a second preset step until the actual brightness of the display panel is greater than or equal to the target dark state brightness, wherein the step of using the minimum-grayscale test voltage at which the actual brightness of the display panel reaches the target dark state brightness as the first main gamma voltage comprises: using a smallest one of a plurality of minimum-grayscale test voltages at which the actual brightness of the display panel is less than or equal to the target dark state brightness as the first main gamma voltage, such is incorporation of a known technique into a known device to yield predictable result, the result would have been predictable and would facilitate efficiently determine analog supply voltage to achieve target dark state for display device, while allowing reduced power consumption. Regarding claim 7, Hei in view of Pyo discloses (from claim 5:) the method according to claim 1, further comprising: storing gamma data voltages into the display driver chip (see combination of Hei and Pyo as made in rejection of claim 1, the combination determine optimum first main gamma voltage and analog supply voltage via measuring actual brightness of test voltage, additionally see Pyo, fig. 8, 10, 12, paragraphs 71, 102, 113, 148, 156, 165 obtaining register setting value VREG1 and VREG2 corresponding to optimum supply voltage / gamma data voltage and storing the register setting into display driver chip, “the controller 50 may include a memory for storing a first black gray scale voltage corresponding to the maximum display luminance and a second black gray scale voltage corresponding to the minimum display luminance”, “The display device DD may store the data, using the memory, etc., and display an image by changing a black gray scale voltage VREG depending on a display luminance DL”, “The memory 52 may store a first black gray scale voltage VREG1 applied to a maximum display luminance and a second black gray scale voltage VREG2 applied to a minimum display luminance. For example, the first and second black gray scale voltages VREG1 and VREG2 may be generated by the driving voltage setting device 1000 of FIG. 1 to be recorded in the memory 52. The memory 52 may receive information on a target display luminance TDL with which the display panel 10 is to emit light. The memory 52 may read the first black gray scale voltage VREG1 and the second black gray scale voltage VREG2, based on the target display luminance TDL. The first black gray scale voltage VREG1 may be provided to the first calculator 54, and the second black gray scale voltage VREG2 may be provided to the second calculator 56.”, paragraph 54, the memory may be a nonvolatile memory). Regarding claim 11, Hei in view of Pyo discloses a display apparatus, comprising a display panel (Pyo, fig. 2, paragraph 59, display panel 10) and a display driver chip (Pyo, fig. 2, paragraph 66, data driver 40 and associated controller 50), wherein the display driver chip is configured to receive an analog supply voltage (Pyo, fig. 2, paragraph 67, “The controller 50 may control a low-power voltage ELVSS and a black gray scale voltage VREG to be controlled according to display luminances. In some exemplary embodiments, the controller 50 may provide the data driver 40 with a black gray scale voltage VREG corresponding to a current display luminance. In some exemplary embodiments, the controller 50 may provide the data driver 40 with a command corresponding to the black gray scale voltage VREG. The data driver may include a component for generating the black gray scale voltage VREG, and generate the black gray scale voltage VREG corresponding to the command”), wherein the analog supply voltage is obtained according to the method according to claim 1 (see rejection of claim 1 above, obtaining first main gamma voltage and analoy supply voltage), and the display driver chip is electrically connected to the display panel (Pyo, fig. 2, controller 50, data driver 40, emission driver 30, scan driver 20 and power supply 60 electrically connected to display panel). Regarding claim 12, Hei in view of Pyo discloses the display apparatus according to claim 11, further comprising a power management chip electrically connected to the display driver chip, wherein the power management chip is configured to provide the analog supply voltage to the display driver chip (see Pyo, fig. 2, paragraphs 67, “The controller 50 may control a low-power voltage ELVSS and a black gray scale voltage VREG to be controlled according to display luminances. In some exemplary embodiments, the controller 50 may provide the data driver 40 with a black gray scale voltage VREG corresponding to a current display luminance. In some exemplary embodiments, the controller 50 may provide the data driver 40 with a command corresponding to the black gray scale voltage VREG. The data driver may include a component for generating the black gray scale voltage VREG, and generate the black gray scale voltage VREG corresponding to the command”, herein the controller 50 and data driver 40 perform the function of power management chip as well as display driver chip). Regarding claim 13, Hei in view of Pyo discloses the display apparatus according to claim 11, wherein the display driver chip comprises a register, the register stores a register setting value, and the power management chip is configured to provide the analog supply voltage to the display driver chip according to the register setting value (Pyo, fig. 2, controller 50 and data driver 40, paragraph 67, “paragraphs 67, “The controller 50 may control a low-power voltage ELVSS and a black gray scale voltage VREG to be controlled according to display luminances. In some exemplary embodiments, the controller 50 may provide the data driver 40 with a black gray scale voltage VREG corresponding to a current display luminance. In some exemplary embodiments, the controller 50 may provide the data driver 40 with a command corresponding to the black gray scale voltage VREG. The data driver may include a component for generating the black gray scale voltage VREG, and generate the black gray scale voltage VREG corresponding to the command” paragraph 165, “the controller 50 may include a memory 52, a first calculator 54, and a second calculator 56. The memory 52 may store a first black gray scale voltage VREG1 applied to a maximum display luminance and a second black gray scale voltage VREG2 applied to a minimum display luminance. For example, the first and second black gray scale voltages VREG1 and VREG2 may be generated by the driving voltage setting device 1000 of FIG. 1 to be recorded in the memory 52. The memory 52 may receive information on a target display luminance TDL with which the display panel 10 is to emit light. The memory 52 may read the first black gray scale voltage VREG1 and the second black gray scale voltage VREG2, based on the target display luminance TDL. The first black gray scale voltage VREG1 may be provided to the first calculator 54, and the second black gray scale voltage VREG2 may be provided to the second calculator 56”, herein the controller 50 and data driver 40 perform the function of power management chip as well as display driver chip). Claims 4, 14, 16, 17, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Hei in view of Pyo, as applied in claim 1 above, and in further view of Wang, CN 115938305 A (hereinafter “Wang”). Regarding claim 4, Hei in view of Pyo discloses the method according to claim 1. Hei in view of Pyo further discloses wherein a value VGMP of the first main gamma voltage and a value VAVDD of the analog supply voltage satisfy: VAVDD=VGMP+C (Hei, col. 12, ln. 42-64, “For example, the third data voltage corresponding to the first display panel may be 6.5V, and the third data voltage corresponding to the second display panel may be 6.8V, then the AVDD corresponding to the first display panel may be AVDD=6.5V+ΔV1, and the AVDD corresponding to the second display panel may be AVDD=6.8V+ΔV1. The specific value of ΔV1 may be determined based on the rules of DDIC, and may be a constant value” Herein the third data voltage correspond to the claimed Vgmp and AVDD corresponding to claimed Vavdd,j and ΔV1 corresponds to claimed constant value C). Hei in view of Pyo only does not specifically discloses specific value of C wherein 0.3 V≤C≤0.5 V. In similar field of endeavor of display device with gamma voltage generation module configured to generate supply voltage AVDD and VGMP for display driving (paragraphs 5-7, display device with reference voltage, gamma voltage, and gray scale voltage generation modules), Wang discloses a predetermined offset C between AVDD and VGMP may be configured as 0.3 V (paragraph 64, “Illustratively, when the preset bias voltage is 0.3V, AVDD-VGMP ≧ 0.3V and AVDD-VGSP ≧ 0.3V should be satisfied”). Since Applicant has failed to disclose that specifying the offset between AVDD and VGMP to be between 0.3V and 0.5V provides any distinct advantage, is used for a particular purpose, or solves a stated problem, it would have been an obvious matter of design choice for one of ordinary skill in the art at the time of filing to incorporate the concept setting particular value of offset between AVDD and VGMP to be between 0.3V and 0.5V, such as disclosed by Wang, into display device of Hei in view of Pyo, to constitute wherein a value VGMP of the first main gamma voltage and a value VAVDD of the analog supply voltage satisfy: VAVDD=VGMP+C wherein 0.3 V≤C≤0.5 V, the result would have been predictable and the function of allowing display device to generate AVDD and VGMP to facilitate display driving would have been the same. Regarding claims 14 and 16, Hei in view of Pyo discloses a display apparatus, comprising: a display panel (Pyo, fig. 2, paragraph 59, display panel 10); a display driver chip (Pyo, fig. 2, paragraph 66, data driver 40 and associated controller 50 as the display driver chip); and a power management chip (Pyo, fig. 2, paragraphs 64-67, data driver 40 and associated controller 50, power supply 60 together serving as power management chip), wherein the display driver chip comprises a nonvolatile memory (Pyo, fig. 8, 10, 12, paragraphs 71, 102, 113, 148, 156, 165 obtaining register setting value VREG1 and VREG2 corresponding to optimum supply voltage / gamma data voltage and storing the register setting into display driver chip, “the controller 50 may include a memory for storing a first black gray scale voltage corresponding to the maximum display luminance and a second black gray scale voltage corresponding to the minimum display luminance”, “The display device DD may store the data, using the memory, etc., and display an image by changing a black gray scale voltage VREG depending on a display luminance DL”, “The memory 52 may store a first black gray scale voltage VREG1 applied to a maximum display luminance and a second black gray scale voltage VREG2 applied to a minimum display luminance. For example, the first and second black gray scale voltages VREG1 and VREG2 may be generated by the driving voltage setting device 1000 of FIG. 1 to be recorded in the memory 52. The memory 52 may receive information on a target display luminance TDL with which the display panel 10 is to emit light. The memory 52 may read the first black gray scale voltage VREG1 and the second black gray scale voltage VREG2, based on the target display luminance TDL. The first black gray scale voltage VREG1 may be provided to the first calculator 54, and the second black gray scale voltage VREG2 may be provided to the second calculator 56.”, paragraph 54, the memory may be a nonvolatile memory), a first main gamma voltage generation circuit (paragraphs 40-45, “The driving voltage setting device 1000 may set a black gray scale voltage (e.g., an optimum black gray scale voltage) corresponding to a driving characteristic of one or more display devices (e.g., display device DD) for each individual display luminance and provide the black gray scale voltage (e.g., the optimum black gray scale voltage) to the various display devices, such as the display device DD. For illustrative and descriptive convenience, the black gray scale voltage will, hereinafter, be referred to as an optimum black gray scale voltage, and reference will be made to the display device DD … The first voltage determiner 100 may determine a first black gray scale voltage corresponding to a first display luminance of the display device DD based on a variable preliminary black gray scale voltage under a first display luminance condition … The first voltage determiner 100 may provide the preliminary black gray scale voltage to the display device DD. The first voltage determiner 100 may reset the preliminary black gray scale voltage by comparing a preset threshold black luminance and a measured luminance received from the luminance measurer 300 under the first display luminance condition … The first voltage determiner 100 may search for an optimum black gray scale voltage by repeating the comparing of the threshold black luminance and the measured luminance and the resetting of the preliminary black gray scale voltage”, herein the optimum black gray scale voltage corresponds to the claimed first main gamma voltage) wherein the display driver chip sends a signal to the power management chip according to a parameter in the nonvolatile memory, the power management chip generates an analog supply voltage and supplies the analog supply voltage to the display driver chip, and a magnitude of the analog supply voltage is determined by the signal (See combination of Hei in view of Pyo in rejection of claim 1 above for determination of analog supply voltage, the analog supply voltage AVGG corresponding to determined first gamma main voltage VGMP, Hei, col. 12, ln. 42-64, see also Pyo, fig. 2, controller 50 and data driver 40, paragraph 67, “paragraphs 67, “The controller 50 may control a low-power voltage ELVSS and a black gray scale voltage VREG to be controlled according to display luminances. In some exemplary embodiments, the controller 50 may provide the data driver 40 with a black gray scale voltage VREG corresponding to a current display luminance. In some exemplary embodiments, the controller 50 may provide the data driver 40 with a command corresponding to the black gray scale voltage VREG. The data driver may include a component for generating the black gray scale voltage VREG, and generate the black gray scale voltage VREG corresponding to the command” paragraph 165, “the controller 50 may include a memory 52, a first calculator 54, and a second calculator 56. The memory 52 may store a first black gray scale voltage VREG1 applied to a maximum display luminance and a second black gray scale voltage VREG2 applied to a minimum display luminance. For example, the first and second black gray scale voltages VREG1 and VREG2 may be generated by the driving voltage setting device 1000 of FIG. 1 to be recorded in the memory 52. The memory 52 may receive information on a target display luminance TDL with which the display panel 10 is to emit light. The memory 52 may read the first black gray scale voltage VREG1 and the second black gray scale voltage VREG2, based on the target display luminance TDL. The first black gray scale voltage VREG1 may be provided to the first calculator 54, and the second black gray scale voltage VREG2 may be provided to the second calculator 56”, herein the controller 50 and data driver 40 perform the function of power management chip as well as display driver chip”, see also paragraphs 99-109, 118-129, detailed steps on obtaining the analog supply voltage corresponding to black gray scale voltage in order to properly display black gray scale while conserving power, paragraphs 127-130, analogy supply voltage obtained by adding a margin MV1 to optimum black gray scale voltage determined by the display device), and wherein the first main gamma voltage generation circuit generates, based on the analog supply voltage, a gamma voltage corresponding to a grayscale 0, and wherein among a plurality of gamma voltage generated by the first main gamma voltage generation circuit, a minimum gamma voltage at which an actual brightness of the display panel is less than or equal to target drake state brightness is used as a first main gamma voltage of all sub-pixels of the display panel, and the nonvolatile memory is configured to store a register setting value corresponding to the analog supply voltage (Hei, col. 5, ln. 41- col. 6, ln. 14, fig. 5, “As shown in FIG. 5, the step S10 “adjusting the data voltages of at least two sub-pixels to be different when performing the zero grayscale display” may include: S101: determining a corresponding data voltage when a sub-pixel of the at least two sub-pixels performs the 0 gray-scale display. The data voltage may be configured to allow the brightness of the sub-pixel to meet dark state requirements when the sub-pixel performs the zero grayscale display.” “Because the data voltages of the sub-pixels may be different when performing the zero grayscale display, and there may be multiple sub-pixels in the display panel, the corresponding data voltage may need to be determined before each sub-pixel performs the zero grayscale display. For example, the first data voltage Va1 may be used for driving the zero grayscale display, or the second data voltage Va2 may be used for driving the zero grayscale display, or the n-th data voltage Van may be used for driving the zero grayscale display, and the brightness of the sub-pixel in the zero grayscale display may need to meet the dark state requirements when the determined data voltage is used for driving. For example, it may be necessary to ensure that the sub-pixel may not glow when the zero grayscale display is performed. In one embodiment, the brightness that meets the dark state requirements during the zero grayscale display may be less than or equal to 0.001 nit.”, steps in fig. 12-14, col. 10, ln. 30-41, col. 11, ln. 31-41, col 11, ln. 65 – col. 12, ln 41 “the third data voltage Va3 may be used as the data voltage when the sub-pixel performs the zero grayscale display. Under the action of the third data voltage Va3, the brightness of the sub-pixel when performing the zero grayscale display may meet the dark state requirements. In general, all sub-pixels in the display panel may use the third data voltage Va3 as the data voltage when the sub-pixels perform the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirements” … “It can be seen that the third data voltage Va3 may be the maximum data voltage when the display panel performs the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirement”, herein the voltage Va3 correspond to the first main gamma voltage that would ensure driving of minimum grayscale / zero grayscale display; Pyo, paragraph 40-45, “The driving voltage setting device 1000 may set a black gray scale voltage (e.g., an optimum black gray scale voltage) corresponding to a driving characteristic of one or more display devices (e.g., display device DD) for each individual display luminance and provide the black gray scale voltage (e.g., the optimum black gray scale voltage) to the various display devices, such as the display device DD. For illustrative and descriptive convenience, the black gray scale voltage will, hereinafter, be referred to as an optimum black gray scale voltage”, Hei, col. 5, ln. 6-16, col. 12, ln. 42-64, the zero grayscale display being to gamma voltage corresponding to a grayscale 0, “It can be seen that the third data voltage Va3 may be the maximum data voltage when the display panel performs the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirement”, Hei, In steps as outlined in fig. 5-7 of Hei reference, it is specifically disclosed that the voltage to drive display panel to allow subpixel to display 0 grayscale need to be ascertained via measurement of actual brightness of display panel, such that the dark state requirement for the 0 grayscale is allowing the actual brightness of the subpixel to be smaller or equal to 0.001 nit, and data voltage is determined via a measurement and adjustment process. See Hei, fig. 7, col. 7, ln. 47 – col. 8, ln. 35: “The target brightness of the display panel during the zero grayscale display may be firstly determined. The target brightness may indicate that the brightness during the zero grayscale display may meet the dark state requirement, for example, the target brightness may be less than or equal to 0.001 nit. Applying a data voltage to the sub-pixel in the central area of the display panel to make them be turned on may include but not limited to detect the actual brightness of the sub-pixel in the central area of the display panel through a test probe. The data voltage applied to the sub-pixel may be adjusted based on the collected actual brightness such that the actual brightness may be less than or equal to the data voltage under the target brightness; and the data voltage may be determined as the first data voltage Va1 in one embodiment of the present disclosure. It can be seen that the first data voltage Va1 may be smaller than the voltage corresponding to the zero grayscale in the prior art, and the first data voltage Va1 may be the minimum data voltage when the sub-pixel performs the zero grayscale display and the brightness may meet the dark state requirement. For example, the voltage difference between the first data voltage Va1 and the data voltage corresponding to the 1 grayscale may be reduced; and the variation range of the data voltage corresponding to the decimal grayscale between the zero grayscale and the 1 grayscale may also be decreased. Accordingly, in the process of adjusting the brightness of the display panel, if the grayscale is compensated to be below the 1 grayscale, the change of the data voltage may be relatively small, and the color cast problem may not occur, thereby improving the display uniformity of the display panel.” See also, Hei, fig. 13, 14, col. 11 ln. 31-41, col. 12, ln. 24-35, “Applying a data voltage to the determined target sub-pixel to make it light up may include but not limited to collect the current display image of the display panel through a high-precision image capturing device, and determine the actual brightness of the target sub-pixel based on the displayed image, and based on the collected actual brightness, the voltage value of the data voltage applied to the target sub-pixel may be adjusted such that the data voltage when the actual brightness is less than or equal to the target brightness may be determined as the to-be-determined third data voltage Va3 in the embodiment of the present disclosure”, in col. 10, ln. 38-65, it is described that voltage Va3 (in which Va3 is largest among Va1, Va2 and Va3, Va1< Va2 <Va3) meet dark state requirement for all sub-pixels, however, for pixels that does not require Va3, smaller gamma voltage such as Va1 and Va2 may be used based on actual brightness measurement (“In general, all sub-pixels in the display panel may use the third data voltage Va3 as the data voltage when the sub-pixels perform the zero grayscale display, and the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirements. However, in this application, all sub-pixels whose negative grayscale compensation value is less than −8 may use the third data voltage Va3 as the data voltage when the sub-pixel performs the zero grayscale display, and all sub-pixels whose negative gray-scale compensation value is greater than or equal to −8 and less than −6 may use the second data voltage Va2 as the data voltage when the sub-pixel performs the zero grayscale display, and all sub-pixels whose negative gray-scale compensation values are greater than or equal to −6 may use the first data voltage Va1 as the data voltage when the sub-pixel performs the zero grayscale display. Because the voltage value of the first data voltage Va1 may be smaller than the voltage value of the second data voltage Va2 and the voltage value of the third data voltage Va3 may be smaller than the voltage value of the third data voltage Va3, data voltages with different voltage values may be used to drive the sub-pixels with different the negative grayscale compensation value ranges to perform the zero grayscale display. On the premise that the brightness of the sub-pixels when performing the zero grayscale display may meet the dark state requirements, the display power consumption of the display panel may also be saved to achieve the purpose of reducing the power consumption”;. In other word, the smaller one of a plurality of minimum-grayscale value is selected for subpixels to be used as first main gamma voltage. Hence, Hei discloses the motivation and general concept of using the lower/smaller minimum-grayscale voltage among plurality of minimum-grayscale voltages as the first gamma voltage, and Pyo is cited for the specific method of decreasing the minimum-grayscale voltage in a step-wise manner until the smallest is found See also Pyo, fig. 8, 10, 12, paragraphs 71, 102, 113, 148, 156, 165 obtaining register setting value VREG1 and VREG2 corresponding to optimum supply voltage / gamma data voltage and storing the register setting into display driver chip, “the controller 50 may include a memory for storing a first black gray scale voltage corresponding to the maximum display luminance and a second black gray scale voltage corresponding to the minimum display luminance”, “The display device DD may store the data, using the memory, etc., and display an image by changing a black gray scale voltage VREG depending on a display luminance DL”, “The memory 52 may store a first black gray scale voltage VREG1 applied to a maximum display luminance and a second black gray scale voltage VREG2 applied to a minimum display luminance. For example, the first and second black gray scale voltages VREG1 and VREG2 may be generated by the driving voltage setting device 1000 of FIG. 1 to be recorded in the memory 52. The memory 52 may receive information on a target display luminance TDL with which the display panel 10 is to emit light. The memory 52 may read the first black gray scale voltage VREG1 and the second black gray scale voltage VREG2, based on the target display luminance TDL. The first black gray scale voltage VREG1 may be provided to the first calculator 54, and the second black gray scale voltage VREG2 may be provided to the second calculator 56.”, paragraph 54, the memory may be a nonvolatile memory). Hei in view of Pyo does not disclose in particular (from claim 14:) the display driver chip comprises a second gamma voltage generation circuit, and (from claim 16:) wherein the second gamma voltage generation circuit generates, based on the gamma voltage corresponding to the grayscale 0, gamma voltages corresponding to grayscales 1 to 254. In similar field of endeavor of display generating gamma voltages based on analog supply voltage, Wang discloses the display driver chip further comprising a second gamma voltage generation circuit, wherein the second gamma voltage generation circuit generates, based on the gamma voltage corresponding to the grayscale 0, gamma voltages corresponding to grayscales 1 to 254 (Wang, fig. 2, paragraphs 47-59, gamma voltage generation module 20 and gray scale generation module, paragraphs 53, 55, 56, gamma voltage VGMP corresponding to grayscale 0 is based on AVDD, and gamma voltages corresponding to grayscales 1 to 254 is generated based on supplied VGMP by module 30). It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of second gamma voltage generation circuit such as disclosed by Wang into the device of Hei in view of Pyo to further constitute a second gamma voltage generation circuit, wherein the second gamma voltage generation circuit generates, based on the gamma voltage corresponding to the grayscale 0, gamma voltages corresponding to grayscales 1 to 254, such is incorporation of a known technique into known device to yield predictable result, the result would have been predictable and would facilitate generation of gamma data voltages corresponding different digital image signal levels to be utilized by the display panel during image displaying process. Regarding claim 17, Hei in view of Pyo and Wang discloses the display apparatus according to claim 14, wherein the magnitude of the analog supply voltage is greater than a magnitude of the gamma voltage corresponding to the grayscale 0, and the magnitude of the gamma voltage corresponding to the grayscale 0 is greater than magnitudes of gamma voltages corresponding to grayscales 1 to 254 (Hei, col. 12, ln. 42-64, analog supply voltage is greater than gamma voltage corresponding to zero gray scale gamma voltage, Wang, paragraphs 52-59, gamma voltage VGMP corresponding to grayscale 0 is based on AVDD, and gamma voltages corresponding to grayscales 1 to 254 is generated based on supplied VGMP by module 30, wherein AVDD > VGMP > gamma voltages corresponding to grayscales 1-254). Regarding claim 18, Hei in view of Pyo and Wang discloses the display apparatus according to claim 17, wherein the magnitude VAVDD of the analog supply voltage and the magnitude of the gamma voltage corresponding to the grayscale 0 satisfy: VAVDD=VGMP+C, and 0.3 V≤ C≤0.5 V (Wang, paragraph 64, “Illustratively, when the preset bias voltage is 0.3V, AVDD-VGMP ≧ 0.3V and AVDD-VGSP ≧ 0.3V should be satisfied”). Claims 6, 8, 9 are rejected under 35 U.S.C. 103 as being unpatentable over Hei in view of Pyo, as applied in claim 1 above, and in further view of Chen, CN 115035849 A (hereinafter “Chen”). Regarding claims 6, 8, and 9. Hei in view of Pyo discloses the method according to claim 5, wherein, after obtaining the register setting value and before storing the register setting value into the nonvolatile memory of the display driver chip, the method further comprises: inputting the register setting value into a register of the display driver chip (Pyo, fig. 11, step S460, provide black gray scale voltages to display device, paragraph 142, 156 “the step of determining the black gray scale voltages may include a step (S420) of determining a value obtained by applying a preset offset to the first black gray scale voltage VREG1 as a third black gray scale voltage VREG3 corresponding to a dimming change display luminance DDL, a step (S440) of calculating black gray scale voltages VREG corresponding to display luminances DL between a minimum display luminance LDL and the dimming change display luminance DDL by linearly interpolating, with a log scale, a relationship between the dimming change display luminance DDL and the third black gray scale voltage VREG3 and a relationship between the minimum display luminance LDL and the second black gray scale voltage VREG2, and a step (S460) of providing the display device DD with black gray scale voltages VREG including the first and second black gray scale voltages VREG1 and VREG2 … Data in which black gray scale voltages VREG with respect to all display luminances DL are set may be provided (recorded) to (in) the display device DD (S460). In some exemplary embodiments, the driving voltage setting device 1000 of FIG. 1 may provide (record), to (in) the display device DD, data in which black gray scale voltages VREG with respect to all display luminances DL are set through the above-described procedure). Hei in view of Pyo does not disclose in particular, (from claim 6:) performing gamma correction on the display panel to obtain gamma data voltages, and (from claim 8) wherein the step of performing gamma correction on the display panel to obtain the gamma data voltage comprises: providing data voltages corresponding to a plurality of grayscales to the display panel; and acquiring actual brightness of the display panel at each of the plurality of grayscales, and (from claim 9) wherein, when the actual brightness of the display panel reaches target brightness corresponding to each of the plurality of grayscales, using the data voltage corresponding to each of the plurality of grayscales as the gamma data voltage corresponding to each of the plurality of grayscales. In similar field of endeavor, Chen discloses a similar display device with gamma voltage generator and adjustable supply voltage to generate display grayscale voltages (Chen, paragraph 50, “s120, determining a first target reference voltage corresponding to each target brightness according to the gray scale register parameter values corresponding to all the luminous pixels under each target brightness; the first target reference voltage is between the first reference voltage and the second reference voltage”). Chen additionally discloses display device that performs the steps of determining gamma data voltages and register values (referred as gamma debugging/compensation) for various different display luminance settings. Wherein the process is carried out by measuring actual display brightness under different grayscales and determining whether actual display brightness falls within predetermined range of target brightness (See Chen paragraphs 48-71, 102-112) details on steps of determining gray scale data voltages register parameter for all grayscale binding points based on measurement of actual display brightness under different grayscale binding points). In particular Chen discloses performing gamma correction on the display panel to obtain gamma data voltages, wherein the step of performing gamma correction on the display panel to obtain the gamma data voltage comprises: providing data voltages corresponding to a plurality of grayscales to the display panel (paragraphs 51, 55 “S130, respectively carrying out Gamma debugging on the image pictures under the multiple gray scale bindings according to the first target reference voltage and the second reference voltage corresponding to each target brightness so as to obtain gray scale register parameter values respectively corresponding to all luminous pixels of each target brightness under the multiple gray scale bindings” … “When the Gamma debugging is carried out on the image picture corresponding to the first gray scale binding point under certain target brightness, the Gamma voltage value received by each luminous pixel can be adjusted between the first reference voltage and the second reference voltage by controlling the numerical value of the gray scale register corresponding to each luminous pixel in the display panel. For example, when there is a correlation between the value of the gray-scale register and the Gamma voltage value, the value of the gray-scale register may be increased or decreased in a single direction, so that the magnitude of the Gamma voltage value changes in a single direction between the first reference voltage and the second reference voltage. In one example, the first reference voltage may be a VGSP voltage, the second reference voltage may be a VGMP voltage, VGSP < VGMP, and the adjustment range of the Gamma voltage is between VGSP and VGMP.”); and acquiring actual brightness of the display panel at each of the plurality of grayscales (paragraph 56, “In the process of performing Gamma debugging on the image picture of the first gray scale binding point under a certain target brightness, the value of the gray scale register corresponding to each light-emitting pixel can be adjusted, so that the Gamma voltage value is changed from the VGSP voltage to the VGMP voltage, and the actual display parameters of the image picture displayed by the display panel are obtained in real time in the process of changing the Gamma voltage value. After determining the target display parameter corresponding to the first gray scale tie point under the target brightness, the actual display parameter may be compared with the target display parameter to determine whether the actual display parameter is consistent with the target display parameter or whether the parameter difference satisfies a preset range. In one example, the device may acquire the actual display parameters of the image frame by shooting the display area of the display panel through a CCD camera, a color analyzer, or the like, so as to obtain the actual display parameters of the image frame.”), wherein, when the actual brightness of the display panel reaches target brightness corresponding to each of the plurality of grayscales, using the data voltage corresponding to each of the plurality of grayscales as the gamma data voltage corresponding to each of the plurality of grayscales (paragraph 57, “When the difference between the actual display parameter and the target display parameter of each light-emitting pixel meets the requirement, the gray scale register parameter value corresponding to each light-emitting pixel at the moment can be used as the target brightness, and a group of gray scale register parameter values of the image picture under the first gray scale binding point can be used as the Gamma debugging result under the target brightness. The display parameters may include brightness values, color coordinates, and the like”). It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of adjusting perform gamma correction on display panel to obtain gamma data voltages, such as disclosed by Chen, into display device of Hei in view of Pyo, to constitute (from claim 6:) performing gamma correction on the display panel to obtain gamma data voltages, and (from claim 8) wherein the step of performing gamma correction on the display panel to obtain the gamma data voltage comprises: providing data voltages corresponding to a plurality of grayscales to the display panel; and acquiring actual brightness of the display panel at each of the plurality of grayscales, (from claim 9) wherein, when the actual brightness of the display panel reaches target brightness corresponding to each of the plurality of grayscales, using the data voltage corresponding to each of the plurality of grayscales as the gamma data voltage corresponding to each of the plurality of grayscales, such is incorporation of a known technique into a know device to yield predictable result, the result would have been predictable and would additionally improve display quality by compensating and correcting display brightness under different grayscales, while allow the display device to perform the intended function of displaying image according to grayscale data. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Hei in view of Pyo and Chen, as applied in claim 6 above, and in further view of Aflatooni et al., US 20160284275 A1 (hereinafter “Aflatooni”) and Deyama et al., US 20120038688 A1 (hereinafter “Deyama”). Regarding claim 10, Hei in view of Pyo and Chen discloses the method according to claim 6. Hei in view of Pyo and Chen does not disclose wherein after storing the register setting value into the nonvolatile memory of the display driver chip, the method further comprises: causing the display panel to emit light based on the register setting value and the first main gamma voltage; acquiring the actual brightness of the display panel; reading back the register setting value and the first main gamma voltage in the display driver chip; and powering off when the actual brightness is less than or equal to the target dark state brightness and when the register setting value and the first main gamma voltage are correct. It is noted however, the steps in claim 10 corresponds to a confirmation or recalibration steps which repeats original steps of determining gamma voltage via acquired actual brightness, in which the display device as in combination of Hei in view of Pyo and Chen already perform in original method of determination gamma voltage (see rejection in claims 1, 2 above for combination, see also Pyo, paragraphs 71, 102, 113, 148, 156, 165, storing and reading of memory on setting of first main gamma voltage, Hei, fig. 13, 14, col. 11 ln. 31-41, col. 12, ln. 24-35, Pyo, paragraphs 40-45, acquiring the actual brightness of display panel and compare with target and/or stored value). In similar field of display art, Aflatooni disclose the concept of analog voltage data may be re-calibrated to maintain accuracy (paragraphs 6, 7, “Manually and automatically controlled display brightness settings also are used to adjust how brightly organic light-emitting diode displays operate. Organic light-emitting diode displays produce light by applying current to emissive organic materials. Conventionally, analog data signals are driven to corresponding thin-film transistors that pass the current to the emissive organic materials. The analog data signals are typically derived based on a set of reference voltages values, which are calibrated for specific display brightness settings. The display may include a display driver having a cascaded gamma circuit for generating the set of reference voltage values. In particular, the display brightness settings can be adjusted to dim the brightness of the display by scaling the references voltages using the cascaded gamma circuit. As the voltage scales, the display needs to be re-calibrated to maintain the accuracy of the color that is being displayed.”) It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of performing recalibration or confirmation steps of determining display analog supply voltage, such as disclosed by Aflatooni, into the display device of Hei in view of Pyo and Chen, such that the display device of Hei in view of Pyo and Chen performs a confirmation step of reloading setting parameter regarding supply voltage and gamma voltage previously determined (via steps as prescribed in rejection of claims 1, 2, above), and validate the previously determined setting parameters are correct, to constitute wherein after storing the register setting value into the nonvolatile memory of the display driver chip, the method further comprises: causing the display panel to emit light based on the register setting value and the first main gamma voltage; acquiring the actual brightness of the display panel; reading back the register setting value and the first main gamma voltage in the display driver chip, such is application of a known technique into known device to yield predictable result, the result would have been predictable and would confirm accuracy of display function based on previously determined analog supply and gamma voltages of display device. Hei in view of Pyo, Chen, and Aflatooni does not disclose in particular the additional steps of powering off of display device after ensuring that parameters are correct, that is, powering off when the actual brightness is less than or equal to the target dark state brightness and when the register setting value and the first main gamma voltage are correct. Examiner take notice that a device may be powered off after intended operation has been performed or terminated. Furthermore, in similar field of display art, it is known that display device may be powered off after calibration steps are performed, see Deyama, paragraph 127: “calibration can be performed only by the display device 100, and it is not necessary to use the PC 200. Therefore, the power consumption during calibration can be reduced as a whole system. Further, by turning off the monitor (display device) after the calibration is completed, it is possible to save power in the entire system”. It would have been obvious to one of ordinary skill in the art at the time of filing to incorporate the concept of powering off display device after calibration step are finished, such as disclosed by Deyama, into the display device of Hei in view of Pyo, Chen, and Aflatooni, to constitute powering off when the actual brightness is less than or equal to the target dark state brightness and when the register setting value and the first main gamma voltage are correct, such is incorporation of a known technique into a know device to yield predictable result, the result would have been predictable and would allow display device to conserve power when no operation is performed. Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Hei in view of Pyo and Wang, as applied in rejection of claim 14 above, and in further view of Kim et al., US 20190362675 A1 (hereinafter “Kim”). Regarding claim 15, Hei in view of Pyo and Wang discloses the display apparatus according to claim 14. Regarding signal configuring the magnitude of analog supply voltage, Hei in view of Pyo does not discloses specific of type of signal, wherein the signal is a pulse signal, and the magnitude of the analog supply voltage is indicated by a number of pulses of the pulse signal. In similar field of endeavor of display device, Kim discloses that magnitude of analogy supply voltage of display device may be controlled via a pulse signal via number of pulses (paragraph 57, “The analog supply voltage generator 162 may control the voltage level of the analog supply voltage AVDD based on the number of pulses in the first voltage control signal VCON1. In some example embodiments, the analog supply voltage generator 162 may decrease the voltage level of the analog supply voltage AVDD as the number of pulses in the first voltage control signal VCON1 increases. In other example embodiments, the analog supply voltage generator 162 may determine the voltage level of the analog supply voltage AVDD corresponding to the number of pulses in the first voltage control signal VCON1 using a lookup table (LUT) that includes the voltage levels of the analog supply voltage AVDD corresponding to the number of pulses in the first voltage control signal VCON1. The analog supply voltage AVDD generated in the analog supply voltage generator 162 may be provided to the display panel driving circuit 140”). Since Applicant has failed to disclose that specifying the signal configuring analog supply voltage to be a signal based on number of pulses provides any distinct advantage, is used for a particular purpose, or solves a stated problem (in contrast with other type of signal not utilizing number of pulses), it would have been an obvious matter of design choice for one of ordinary skill in the art at the time of filing to incorporate the concept setting level of analog supply voltage via numbered pulse signal, such as disclosed by Kim, into the display device of Hei in view of Pyo and Wang, to constitute wherein the signal is a pulse signal, and the magnitude of the analog supply voltage is indicated by a number of pulses of the pulse signal, the result would have been predictable and the function of allowing display device to generate analog supply voltage to facilitate display driving would have been the same. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PEIJIE SHEN whose telephone number is (571)272-5522. The examiner can normally be reached Monday - Friday 10AM - 6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Patrick Edouard can be reached at 5712727603. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PEIJIE SHEN/Examiner, Art Unit 2622 /PATRICK N EDOUARD/Supervisory Patent Examiner, Art Unit 2622
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Prosecution Timeline

Mar 13, 2024
Application Filed
Apr 13, 2025
Non-Final Rejection — §103
Jul 17, 2025
Response Filed
Sep 23, 2025
Final Rejection — §103
Nov 14, 2025
Response after Non-Final Action
Dec 18, 2025
Request for Continued Examination
Jan 16, 2026
Response after Non-Final Action
Mar 07, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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2y 6m
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