Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Group I and Species A (Embodiment of Figs. 1-17, Claims 1-8 and 13) in the reply filed on 06/02/2026 is acknowledged.
Claims 9-12 and 14-18 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention/species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 06/02/2026.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 03/13/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Abbott et al. (US 7,268,415).
As for claim 1, Abbott et al. disclose in Fig. 1 or 2 and the related text a semiconductor device comprising:
a first terminal 110/210;
a semiconductor element 101/201 electrically connected to the first terminal (Fig. 1/2);
a sealing resin 120/220 (col. 4 lines 40-45) that covers the semiconductor element (Fig. 1/2); and
a protective layer 130/140 or 230/240 that covers a portion of the first terminal and has conductivity (Col. 4 lines 50-53), wherein the first terminal includes a first inner portion 104a/204a at least partially covered with the sealing resin (Fig. 1/2), and a first outer portion 104b/204b connected to the first inner portion and protruding from the sealing resin (Fig. 1/2), wherein the protective layer 130/140 or 230/240 covers at least a portion of the first outer portion (Fig. 1/2), wherein the first outer portion includes a first end surface 104a facing in a first direction (fig. 1/2), and wherein the protective layer 130/140/203/240 entirely covers the first end surface (fig. 1/2).
As for claim 2, Abbott et al. disclose the semiconductor device of claim 1, wherein the sealing resin 120/220 includes a first side surface facing in the first direction, and wherein the first outer portion 104b/204b protrudes from the first side surface (Fig. 1/2).
As for claim 3, Abbott et al. disclose the semiconductor device of Claim 2, further comprising: a second terminal (right 110/210) electrically connected to the semiconductor element, wherein the sealing resin 120/220 includes a second side surface facing opposite from the first side surface in the first direction (Fig. 1/2), wherein the second terminal (right 110/210) includes a second inner portion 104a/204a covered with the sealing resin 120/220, and a second outer portion 104b/204b connected to the second inner portion and protruding from the second side surface (Fig. 1/2), wherein the protective layer130/140/230/240 covers at least a portion of the second outer portion (fig. 1/2), wherein the second outer portion includes a second end surface facing opposite from the first end surface in the first direction, and wherein the protective layer 120/220 entirely covers the second end surface (fig. 1/2).
As for claim 4, Abbott et al. disclose the semiconductor device of The semiconductor device of wherein the sealing resin 120/220 includes a third (upper) side surface and a fourth (lower) side surface that face opposite from each other in a second direction perpendicular to the first direction, and wherein each of the first terminal and the second terminal is spaced apart from each of the third side surface and the fourth side surface (fig. 1/2).
Claim Rejections - 35 USC § 103
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Abbott et al. in view of Sano et al. (US 6,603,148).
As for claim 5, Abbott et al. disclose the semiconductor device of claim 4, wherein the semiconductor element 101/201 includes a first electrode and a second electrode 102/202 that are located opposite from each other in a third direction perpendicular to each of the first direction and the second direction, wherein the first electrode is conductively bonded to the first inner portion, and wherein the second electrode is conductively bonded to the second inner portion.
Abbott et al. do not disclose a first electrode and a second electrode are located opposite from each other in a third direction perpendicular to each of the first direction and the second direction, wherein the first electrode is conductively bonded to the first inner portion, and wherein the second electrode is conductively bonded to the second inner portion.
Sano et al. teach in Fig. 1-2 and the related text a first electrode 40c and a second electrode (electrode, col. 5 lines 25-27) are located opposite from each other in a third direction perpendicular to each of the first direction and the second direction (Fig. 1), wherein the first electrode is conductively bonded to the first inner portion 40a/40b, and wherein the second electrode is conductively bonded to the second inner portion 5a (Fig. 1/2).
Abbott et al. and Sano et al. are analogous art because they both are directed packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Abbott et al. because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify Abbott et al. to include the limitations as taught by Sano et al. in order to improve the bonding characteristics.
Claims 6-8 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Abbott et al. in view of Sano et al. and further in view of Chan et al. (US 20090057799).
As for claims 6-8, Abbott et al. disclose the semiconductor device of Claim 5, wherein a first concave portion recessed from the third side surface is formed in the sealing resin, wherein a second concave portion recessed from the fourth side surface is formed in the sealing resin, and wherein the second concave portion overlaps the first concave portion when viewed in the second direction, and wherein the first concave portion includes a first portion and a second portion that are spaced apart from each other in the first direction, wherein the second concave portion includes a third portion and a fourth portion that are spaced apart from each other in the first direction, and wherein each of the first portion and the third portion overlaps the first inner portion when viewed in the second direction.
Chan et al. teach in Fig. 8 and the related text a first concave portion (recess portion on right side of 81) recessed from the third side surface is formed in the sealing resin 81, wherein a second concave portion (recess portion on left side of 81) recessed from the fourth side surface is formed in the sealing resin 81, and wherein the second concave portion overlaps the first concave portion when viewed in the second direction (Fig. 8), and wherein the first concave portion includes a first portion and a second portion that are spaced apart from each other in the first direction (Fig. 8), wherein the second concave portion includes a third portion and a fourth portion that are spaced apart from each other in the first direction (Fig. 8), and wherein each of the first portion and the third portion overlaps the first inner portion when viewed in the second direction (Fig. 8).
Abbott et al., Sano et al. and Chang et al. are analogous art because they both are directed packaging devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify the combined device because they are from the same field of endeavor.
It would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the combined device to include the limitations as taught by Chan et al. in order to enhance bonding (Chan et al. [0051]).
As for claim 13, Abbott et al. disclose the semiconductor device of claim 6, Abbott et al. further disclose the first end surface faces opposite from the first side surface in the first direction (Fig. 1/2), and wherein the first inner portion 104a/204a is entirely covered with the sealing resin 120/220 (Fig. 1/2).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TRANG Q TRAN whose telephone number is (571)270-3259. The examiner can normally be reached on Monday-Thursday (9am-4pm).
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/TRANG Q TRAN/Primary Examiner, Art Unit 2811
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