Prosecution Insights
Last updated: October 04, 2026
Application No. 18/603,969

LAMINATED STRUCTURE AND SEMICONDUCTOR ELEMENT

Non-Final OA §102§103
Filed
Mar 13, 2024
Priority
Mar 13, 2023 — JP 2023-038929
Examiner
GUMEDZOE, PENIEL M
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Flosfia Inc.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
1108 granted / 1331 resolved
+15.2% vs TC avg
Minimal +4% lift
Without
With
+3.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
23 currently pending
Career history
1339
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
43.1%
+3.1% vs TC avg
§102
27.9%
-12.1% vs TC avg
§112
26.0%
-14.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1331 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Information Disclosure Statement The information disclosure statement(s) (IDS) submitted on 03/13/24 & 10/24/24 was/were received by the Examiner before the issuance/mailing date of the first office action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) has/have been considered (except for anything in foreign language non-accompanied by an English translation) by the Examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 8 and 14 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Callegari et al. (US 2004/0071879, cited on IDS). a. Re claim 1, Callegari et al. disclose a laminated structure comprising a first oxide layer 83 (see fig. 28, [0081]; see remaining of disclosure for more details) having a trench structure (opening in 83) on its surface (top surface for example) and a second oxide layer (32, 33, 34 or 35; [0081]) laminated along the trench structure, wherein a difference in thickness between centers of a bottom and a sidewall of the second oxide layer is less than 30% (each of the layers 32, 33, 34 or 35 has a uniform thickness as can be seen in fig. 28, and as such, a difference in thickness between centers of a bottom and a sidewall of the second oxide layer is zero, thus less than 30%; in the alternative, it would have been obvious to have provided each of the layers 32, 33, 34 and 35 to have a uniform thickness in order to avoid or minimize any variability in capacitance along their extent (sidewall and bottom portions) since they are portion of a capacitor, thereby achieving a capacitor with at least an excellent electrical characteristic capacitance-wise; see MPEP 2144.I&II). b. Re claim 8, the second oxide layer (when it is aluminum oxide dielectric layer 34) has a minimum film thickness of 30 nm or larger ([0071] discloses 50 nm). c. Re claim 14, Callegari et al. disclose a semiconductor element (whole structure on fig. 28) comprising the laminated structure according to claim 1, and an electrode 81&82 ([0081]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2-3, 9-11 and 15-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Callegari et al. (US 2004/0071879, cited on IDS). a. Re claim 2, Callegari et al. disclose a laminated structure comprising a first oxide layer 83 (see fig. 28, [0081]; see remaining of disclosure for more details) having a trench structure (opening in 83) on its surface (top surface for example) and a second oxide layer 34 laminated along the trench structure, wherein the second oxide layer contains an oxide of a first metal selected from Group 13 metals in the periodic table ([0081] discloses that oxide layer can be multilayer and made of aluminum oxide and a perovskite oxide ABO3 wherein B is an oxide that contains one of chromium (Cr), molybdenum (Mo) and tungsten (W); aluminum is a metal from group 13) and an oxide of a second metal (ABO3 or the B which is an oxide that contains one of chromium (Cr), molybdenum (Mo) and tungsten (W)) selected from Group 6 metals and Group 9 metals in the periodic table (Cr or Mo or W is a metal from group 6). But Callegari et al. do not appear to explicitly disclose that a difference in a second metal content between regions around centers of a bottom and a sidewall of the second oxide layer is less than 30%. However, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided layers comprised in the dielectric layer 34 to be each uniform in their respective composition and thickness in order to at least insure consistency (i.e. minimize or suppress variability) in their dielectric properties along their sidewall and bottom portions, thereby achieving a capacitor with at least an excellent electrical characteristic capacitance-wise (see MPEP 2144.I&II). It is noted that the previous step does not involve any inventive step and would have been routine for a skilled in the art, and this would have resulted in a difference in a second metal content between regions around centers of a bottom and a sidewall of the second oxide layer being zero or substantially zero, which is less than 30%. b. Re claim 3, Callegari et al. disclose all the limitations of claim 1 as stated above except explicitly that the trench structure comprises a plurality of trench grooves. However, it would have been obvious to one skilled in the art before the effective filing date of the invention to have, via a non-inventive step of duplication of essential working parts (see MPEP 2144.04.VI), provided the trench structure to comprises a plurality of trench groves in order to increase the number of capacitors thereby increasing the integration density of the device on fig. 28. c. Re claim 9, Callegari et al. disclose all the limitations of claim 1 as stated above except explicitly that the trench structure has a groove depth of within a range of 0.1 μm to 10 μm. However, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the trench structure to have a groove depth of within a range of 0.1 μm to 10 μm as desired or required for either the miniaturization of the device or a desired/required electrical/mechanical performance of the trench capacitor (see MPEP 2144.I&II). d. Re claim 10, Callegari et al. disclose all the limitations of claim 1 as stated above except explicitly that the trench structure has a groove width within a range of 0.1 μm to 5.0 μm. However, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the trench structure to have a groove width of within a range of 0.1 μm to 5.0 μm as desired or required for either the miniaturization of the device or a desired/required electrical/mechanical performance of the trench capacitor (see MPEP 2144.I&II). e. Re claim 11, Callegari et al. disclose all the limitations of claim 1 as stated above except explicitly that the first oxide layer is crystalline. However, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the first oxide layer to be crystalline as desired for a given electrical/mechanical performance (i.e. smoother surface, more homogenous dielectric constant) as compared to an amorphous state, wherein doing so would have merely consisted in choosing between two possible states, i.e. crystalline or amorphous, to achieve the said desired electrical/mechanical performance (see MPEP 2143.E and 2144.I&II). f. Re claim 15, Callegari et al. disclose all the limitations of claim 14 as stated above except explicitly for a power conversion device comprising the semiconductor element according to claim 14. However, it is conventionally known in the art to use the device as shown in fig. 28 in power conversion devices. As such, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided a power conversion device comprising the semiconductor element according to claim 14, and this as a non-inventive step of providing the said power conversion device with an essential working part that would benefit from the improvement of said semiconductor element (see MPEP 2144.I&II). g. Re claim 16, Callegari et al. disclose all the limitations of claim 14 as stated above except explicitly for control system comprising the semiconductor element according to claim 14. However, it is conventionally known in the art to use the device as shown in fig. 28 in control systems. As such, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided a control system comprising the semiconductor element according to claim 14, and this as a non-inventive step of providing the said control system with an essential working part that would benefit from the improvement of said semiconductor element (see MPEP 2144.I&II). Allowable Subject Matter Claims 4-7 and 12-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Aoki et al. (US 2008/0012050) disclose a structure similar to the claimed invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PENIEL M GUMEDZOE whose telephone number is (571)270-3041. The examiner can normally be reached M-F: 9:00AM - 5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PENIEL M GUMEDZOE/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Mar 13, 2024
Application Filed
Sep 22, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
87%
With Interview (+3.6%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1331 resolved cases by this examiner. Grant probability derived from career allowance rate.

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