Prosecution Insights
Last updated: July 17, 2026
Application No. 18/604,297

SEMICONDUCTOR DEVICE

Non-Final OA §102
Filed
Mar 13, 2024
Priority
Sep 22, 2023 — JP 2023-158111
Examiner
MALEK, MALIHEH
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kabushiki Kaisha Toshiba
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
83%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
477 granted / 602 resolved
+11.2% vs TC avg
Minimal +4% lift
Without
With
+3.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
19 currently pending
Career history
627
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
85.2%
+45.2% vs TC avg
§102
8.2%
-31.8% vs TC avg
§112
2.3%
-37.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 602 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. “SEMICONDUCTOR DEVICE WITH A NON-BONDING REGION BETWEEN THE ELECTRODE AND THE WIRE” DETAILED ACTION Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ito (Pub. No. US 2019/0043827 A1). Regarding claim 1, Ito discloses a semiconductor device comprising: a semiconductor element 2 placed on an insulating substrate 1 ([0029]) and having an electrode 22 on a surface ([0036]); a bonding wire 3 bonded to the electrode and electrically coupling the semiconductor element ([0037]); and a first resin material 4 covering a bonding portion between the electrode and the bonding wire ([0038]), the bonding portion includes a non-bonding region where the electrode and the bonding wire are not bonded (Figs. 9-14D, The term “bonding portion” is a broad term that encompasses any area or region on which bonding is provided, including areas adjacent to or located at the periphery of a structure. Although Ito identifies portion 31 as the bonding portion, the claim language does not clearly define the extent or boundaries of the claimed bonding region. Therefore, the scope of the term remains broad and is not limited to the specific portion identified in the Ito reference.) Regarding claim 2, Ito discloses the device according to claim 1, further comprising: a second resin material 5 sealing the semiconductor element, the bonding wire, and the first resin material, a Young's modulus of the second resin material being lower than a Young's modulus of the first resin material ([0042]). Regarding claim 3, Ito discloses the device according to claim 1, wherein a Young's modulus of the first resin material is 1000 MPa or more ([0042]). Regarding claim 4, Ito discloses the device according to claim 1, wherein a recess 23 is provided in an upper surface of the electrode, and the non-bonding region is formed by an opening of the recess provided in the upper surface ([0068]). Regarding claims 5 and 6, Ito discloses the device according to claims 2 or 3, wherein a recess 23 is provided in an upper surface of the electrode 22, and the non-bonding region is formed by an opening of the recess provided in the upper surface ([0068]). Regarding claim 7, Ito discloses the device according to claim 4, wherein in the bonding portion, the bonding wire and the electrode are bonded along an extending direction of the bonding wire, and a ratio of a length of the recess to a length of the bonding portion along the extending direction is 6% or more (Figs. 9-14D and [0068]). Claims 1 and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Nagai et al. (Pub. No. US 2011/0049675 A1, herein Nagai). Regarding claim 1, Nagai discloses a semiconductor device comprising: a semiconductor element 1000 ([0040]) placed on an insulating substrate 200/230 ([0048]) and having an electrode 800 on a surface ([0041], [0049]); a bonding wire 340 bonded to the electrode and electrically coupling the semiconductor element ([0053]); and a first resin material 280/290 covering a bonding portion between the electrode and the bonding wire ([0050]), the bonding portion includes a non-bonding region where the electrode and the bonding wire are not bonded (Figs. 10-11B, 22). With respect to claim 9, Nagai discloses the semiconductor device according to claim 1, wherein the non-bonding region has a shielding layer 330 that is not ultrasonically bonded between the electrode and the bonding wire ([0041]). Allowable Subject Matter Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner's statement of reasons for allowance: With respect to claim 8, the prior art of record alone or in combination do not teach or fairly suggest, in combination with other elements of the claims, wherein in the bonding portion, the bonding wire and the electrode are bonded along an extending direction of the bonding wire, and the recess is provided at a center of the bonding portion in the extending direction. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MALIHEH MALEK whose telephone number is (571)270-1874. The examiner can normally be reached M/T/W/R/F, 8:30-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B Gauthier can be reached on (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. June 25, 2026 /MALIHEH MALEK/Primary Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Mar 13, 2024
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
83%
With Interview (+3.6%)
2y 10m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 602 resolved cases by this examiner. Grant probability derived from career allowance rate.

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