DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4-6, 12-13, and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Kao (US 12,131,974) in view of Wong (US 9,314,817).
With regard to claim 1, fig. 13 of Kao discloses a semiconductor package 10 comprising: a first semiconductor chip (middle 110) disposed on a package substrate 200; a second semiconductor chip (right 110) adjacent to the first semiconductor chip (middle 110) in a horizontal direction (left to right in fig. 13) and disposed on the package substrate 200; a plurality of first thermal interfacial material patterns (middle 400; “multiple laminated layers”, col. 8 ll. 51-52) overlapping the first semiconductor chip (middle 110) in a vertical direction (top to bottom in fig. 13); a plurality of second thermal interfacial material patterns (right 400) overlapping the second semiconductor chip (right 110) in the vertical direction (top to bottom); a first non-metal thermal conductive layer (“thermal spreader layer 400a includes any suitable thermally conductive material such as a polymer”, col. 10 ll. 6-7) disposed between the plurality of first thermal interfacial material patterns (top and bottom layers of thermal spreader sheets, col. 8 ll. 52), wherein the plurality of first thermal interfacial materials (middle 400) are spaced apart R1 from the plurality of second thermal interfacial materials (right 400) in the horizontal direction (left to right).
Kao does not disclose and a thermal conductivity of the first non-metal thermal conductive layer in the horizontal direction is lower than a thermal conductivity of the first non-metal thermal conductive layer in the vertical direction.
However, figs. 1J-3 of Wong discloses a thermal conductivity of the first non-metal thermal conductive layer 148 in the horizontal direction is lower than a thermal conductivity (“superior conductive of graphene along its planar axis”, col. 3 ll. 30) of the first non-metal thermal conductive layer 148 in the vertical direction (top to bottom).
Therefore, it would have been obvious to one of ordinary skill in the art to form the thermal spreader layer of Kao with the graphene sheet blocks as taught in Wong in order to provide highly efficient heat transfer from the heat source to the heat sink. See col. 3 ll. 30-33 of Wong.
With regard to claim 2, fig. 13 of Kao discloses a heat-radiating member (right 400) disposed between the plurality of second thermal interfacial material patterns (top and bottom thermal spreader sheets, col. 8 ll. 52), wherein the heat-radiating member (right 400) is spaced apart from the first non-metal (“polymer”, col. 10 ll. 7) thermal conductive layer (middle 400) in the horizontal direction (left to right).
With regard to claim 4, fig. 13 of Kao discloses that the heat-radiating member (right 400) comprises a substantially flat surface and a metal material (“copper (Cu)”, col. 10 ll. 12).
With regard to claim 5, figs. 13 and 15 of Kao discloses that the first semiconductor chip 110a comprises a first heat source (“graphics processing unit”, col. 14 ll. 15) configured to consume first power, and the second semiconductor chip 110b comprises a second heat source (“SRAM dies”, col. 14 ll. 28) configured to consume second power that is less (SRAM consumes less power than GPU) than the first power (“graphics processing unit”, col. 14 ll. 15).
With regard to claim 6, Kao does not disclose that the first non-metal thermal conductive layer comprises graphite.
However, fig. 3 of figs. 1J-3 of Wong discloses that the first non-metal thermal conductive layer 148 comprises graphite (“multilayer graphene block 130”, col. 2 ll. 52).
Therefore, it would have been obvious to one of ordinary skill in the art to form the thermal spreader layer of Kao with the graphene sheet blocks as taught in Wong in order to provide highly efficient heat transfer from the heat source to the heat sink. See col. 3 ll. 30-33 of Wong.
With regard to claim 12, fig. 13 of Kao discloses a semiconductor package 10 comprising: a first semiconductor chip (middle 110 in fig. 13) disposed on a package substrate 200; a second semiconductor chip (right 110) disposed adjacent to the first semiconductor chip (middle 110) in a horizontal direction (left to right); a plurality of first thermal interfacial material patterns (top and bottom thermal spreader sheets in middle 110) overlapping the first semiconductor chip (middle 110) in a vertical direction (top to bottom); a plurality of second thermal interfacial material patterns (top and bottom thermal spreader sheets of right 400, col. 8 ll. 52) overlapping the second semiconductor chip (right 110) in the vertical direction; and a first non-metal thermal conductive layer (“thermal spreader layer 400a includes any suitable thermally conductive material such as a polymer”, col. 10 ll. 6-7) disposed between the plurality of first thermal interfacial material patterns (top and bottom thermal spreader sheets of right 400, col. 8 ll. 52), wherein the first semiconductor chip (middle 110) comprises a first heat source (“graphics processing unit”, col. 14 ll. 15) configured to consume first power, and the second semiconductor chip (right 110) comprises a second heat source (“SRAM dies”, col. 14 ll. 28) configured to consume second power that is less (SRAM consumes less power than GPU) than the first power.
Kao does not disclose a thermal conductivity of the first non-metal thermal conductive layer in the horizontal direction is less than a thermal conductivity of the first non-metal conductive layer in the vertical direction crossing the horizontal direction.
However, figs. 1J-3 of Wong discloses a thermal conductivity of the first non-metal thermal conductive layer 148 in the horizontal direction is lower than a thermal conductivity (“superior conductive of graphene along its planar axis”, col. 3 ll. 30) of the first non-metal thermal conductive layer 148 in the vertical direction (top to bottom) crossing the horizontal direction (left to right).
Therefore, it would have been obvious to one of ordinary skill in the art to form the thermal spreader layer of Kao with the graphene sheet blocks as taught in Wong in order to provide highly efficient heat transfer from the heat source to the heat sink. See col. 3 ll. 30-33 of Wong.
With regard to claim 13, fig. 13 of Kao discloses that the plurality of first thermal interfacial material patterns (top and bottom thermal spreader sheet in middle 400) are spaced apart from the plurality of second thermal interfacial material patterns (top and bottom thermal spreader sheet in right 400) in the horizontal direction.
With regard to claim 18, figs. 1213 of Kao discloses a semiconductor 10 comprising: a package substrate 200; an interposer substrate 120 disposed on the package substrate 200; a first semiconductor chip (middle 110) mounted on the interposer substrate 120; a second semiconductor chip (right 110) mounted on the interposer substrate 120 and spaced apart R1 from the first semiconductor chip (middle 110) in a horizontal direction; a plurality of first thermal interfacial material patterns (top and bottom thermal spreader sheet in middle 400) overlapping the first semiconductor chip (middle 110) in a vertical direction (top to bottom); a plurality of second thermal interfacial material patterns (top and bottom thermal spreader sheets in right 400) overlapping the second semiconductor chip (right 110) in the vertical direction (top to bottom); and a first non-metal thermal conductive layer (“polymer”, col. 7 ll. 39) disposed between the plurality of first thermal interfacial material patterns (top and bottom thermal spreader sheets in right 400) in the vertical direction (top to bottom), wherein the first semiconductor chip (middle 110) comprises a first heat source (“graphics processing unit”, col. 14 ll. 15) configured to consume first power, and the second semiconductor chip (“SRAM dies”, col. 14 ll. 28) comprises a second heat source configured to consume second power that is less (power consumed by SRAM is less than GPU) than the first power; and the plurality of first thermal interfacial material patterns (top and bottom thermal spreader sheets of middle 400) are spaced apart R1 from the second thermal interfacial material patterns (top and bottom thermal spreader sheets of right 400).
Kao does not disclose a thermal conductivity in the horizontal direction of the first non-metal thermal conductive layer is less than a thermal conductivity of the first non-metal thermal conductive layer in the vertical direction crossing the horizontal direction.
However, figs. 1J-3 of Wong discloses a thermal conductivity in the horizontal direction of the first non-metal thermal conductive layer 148 is less than a thermal conductivity (“superior conductive of graphene along its planar axis”, col. 3 ll. 30) of the first non-metal thermal conductive layer 148 in the vertical direction (top to bottom) crossing the horizontal direction (left to right).
Therefore, it would have been obvious to one of ordinary skill in the art to form the thermal spreader layer of Kao with the graphene sheet blocks as taught in Wong in order to provide highly efficient heat transfer from the heat source to the heat sink. See col. 3 ll. 30-33 of Wong.
With regard to claim 19, Kao does not disclose that the first non-metal thermal conductive layer comprises graphite.
However, figs. 1J-3 of Wong discloses that the first non-metal thermal conductive layer 148 comprises graphite (“multilayer graphene block 130”, col. 2 ll. 57).
Therefore, it would have been obvious to one of ordinary skill in the art to form the thermal spreader layer of Kao with the graphene sheet blocks as taught in Wong in order to provide highly efficient heat transfer from the heat source to the heat sink. See col. 3 ll. 30-33 of Wong.
Allowable Subject Matter
Claims 3, 7-11, 14-17, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN T LIU whose telephone number is (571)272-6009. The examiner can normally be reached Monday-Friday 11:00am-7:30pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at 571 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/BENJAMIN TZU-HUNG LIU/ Primary Examiner, Art Unit 2893
Prosecution Insights