DETAILED ACTION
This action is responsive to the amendment filed December 9, 2026. Claims 1-20 are pending. Claims 1, 8, and 15 are independent.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
Acknowledgment is made of applicant’s Information Disclosure Statement (IDS) filed on December 9, 2025. This IDS has been considered.
Response to Amendment
Applicant's amendments to claims 6-7, 13-14, and 20 to clarify that the timing of the programming pulse is the ramp up of the word line is acknowledged and accepted. The associated 35 USC 112(b) indefiniteness rejection is withdrawn for those claims
Claim Rejections - 35 USC § 112 - Indefiniteness
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-7, are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Independent claim 1, is directed to “A memory device” and includes “control logic ... configured to perform operations…”. Thus, claim 1 claims both an apparatus and method steps of using the apparatus and is therefore indefinite. See MPEP §2173.05(p)(Il): “A single claim which claims both an apparatus and the method steps of using the apparatus is indefinite under 35 U.S.C. 112(b)”.
It is noted that applicant apparently amended the claim to include the term "configured" in their reply to address the indefiniteness issue, but that alone does not cure the deficiency because there is insufficient detail as to what structural features the “control logic” must possess to perform the recited operations. The specification only indicates in para. 78-79 that the method can be performed by what appears to be a "black box" of element 134 drive manager of Figs. 1A-1B. The drive manager is further described as some combination of hardware (e.g., processing device, circuitry, dedicated logic, programmable logic, microcode, hardware of a device, integrated circuit, etc.) and/or software (e.g., instructions run or executed on a processing device) which is not informeative with reasonable certainty to one of ordinary skill in the art, rendering it indefinite. These claims would not have been rejected if they were directed to a method of operation, which is why the definiteness requirement rejection is not made against method of programming claims 8-14 and similar non-transitory computer-readable storage medium claims 15-20 (reciting the steps of the computer instructions).
Claims 2-7 depend from claim 1 and are therefore similarly rejected.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 5-9, 12-16, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 20230038237), in view of Khakifirooz et al. (US 20220310160; “Khakifirooz”).
Regarding independent claims 1, 8 and 15, Lee discloses a memory device, comprising:
a memory array (Fig. 2: memory cell array 100);
and control logic, operatively coupled with the memory array, (Fig. 2: control logic 300)
the control logic configured to perform operations comprising:
As applied, Lee additionally discloses a method comprising, and non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
identifying a request to execute a programming operation to program a plurality of sub-blocks comprising a first sub-block and a second sub-block of a memory device (para. 5; "a program operation is performed on a memory block including a plurality of string groups using a re-programming by a method of operating a memory system. The method includes performing a first program operation on a physical page, among a plurality of physical pages that are included in a first string group connected to an i-th word line, and performing a second program operation on a physical page that is connected to an (i−1)-th word line". It is well understood in the art that a page is a sub-block);
executing a first drive operation to load first data into a first select gate drain (SGD) associated with the first sub-block (Fig. 15: step S210 - first program operation on first string group. It is noted that the first string would necessarily include a first select gate drain (DST1 of Fig. 9B for example));
following completion of the first drive operation, execute a second drive operation to load second data into a second SGD associated with the second sub-block (Fig. 15: step S210 - first program operation on second string group. It is noted that the second string would necessarily include a second select gate drain (DST2 of Fig. 9B for example));
Lee is silent regarding a third drive operation to re-load the first data into the first SGD.
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However, Khakifirooz teaches and following completion of the second drive operation, execute a third drive operation to re-load the first data into the first SGD (See Examiner’s Markup above. Fig. 4 where it illustrates the first, second and third drive operations. While it is noted that one of the prior steps claimed is that of “identifying a request to execute a programming operation…” (emphasis added), the act of “identifying a request” to do something doesn’t necessarily entail that the something is tied to the remaining steps. In fact, the claimed “drive operations” of data to the SGD are not affirmatively established as necessarily associated with any particular “memory operation” (e.g.: read, write, erase, verify), they may simply be “executing” as a sequence at an arbitrary time. It is suggested that the claim be amended to establish a clear association of the drive operation sequence with other claimed events.
Lee and Khakifirooz are from the same field of endeavor as applicant’s invention directed to simultaneous programming of multiple sub-blocks in NAND memory arrays. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Lee’s controller and array structure with the teachings of Khakifirooz’s SGD drive operations on a plurality of memory strings in the array. Doing so would speed up memory operations.
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Regarding claims 2, 9, and 16, Lee and Khakifirooz disclose the limitations of claims 1, 8, and 15.
As applied, Khakifirooz further discloses the operations further comprising:
causing a ramped programming pulse to be applied to a wordline associated with the first sub-block and the second sub-block (Fig. 2. where it illustrates ramped program pulse 36. See also para. 23; "simultaneous programming solution 32 programs two SBs with a single program pulse 36").
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Regarding claims 5, 12, and 19, Lee and Khakifirooz disclose the limitations of claims 1, 8, and 15.
As applied, Khakifirooz further discloses wherein a first drive pulse applied to the first SGD during the first drive operation has a first pulse width (Fig. 10 where it illustrates the pulse width of Selected SGD A),
and wherein a re-drive pulse of the third drive operation has a second pulse width that is different than the first pulse width (Fig. 10 where it illustrates the pulse width of Selected SGD B with a pulse width different from the pulse width of SGD A. See also para. 35; "FIG. 10 shows a programming solution 100 in which the last SB in a set of SBs that are programmed simultaneously is kept connected to the BL throughout the program pulse. The illustrated example therefore represents a hybrid approach." It is noted that Khakifirooz's method may be applied to more than two sub-blocks at the same time (para. 24) and the "last SB" could be a third sub-block and hence a third drive operation. And lastly, the pulse identified as the "re-drive" pulse in the instant application shown to be on "even numbered SGD" in Figures 4-6 of the instant application however, there are a plurality of even numbered SGD identified in Figures 2A-2D in the instant application. Therefore, using the broadest reasonable interpretation the data "re-driven" on the third operation may be the same data, but to another even numbered SGD).
Regarding claims 6, and 13, notwithstanding the indefiniteness rejection above, Lee and Khakifirooz disclose the limitations of claims 1, and 8.
As applied, Khakifirooz further discloses wherein the first drive operation is initiated after initiating a ramping up of a wordline associated with the first sub-block and the second sub-block (Fig. 2 where it illustrates programming pulse on the selected WL initiating near t0 and subsequently, SGD ON initiated after t1).
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Regarding claims 7, 14, and 20, notwithstanding the indefiniteness rejection above, Lee and Khakifirooz disclose the limitations of claims 1, 8, and 15.
As applied Khakifirooz further discloses wherein the first drive operation is initiated prior to initiating a ramping up of a wordline associated with the first sub-block and the second sub-block (Fig. 9 where it illustrates the first drive operation (SGD ON) initiated and fully on at time t0 and then the wordlines ramping up. See also para. 34; "FIG. 9 shows a programming solution 90 in which the initial SB in a set of SBs that are being programmed simultaneously is not boosted. In the illustrated example, the SGD for SB A is turned on at time to with the corresponding data already on the BLs, while bringing the WLs to V.sub.pass").
Allowable Subject Matter
Claims 10, 11, 17, and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
For purposes of compact prosecution (see MPEP 2173.06), it is also noted that except for the indefiniteness rejection above for claims 3 and 4, as the features are directly aligned with claims 10, 11, 17 and 18, they would also be similarly allowable if the indefiniteness of base claim 1 were cured.
Regarding claims 10, 11, 17, and 18, the prior art of record teaches a third SGD drive operation. It is silent with respect to the third drive operation in a timing relationship with the application of the ramped programming pulse to the word line.
Response to Arguments
Applicant's arguments have been fully considered but they are not persuasive.
Applicant contends on pg. 8 of Remarks that the obviousness rejection of independent claim 1 is improper because Khakifirooz does not teach the limitation of a third drive operation as part of the programming operation. This assertion does not demonstrate error in the examiners finding because as stated in the original rejection, the act of “identifying a request” to do something (programming operation) doesn’t necessarily entail that the something is tied to the remaining steps. In fact, the claimed “drive operations” of data to the SGD are not affirmatively established as necessarily associated with any particular execution of “memory operation” (e.g.: read, write, erase, verify), they may simply be “executing” as a sequence at an arbitrary time.
The rejection of independent claim 1 is deemed proper and therefore maintained. Independent claims 8, and 15 having similar language to claim 1 also remain rejected as described above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Seol (US20110013458) – Simultaneous programming of multiple cells with a double drive on USG (SST).
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/James S. Wells/Examiner, Art Unit 2825
/ALEXANDER SOFOCLEOUS/Supervisory Patent Examiner, Art Unit 2825